[U-Boot-Users] Debugging 85xx eTSEC's

[Ben Warren <bwarren@qstreams.com>]

robert lazarski wrote:
> Hi all,
>
> Using u-boot from the latest git, I'm trying to debug our phy's on our
> custom 8548 board. Our eTSEC0 / eTSEC1 are mavell 88E1121 and eTSEC2 /
> eTSEC3 are 88E1111 - I'm trying to debug eTSEC2 since the 88E1111
> seems to be supported by u-boot. I get this output from the serial
> port in debug mode:
>
> eTSEC1 is in sgmii mode.
> eTSEC2 is in sgmii mode.
> eTSEC3 is in sgmii mode.
> eTSEC4 is in sgmii mode.
>
>   
Sorry, can't speak to this, except that there's typically a single 
register for each interface where you choose between GMII, SGMII, RGMII 
etc. Maybe the eTSEC defaults to serial gigabit. The code will tell you...
> Net:   eTSEC0: PHY is Unknown/Generic PHY (ffffffff)
> eTSEC1: PHY is Unknown/Generic PHY (ffffffff)
> eTSEC2: PHY is Unknown/Generic PHY (ffffffff)
> eTSEC3: PHY is Unknown/Generic PHY (ffffffff)
> eTSEC0, eTSEC1, eTSEC2, eTSEC3
>
> Where 'is in sgmii mode' comes from standard 85xx stuff: I can't ping
> when setting ethact to be eTSEC2, and I get this when running 'mii
> info'  :
>
> => mii info
> PHY_PHYIDR2 @ 0x0 = 0xffff
> PHY_PHYIDR2 @ 0x1 = 0xffff
> PHY_PHYIDR2 @ 0x2 = 0xffff
> PHY_PHYIDR2 @ 0x3 = 0xffff
> Can't read PHY at address 4
> ...
>
>   
Sorry if this seems like an obnoxious question, but are these the 
addresses your PHYs are wired to? Are you sure the PHYs are powered up 
properly? It looks like the MDIO controller doesn't see anything when it 
polls the devices. Double check your schematic and maybe probe the MDIO 
bus when you issue the 'mii info' command. MDIO is a lot like I2C 
(pretty low speed serial, easy to probe).

regards,
Ben