[U-Boot-Users] Mixing CFI and non-CFI flashs?

Michael Schwingen
2007-11-12T20:19:15Z

On Tue, Nov 06, 2007 at 09:59:28AM +0100, Stefan Roese wrote:
>
> I vote for keeping the fields in. From my point of view, it's better to only
> enable a small part of the available FLASH definitions, than to strip some
> fields from the struct and make porting more difficult.

Okay. I changed the patch so that the device table entries can now be copied
1:1 from the Linux source.

Since there still is the problem of the different unlock addresses, I have
moved the unlock address values to the flash_info_t struct - this gets rid
of the non-abvious code in the AMD_ADDR_* macros, and allows to override
these values without changing the behaviour of the CFI driver. I also added
a name field so that the correct name can be printed in flinfo.

Now the only problem I see is the code in flash_erase, which is the only
place where CFI_CMDSET_AMD_LEGACY needs different behaviour: the CFI code
does the unlock sequence to the current sector address, while the jedec
flash needs the unlock sequence to the flash base address. I believe the CFI
behaviour is wrong (but works because the CFI flashs ignore the extra
address bits), but I left the special case in - that way, there should be no
change in the existing CFI code behaviour, so the patch should be safe to
apply that way without breaking existing boards.

I will post the patch in a separate mail with PATCH: in the subject, so it
is not lost deep in this thread.

The resulting output now looks like this:

Flash: 8.3 MB
=> flinfo

Bank # 1: SST 39LF020 FLASH (8 x 8) Size: 256 kB in 64 Sectors
AMD Legacy command set, Manufacturer ID: 0xBF, Device ID: 0xD6
Erase timeout: 30000 ms, write timeout: 100 ms

Sector Start Addresses:
50000000 RO 50001000 RO 50002000 RO 50003000 RO 50004000 RO
50005000 RO 50006000 RO 50007000 RO 50008000 RO 50009000 RO
5000A000 RO 5000B000 RO 5000C000 RO 5000D000 RO 5000E000 RO
5000F000 RO 50010000 RO 50011000 RO 50012000 RO 50013000 RO
50014000 RO 50015000 RO 50016000 RO 50017000 RO 50018000 RO
50019000 RO 5001A000 RO 5001B000 RO 5001C000 RO 5001D000 RO
5001E000 RO 5001F000 RO 50020000 RO 50021000 RO 50022000 RO
50023000 RO 50024000 RO 50025000 RO 50026000 RO 50027000 RO
50028000 RO 50029000 RO 5002A000 RO 5002B000 RO 5002C000 RO
5002D000 RO 5002E000 RO 5002F000 RO 50030000 RO 50031000 RO
50032000 RO 50033000 RO 50034000 RO 50035000 RO 50036000 RO
50037000 E 50038000 E 50039000 E 5003A000 E 5003B000 E
5003C000 E 5003D000 E 5003E000 E 5003F000 RO

Bank # 2: CFI conformant FLASH (16 x 16) Size: 8 MB in 64 Sectors
Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x17
Erase timeout: 16384 ms, write timeout: 2 ms
Buffer write timeout: 2 ms, buffer size: 32 bytes

Sector Start Addresses:
51000000 51020000 51040000 51060000 51080000
510A0000 510C0000 510E0000 51100000 51120000
51140000 51160000 51180000 511A0000 511C0000
511E0000 51200000 51220000 51240000 51260000
51280000 512A0000 512C0000 512E0000 51300000
51320000 51340000 51360000 51380000 513A0000
513C0000 513E0000 51400000 51420000 51440000
51460000 51480000 514A0000 514C0000 514E0000
51500000 51520000 51540000 51560000 51580000
515A0000 515C0000 515E0000 51600000 51620000
51640000 51660000 51680000 516A0000 516C0000
516E0000 51700000 51720000 51740000 51760000
51780000 517A0000 517C0000 517E0000
=>

cu
Michael