From mboxrd@z Thu Jan 1 00:00:00 1970 From: Michael Schwingen Date: Sun, 09 Dec 2007 17:45:13 +0100 Subject: [U-Boot-Users] PATCH: add support for MII-connected ethernet switch for IPX42x In-Reply-To: <20071209092122.GB22305@game.jcrosoft.org> References: <20071110153448.GA11033@discworld.dascon.de> <20071208124024.GA32116@game.jcrosoft.org> <475B1913.7040902@discworld.dascon.de> <475B3A55.7090801@qstreams.com> <20071209092122.GB22305@game.jcrosoft.org> Message-ID: <475C1B99.9040403@discworld.dascon.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Jean-Christophe PLAGNIOL-VILLARD wrote: > You're right the speed depends on the switch, and as example for the marvell > 88E6031/88E6060 this speed/duplex is determine by pull-up at the switch reset > (CPU port) and could be read through the MDIO bus but not modify. > > You could also have a tree of switch that need to be configured and not > only forced the cpu port speed/duplex at 100/FULL. > I have one of these - the MII bus is forced to 100/FULL, and the switch configuration happens in the reset_phy function. I could imagine some setup where the MII bus needs to be set to 100/HALF, but probably only for PHYs that lack MDIO configuration and not for switches. >> Change the CONFIG_MII_ETHSWITCH to CONFIG_FIXED_PHY (as done in Linux) >> and I'll be happy. Later on we need to change things to have port-wise >> granularity, but we're not there yet. >> > > As I said before each as it's own way to determine the speed/duplex do > it as hard-code is not the best way. > I will prefer an external function that take care of the switch that > could me merge with the new phylib after. > Now I understand what you wanted. Lets just decide which way it whould be done for now (before we have the PHY library), so I can modify the patch accordingly. For the general case, the code will need to pass the number of the ethernet port - there may be configurations with one MII connected to a switch with hardwired speed, and one MII connedted to a normal single-port PHY. cu Michael