* [U-Boot-Users] [PATCH] ppc: Refactor cache routines, so there is only one common set.
@ 2008-01-09 21:33 Rafal Jaworowski
2008-01-10 2:25 ` Liu Dave
2008-01-12 20:13 ` Wolfgang Denk
0 siblings, 2 replies; 8+ messages in thread
From: Rafal Jaworowski @ 2008-01-09 21:33 UTC (permalink / raw)
To: u-boot
Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
---
cpu/mpc512x/start.S | 46 ----------------------------
cpu/mpc83xx/start.S | 46 ----------------------------
cpu/mpc85xx/start.S | 45 ---------------------------
cpu/mpc86xx/start.S | 44 --------------------------
cpu/ppc4xx/start.S | 33 --------------------
lib_ppc/Makefile | 2 +-
lib_ppc/ppccache.S | 84 +++++++++++++++++++++++++++++++++++++++++++++++++++
7 files changed, 85 insertions(+), 215 deletions(-)
create mode 100644 lib_ppc/ppccache.S
diff --git a/cpu/mpc512x/start.S b/cpu/mpc512x/start.S
index 244c69b..5a9d868 100644
--- a/cpu/mpc512x/start.S
+++ b/cpu/mpc512x/start.S
@@ -479,52 +479,6 @@ get_pvr:
mfspr r3, PVR
blr
-/*------------------------------------------------------------------------------- */
-/* Function: ppcDcbf */
-/* Description: Data Cache block flush */
-/* Input: r3 = effective address */
-/* Output: none. */
-/*------------------------------------------------------------------------------- */
- .globl ppcDcbf
-ppcDcbf:
- dcbf r0,r3
- blr
-
-/*------------------------------------------------------------------------------- */
-/* Function: ppcDcbi */
-/* Description: Data Cache block Invalidate */
-/* Input: r3 = effective address */
-/* Output: none. */
-/*------------------------------------------------------------------------------- */
- .globl ppcDcbi
-ppcDcbi:
- dcbi r0,r3
- blr
-
-/*--------------------------------------------------------------------------
- * Function: ppcDcbz
- * Description: Data Cache block zero.
- * Input: r3 = effective address
- * Output: none.
- *-------------------------------------------------------------------------- */
-
- .globl ppcDcbz
-ppcDcbz:
- dcbz r0,r3
- blr
-
- .globl ppcDWstore
-ppcDWstore:
- lfd 1, 0(r4)
- stfd 1, 0(r3)
- blr
-
- .globl ppcDWload
-ppcDWload:
- lfd 1, 0(r3)
- stfd 1, 0(r4)
- blr
-
/*-------------------------------------------------------------------*/
/*
diff --git a/cpu/mpc83xx/start.S b/cpu/mpc83xx/start.S
index 496c8a5..9c6c78d 100644
--- a/cpu/mpc83xx/start.S
+++ b/cpu/mpc83xx/start.S
@@ -840,52 +840,6 @@ get_pvr:
mfspr r3, PVR
blr
-/*------------------------------------------------------------------------------- */
-/* Function: ppcDcbf */
-/* Description: Data Cache block flush */
-/* Input: r3 = effective address */
-/* Output: none. */
-/*------------------------------------------------------------------------------- */
- .globl ppcDcbf
-ppcDcbf:
- dcbf r0,r3
- blr
-
-/*------------------------------------------------------------------------------- */
-/* Function: ppcDcbi */
-/* Description: Data Cache block Invalidate */
-/* Input: r3 = effective address */
-/* Output: none. */
-/*------------------------------------------------------------------------------- */
- .globl ppcDcbi
-ppcDcbi:
- dcbi r0,r3
- blr
-
-/*--------------------------------------------------------------------------
- * Function: ppcDcbz
- * Description: Data Cache block zero.
- * Input: r3 = effective address
- * Output: none.
- *-------------------------------------------------------------------------- */
-
- .globl ppcDcbz
-ppcDcbz:
- dcbz r0,r3
- blr
-
- .globl ppcDWstore
-ppcDWstore:
- lfd 1, 0(r4)
- stfd 1, 0(r3)
- blr
-
- .globl ppcDWload
-ppcDWload:
- lfd 1, 0(r3)
- stfd 1, 0(r4)
- blr
-
/*-------------------------------------------------------------------*/
/*
diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S
index b769ef8..653f296 100644
--- a/cpu/mpc85xx/start.S
+++ b/cpu/mpc85xx/start.S
@@ -775,51 +775,6 @@ in32r:
lwbrx r3,r0,r3
blr
-/*------------------------------------------------------------------------------- */
-/* Function: ppcDcbf */
-/* Description: Data Cache block flush */
-/* Input: r3 = effective address */
-/* Output: none. */
-/*------------------------------------------------------------------------------- */
- .globl ppcDcbf
-ppcDcbf:
- dcbf r0,r3
- blr
-
-/*------------------------------------------------------------------------------- */
-/* Function: ppcDcbi */
-/* Description: Data Cache block Invalidate */
-/* Input: r3 = effective address */
-/* Output: none. */
-/*------------------------------------------------------------------------------- */
- .globl ppcDcbi
-ppcDcbi:
- dcbi r0,r3
- blr
-
-/*--------------------------------------------------------------------------
- * Function: ppcDcbz
- * Description: Data Cache block zero.
- * Input: r3 = effective address
- * Output: none.
- *-------------------------------------------------------------------------- */
-
- .globl ppcDcbz
-ppcDcbz:
- dcbz r0,r3
- blr
-
-/*------------------------------------------------------------------------------- */
-/* Function: ppcSync */
-/* Description: Processor Synchronize */
-/* Input: none. */
-/* Output: none. */
-/*------------------------------------------------------------------------------- */
- .globl ppcSync
-ppcSync:
- sync
- blr
-
/*------------------------------------------------------------------------------*/
/*
diff --git a/cpu/mpc86xx/start.S b/cpu/mpc86xx/start.S
index c83310a..fa9736b 100644
--- a/cpu/mpc86xx/start.S
+++ b/cpu/mpc86xx/start.S
@@ -708,50 +708,6 @@ in32r:
blr
/*
- * Function: ppcDcbf
- * Description: Data Cache block flush
- * Input: r3 = effective address
- * Output: none.
- */
- .globl ppcDcbf
-ppcDcbf:
- dcbf r0,r3
- blr
-
-/*
- * Function: ppcDcbi
- * Description: Data Cache block Invalidate
- * Input: r3 = effective address
- * Output: none.
- */
- .globl ppcDcbi
-ppcDcbi:
- dcbi r0,r3
- blr
-
-/*
- * Function: ppcDcbz
- * Description: Data Cache block zero.
- * Input: r3 = effective address
- * Output: none.
- */
- .globl ppcDcbz
-ppcDcbz:
- dcbz r0,r3
- blr
-
-/*
- * Function: ppcSync
- * Description: Processor Synchronize
- * Input: none.
- * Output: none.
- */
- .globl ppcSync
-ppcSync:
- sync
- blr
-
-/*
* void relocate_code (addr_sp, gd, addr_moni)
*
* This "function" does not return, instead it continues in RAM
diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S
index 52601ed..d9aa7a9 100644
--- a/cpu/ppc4xx/start.S
+++ b/cpu/ppc4xx/start.S
@@ -1279,39 +1279,6 @@ in32r:
lwbrx r3,r0,r3
blr
-/*------------------------------------------------------------------------------- */
-/* Function: ppcDcbf */
-/* Description: Data Cache block flush */
-/* Input: r3 = effective address */
-/* Output: none. */
-/*------------------------------------------------------------------------------- */
- .globl ppcDcbf
-ppcDcbf:
- dcbf r0,r3
- blr
-
-/*------------------------------------------------------------------------------- */
-/* Function: ppcDcbi */
-/* Description: Data Cache block Invalidate */
-/* Input: r3 = effective address */
-/* Output: none. */
-/*------------------------------------------------------------------------------- */
- .globl ppcDcbi
-ppcDcbi:
- dcbi r0,r3
- blr
-
-/*------------------------------------------------------------------------------- */
-/* Function: ppcSync */
-/* Description: Processor Synchronize */
-/* Input: none. */
-/* Output: none. */
-/*------------------------------------------------------------------------------- */
- .globl ppcSync
-ppcSync:
- sync
- blr
-
/*
* void relocate_code (addr_sp, gd, addr_moni)
*
diff --git a/lib_ppc/Makefile b/lib_ppc/Makefile
index 2ba034f..26fbb63 100644
--- a/lib_ppc/Makefile
+++ b/lib_ppc/Makefile
@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(ARCH).a
-SOBJS = ppcstring.o ticks.o
+SOBJS = ppcstring.o ticks.o ppccache.o
COBJS = board.o \
bat_rw.o cache.o extable.o kgdb.o time.o interrupts.o
diff --git a/lib_ppc/ppccache.S b/lib_ppc/ppccache.S
new file mode 100644
index 0000000..7f361aa
--- /dev/null
+++ b/lib_ppc/ppccache.S
@@ -0,0 +1,84 @@
+/*
+ * Copyright (C) 1998 Dan Malek <dmalek@jlc.net>
+ * Copyright (C) 1999 Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
+ * Copyright (C) 2000, 2001,2002 Wolfgang Denk <wd@denx.de>
+ * Copyright Freescale Semiconductor, Inc. 2004, 2006. All rights reserved.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <ppc_asm.tmpl>
+
+/*------------------------------------------------------------------------------- */
+/* Function: ppcDcbf */
+/* Description: Data Cache block flush */
+/* Input: r3 = effective address */
+/* Output: none. */
+/*------------------------------------------------------------------------------- */
+ .globl ppcDcbf
+ppcDcbf:
+ dcbf r0,r3
+ blr
+
+/*------------------------------------------------------------------------------- */
+/* Function: ppcDcbi */
+/* Description: Data Cache block Invalidate */
+/* Input: r3 = effective address */
+/* Output: none. */
+/*------------------------------------------------------------------------------- */
+ .globl ppcDcbi
+ppcDcbi:
+ dcbi r0,r3
+ blr
+
+/*--------------------------------------------------------------------------
+ * Function: ppcDcbz
+ * Description: Data Cache block zero.
+ * Input: r3 = effective address
+ * Output: none.
+ *-------------------------------------------------------------------------- */
+
+ .globl ppcDcbz
+ppcDcbz:
+ dcbz r0,r3
+ blr
+
+ .globl ppcDWstore
+ppcDWstore:
+ lfd 1, 0(r4)
+ stfd 1, 0(r3)
+ blr
+
+ .globl ppcDWload
+ppcDWload:
+ lfd 1, 0(r3)
+ stfd 1, 0(r4)
+ blr
+
+/*------------------------------------------------------------------------------- */
+/* Function: ppcSync */
+/* Description: Processor Synchronize */
+/* Input: none. */
+/* Output: none. */
+/*------------------------------------------------------------------------------- */
+ .globl ppcSync
+ppcSync:
+ sync
+ blr
--
1.5.2.2
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [U-Boot-Users] [PATCH] ppc: Refactor cache routines, so there is only one common set.
2008-01-09 21:33 [U-Boot-Users] [PATCH] ppc: Refactor cache routines, so there is only one common set Rafal Jaworowski
@ 2008-01-10 2:25 ` Liu Dave
2008-01-10 5:53 ` Kumar Gala
2008-01-15 11:13 ` Rafal Jaworowski
2008-01-12 20:13 ` Wolfgang Denk
1 sibling, 2 replies; 8+ messages in thread
From: Liu Dave @ 2008-01-10 2:25 UTC (permalink / raw)
To: u-boot
Hello Rafal,
The e500 don't have classic FPU. So don't support these FP inst.
Could you keep the ppcDWstore/ppcDWload in start.S?
Thanks,
Dave
> -----Original Message-----
> From: u-boot-users-bounces at lists.sourceforge.net
> [mailto:u-boot-users-bounces at lists.sourceforge.net] On Behalf
> Of Rafal Jaworowski
> Sent: 2008?1?10? 5:33 AM
> To: u-boot-users at lists.sourceforge.net
> Subject: [U-Boot-Users] [PATCH] ppc: Refactor cache
> routines,so there is only one common set.
>
> Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
> ---
> cpu/mpc512x/start.S | 46 ----------------------------
> cpu/mpc83xx/start.S | 46 ----------------------------
> cpu/mpc85xx/start.S | 45 ---------------------------
> cpu/mpc86xx/start.S | 44 --------------------------
> cpu/ppc4xx/start.S | 33 --------------------
> lib_ppc/Makefile | 2 +-
> lib_ppc/ppccache.S | 84
> +++++++++++++++++++++++++++++++++++++++++++++++++++
> 7 files changed, 85 insertions(+), 215 deletions(-)
> create mode 100644 lib_ppc/ppccache.S
>
> diff --git a/cpu/mpc512x/start.S b/cpu/mpc512x/start.S
> index 244c69b..5a9d868 100644
> --- a/cpu/mpc512x/start.S
> +++ b/cpu/mpc512x/start.S
> @@ -479,52 +479,6 @@ get_pvr:
> mfspr r3, PVR
> blr
>
> -/*-----------------------------------------------------------
> -------------------- */
> -/* Function: ppcDcbf */
> -/* Description: Data Cache block flush */
> -/* Input: r3 = effective address */
> -/* Output: none. */
> -/*-----------------------------------------------------------
> -------------------- */
> - .globl ppcDcbf
> -ppcDcbf:
> - dcbf r0,r3
> - blr
> -
> -/*-----------------------------------------------------------
> -------------------- */
> -/* Function: ppcDcbi */
> -/* Description: Data Cache block Invalidate */
> -/* Input: r3 = effective address */
> -/* Output: none. */
> -/*-----------------------------------------------------------
> -------------------- */
> - .globl ppcDcbi
> -ppcDcbi:
> - dcbi r0,r3
> - blr
> -
> -/*-----------------------------------------------------------
> ---------------
> - * Function: ppcDcbz
> - * Description: Data Cache block zero.
> - * Input: r3 = effective address
> - * Output: none.
> -
> *-------------------------------------------------------------
> ------------- */
> -
> - .globl ppcDcbz
> -ppcDcbz:
> - dcbz r0,r3
> - blr
> -
> - .globl ppcDWstore
> -ppcDWstore:
> - lfd 1, 0(r4)
> - stfd 1, 0(r3)
> - blr
> -
> - .globl ppcDWload
> -ppcDWload:
> - lfd 1, 0(r3)
> - stfd 1, 0(r4)
> - blr
> -
>
> /*------------------------------------------------------------
> -------*/
>
> /*
> diff --git a/cpu/mpc83xx/start.S b/cpu/mpc83xx/start.S
> index 496c8a5..9c6c78d 100644
> --- a/cpu/mpc83xx/start.S
> +++ b/cpu/mpc83xx/start.S
> @@ -840,52 +840,6 @@ get_pvr:
> mfspr r3, PVR
> blr
>
> -/*-----------------------------------------------------------
> -------------------- */
> -/* Function: ppcDcbf */
> -/* Description: Data Cache block flush */
> -/* Input: r3 = effective address */
> -/* Output: none. */
> -/*-----------------------------------------------------------
> -------------------- */
> - .globl ppcDcbf
> -ppcDcbf:
> - dcbf r0,r3
> - blr
> -
> -/*-----------------------------------------------------------
> -------------------- */
> -/* Function: ppcDcbi */
> -/* Description: Data Cache block Invalidate */
> -/* Input: r3 = effective address */
> -/* Output: none. */
> -/*-----------------------------------------------------------
> -------------------- */
> - .globl ppcDcbi
> -ppcDcbi:
> - dcbi r0,r3
> - blr
> -
> -/*-----------------------------------------------------------
> ---------------
> - * Function: ppcDcbz
> - * Description: Data Cache block zero.
> - * Input: r3 = effective address
> - * Output: none.
> -
> *-------------------------------------------------------------
> ------------- */
> -
> - .globl ppcDcbz
> -ppcDcbz:
> - dcbz r0,r3
> - blr
> -
> - .globl ppcDWstore
> -ppcDWstore:
> - lfd 1, 0(r4)
> - stfd 1, 0(r3)
> - blr
> -
> - .globl ppcDWload
> -ppcDWload:
> - lfd 1, 0(r3)
> - stfd 1, 0(r4)
> - blr
> -
>
> /*------------------------------------------------------------
> -------*/
>
> /*
> diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S
> index b769ef8..653f296 100644
> --- a/cpu/mpc85xx/start.S
> +++ b/cpu/mpc85xx/start.S
> @@ -775,51 +775,6 @@ in32r:
> lwbrx r3,r0,r3
> blr
>
> -/*-----------------------------------------------------------
> -------------------- */
> -/* Function: ppcDcbf */
> -/* Description: Data Cache block flush */
> -/* Input: r3 = effective address */
> -/* Output: none. */
> -/*-----------------------------------------------------------
> -------------------- */
> - .globl ppcDcbf
> -ppcDcbf:
> - dcbf r0,r3
> - blr
> -
> -/*-----------------------------------------------------------
> -------------------- */
> -/* Function: ppcDcbi */
> -/* Description: Data Cache block Invalidate */
> -/* Input: r3 = effective address */
> -/* Output: none. */
> -/*-----------------------------------------------------------
> -------------------- */
> - .globl ppcDcbi
> -ppcDcbi:
> - dcbi r0,r3
> - blr
> -
> -/*-----------------------------------------------------------
> ---------------
> - * Function: ppcDcbz
> - * Description: Data Cache block zero.
> - * Input: r3 = effective address
> - * Output: none.
> -
> *-------------------------------------------------------------
> ------------- */
> -
> - .globl ppcDcbz
> -ppcDcbz:
> - dcbz r0,r3
> - blr
> -
> -/*-----------------------------------------------------------
> -------------------- */
> -/* Function: ppcSync */
> -/* Description: Processor Synchronize */
> -/* Input: none. */
> -/* Output: none. */
> -/*-----------------------------------------------------------
> -------------------- */
> - .globl ppcSync
> -ppcSync:
> - sync
> - blr
> -
>
> /*------------------------------------------------------------
> ------------------*/
>
> /*
> diff --git a/cpu/mpc86xx/start.S b/cpu/mpc86xx/start.S
> index c83310a..fa9736b 100644
> --- a/cpu/mpc86xx/start.S
> +++ b/cpu/mpc86xx/start.S
> @@ -708,50 +708,6 @@ in32r:
> blr
>
> /*
> - * Function: ppcDcbf
> - * Description: Data Cache block flush
> - * Input: r3 = effective address
> - * Output: none.
> - */
> - .globl ppcDcbf
> -ppcDcbf:
> - dcbf r0,r3
> - blr
> -
> -/*
> - * Function: ppcDcbi
> - * Description: Data Cache block Invalidate
> - * Input: r3 = effective address
> - * Output: none.
> - */
> - .globl ppcDcbi
> -ppcDcbi:
> - dcbi r0,r3
> - blr
> -
> -/*
> - * Function: ppcDcbz
> - * Description: Data Cache block zero.
> - * Input: r3 = effective address
> - * Output: none.
> - */
> - .globl ppcDcbz
> -ppcDcbz:
> - dcbz r0,r3
> - blr
> -
> -/*
> - * Function: ppcSync
> - * Description: Processor Synchronize
> - * Input: none.
> - * Output: none.
> - */
> - .globl ppcSync
> -ppcSync:
> - sync
> - blr
> -
> -/*
> * void relocate_code (addr_sp, gd, addr_moni)
> *
> * This "function" does not return, instead it continues in RAM
> diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S
> index 52601ed..d9aa7a9 100644
> --- a/cpu/ppc4xx/start.S
> +++ b/cpu/ppc4xx/start.S
> @@ -1279,39 +1279,6 @@ in32r:
> lwbrx r3,r0,r3
> blr
>
> -/*-----------------------------------------------------------
> -------------------- */
> -/* Function: ppcDcbf */
> -/* Description: Data Cache block flush */
> -/* Input: r3 = effective address */
> -/* Output: none. */
> -/*-----------------------------------------------------------
> -------------------- */
> - .globl ppcDcbf
> -ppcDcbf:
> - dcbf r0,r3
> - blr
> -
> -/*-----------------------------------------------------------
> -------------------- */
> -/* Function: ppcDcbi */
> -/* Description: Data Cache block Invalidate */
> -/* Input: r3 = effective address */
> -/* Output: none. */
> -/*-----------------------------------------------------------
> -------------------- */
> - .globl ppcDcbi
> -ppcDcbi:
> - dcbi r0,r3
> - blr
> -
> -/*-----------------------------------------------------------
> -------------------- */
> -/* Function: ppcSync */
> -/* Description: Processor Synchronize */
> -/* Input: none. */
> -/* Output: none. */
> -/*-----------------------------------------------------------
> -------------------- */
> - .globl ppcSync
> -ppcSync:
> - sync
> - blr
> -
> /*
> * void relocate_code (addr_sp, gd, addr_moni)
> *
> diff --git a/lib_ppc/Makefile b/lib_ppc/Makefile
> index 2ba034f..26fbb63 100644
> --- a/lib_ppc/Makefile
> +++ b/lib_ppc/Makefile
> @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
>
> LIB = $(obj)lib$(ARCH).a
>
> -SOBJS = ppcstring.o ticks.o
> +SOBJS = ppcstring.o ticks.o ppccache.o
>
> COBJS = board.o \
> bat_rw.o cache.o extable.o kgdb.o time.o interrupts.o
> diff --git a/lib_ppc/ppccache.S b/lib_ppc/ppccache.S
> new file mode 100644
> index 0000000..7f361aa
> --- /dev/null
> +++ b/lib_ppc/ppccache.S
> @@ -0,0 +1,84 @@
> +/*
> + * Copyright (C) 1998 Dan Malek <dmalek@jlc.net>
> + * Copyright (C) 1999 Magnus Damm
> <kieraypc01.p.y.kie.era.ericsson.se>
> + * Copyright (C) 2000, 2001,2002 Wolfgang Denk <wd@denx.de>
> + * Copyright Freescale Semiconductor, Inc. 2004, 2006. All
> rights reserved.
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include <config.h>
> +#include <ppc_asm.tmpl>
> +
> +/*-----------------------------------------------------------
> -------------------- */
> +/* Function: ppcDcbf */
> +/* Description: Data Cache block flush */
> +/* Input: r3 = effective address */
> +/* Output: none. */
> +/*-----------------------------------------------------------
> -------------------- */
> + .globl ppcDcbf
> +ppcDcbf:
> + dcbf r0,r3
> + blr
> +
> +/*-----------------------------------------------------------
> -------------------- */
> +/* Function: ppcDcbi */
> +/* Description: Data Cache block Invalidate */
> +/* Input: r3 = effective address */
> +/* Output: none. */
> +/*-----------------------------------------------------------
> -------------------- */
> + .globl ppcDcbi
> +ppcDcbi:
> + dcbi r0,r3
> + blr
> +
> +/*-----------------------------------------------------------
> ---------------
> + * Function: ppcDcbz
> + * Description: Data Cache block zero.
> + * Input: r3 = effective address
> + * Output: none.
> +
> *-------------------------------------------------------------
> ------------- */
> +
> + .globl ppcDcbz
> +ppcDcbz:
> + dcbz r0,r3
> + blr
> +
> + .globl ppcDWstore
> +ppcDWstore:
> + lfd 1, 0(r4)
> + stfd 1, 0(r3)
> + blr
> +
> + .globl ppcDWload
> +ppcDWload:
> + lfd 1, 0(r3)
> + stfd 1, 0(r4)
> + blr
> +
> +/*-----------------------------------------------------------
> -------------------- */
> +/* Function: ppcSync */
> +/* Description: Processor Synchronize */
> +/* Input: none. */
> +/* Output: none. */
> +/*-----------------------------------------------------------
> -------------------- */
> + .globl ppcSync
> +ppcSync:
> + sync
> + blr
> --
> 1.5.2.2
>
>
> --------------------------------------------------------------
> -----------
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^ permalink raw reply [flat|nested] 8+ messages in thread
* [U-Boot-Users] [PATCH] ppc: Refactor cache routines, so there is only one common set.
2008-01-10 2:25 ` Liu Dave
@ 2008-01-10 5:53 ` Kumar Gala
2008-01-15 11:20 ` Rafal Jaworowski
2008-01-15 11:13 ` Rafal Jaworowski
1 sibling, 1 reply; 8+ messages in thread
From: Kumar Gala @ 2008-01-10 5:53 UTC (permalink / raw)
To: u-boot
On Jan 9, 2008, at 8:25 PM, Liu Dave wrote:
> Hello Rafal,
>
> The e500 don't have classic FPU. So don't support these FP inst.
>
> Could you keep the ppcDWstore/ppcDWload in start.S?
also some of the e300 variants dont have FPUs. (832x).
- k
^ permalink raw reply [flat|nested] 8+ messages in thread
* [U-Boot-Users] [PATCH] ppc: Refactor cache routines, so there is only one common set.
2008-01-10 5:53 ` Kumar Gala
@ 2008-01-15 11:20 ` Rafal Jaworowski
2008-01-15 14:06 ` Kumar Gala
0 siblings, 1 reply; 8+ messages in thread
From: Rafal Jaworowski @ 2008-01-15 11:20 UTC (permalink / raw)
To: u-boot
Hi Kumar,
Kumar Gala wrote:
>> The e500 don't have classic FPU. So don't support these FP inst.
>>
>> Could you keep the ppcDWstore/ppcDWload in start.S?
>
> also some of the e300 variants dont have FPUs. (832x).
>
OK, although this one needs probably be dealt with in the 83xx start.S via
#ifdef or so, because currently those functions are defined there unconditionally.
kind regards,
Rafal
^ permalink raw reply [flat|nested] 8+ messages in thread
* [U-Boot-Users] [PATCH] ppc: Refactor cache routines, so there is only one common set.
2008-01-15 11:20 ` Rafal Jaworowski
@ 2008-01-15 14:06 ` Kumar Gala
0 siblings, 0 replies; 8+ messages in thread
From: Kumar Gala @ 2008-01-15 14:06 UTC (permalink / raw)
To: u-boot
On Jan 15, 2008, at 5:20 AM, Rafal Jaworowski wrote:
> Hi Kumar,
>
> Kumar Gala wrote:
>>> The e500 don't have classic FPU. So don't support these FP inst.
>>>
>>> Could you keep the ppcDWstore/ppcDWload in start.S?
>>
>> also some of the e300 variants dont have FPUs. (832x).
>>
>
> OK, although this one needs probably be dealt with in the 83xx
> start.S via
> #ifdef or so, because currently those functions are defined there
> unconditionally.
That's fine. I poke at the guys to see if we can do something else to
get ride of ppcDWload/ppcDWstore from the 83xx code.
- k
^ permalink raw reply [flat|nested] 8+ messages in thread
* [U-Boot-Users] [PATCH] ppc: Refactor cache routines, so there is only one common set.
2008-01-10 2:25 ` Liu Dave
2008-01-10 5:53 ` Kumar Gala
@ 2008-01-15 11:13 ` Rafal Jaworowski
1 sibling, 0 replies; 8+ messages in thread
From: Rafal Jaworowski @ 2008-01-15 11:13 UTC (permalink / raw)
To: u-boot
Hi Dave,
Liu Dave wrote:
> The e500 don't have classic FPU. So don't support these FP inst.
>
> Could you keep the ppcDWstore/ppcDWload in start.S?
>
Right, I shouldn't have touched those.
On a somewhat related note: I noticed that even for machines like e500-based
the post/lib_ppc/fpu is built unconditionally with -mhard-float (so we get
both -msoft-float and -mhard-float at the same time...). It doesn't bite as
long as the POST lib archive contents are not referenced, but I guess this
code shouldn't be built at all for FPU-less machines.
kind regards,
Rafal
^ permalink raw reply [flat|nested] 8+ messages in thread
* [U-Boot-Users] [PATCH] ppc: Refactor cache routines, so there is only one common set.
2008-01-09 21:33 [U-Boot-Users] [PATCH] ppc: Refactor cache routines, so there is only one common set Rafal Jaworowski
2008-01-10 2:25 ` Liu Dave
@ 2008-01-12 20:13 ` Wolfgang Denk
2008-01-12 20:37 ` Rafal Jaworowski
1 sibling, 1 reply; 8+ messages in thread
From: Wolfgang Denk @ 2008-01-12 20:13 UTC (permalink / raw)
To: u-boot
Dear Rafal,
in message <20080109213311.GA19373@semihalf.com> you wrote:
> Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
> ---
> cpu/mpc512x/start.S | 46 ----------------------------
> cpu/mpc83xx/start.S | 46 ----------------------------
> cpu/mpc85xx/start.S | 45 ---------------------------
> cpu/mpc86xx/start.S | 44 --------------------------
> cpu/ppc4xx/start.S | 33 --------------------
> lib_ppc/Makefile | 2 +-
> lib_ppc/ppccache.S | 84 +++++++++++++++++++++++++++++++++++++++++++++++++++
> 7 files changed, 85 insertions(+), 215 deletions(-)
> create mode 100644 lib_ppc/ppccache.S
There have been some changes reqested to this patch; can you estimate
if an updated patch will make it into this merge window?
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Don't panic.
^ permalink raw reply [flat|nested] 8+ messages in thread
* [U-Boot-Users] [PATCH] ppc: Refactor cache routines, so there is only one common set.
2008-01-12 20:13 ` Wolfgang Denk
@ 2008-01-12 20:37 ` Rafal Jaworowski
0 siblings, 0 replies; 8+ messages in thread
From: Rafal Jaworowski @ 2008-01-12 20:37 UTC (permalink / raw)
To: u-boot
Dear Wolfgang,
you wrote:
> in message <20080109213311.GA19373@semihalf.com> you wrote:
>> Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
>> ---
>> cpu/mpc512x/start.S | 46 ----------------------------
>> cpu/mpc83xx/start.S | 46 ----------------------------
>> cpu/mpc85xx/start.S | 45 ---------------------------
>> cpu/mpc86xx/start.S | 44 --------------------------
>> cpu/ppc4xx/start.S | 33 --------------------
>> lib_ppc/Makefile | 2 +-
>> lib_ppc/ppccache.S | 84 +++++++++++++++++++++++++++++++++++++++++++++++++++
>> 7 files changed, 85 insertions(+), 215 deletions(-)
>> create mode 100644 lib_ppc/ppccache.S
>
> There have been some changes reqested to this patch; can you estimate
> if an updated patch will make it into this merge window?
>
I will try to deliver an updated version early next week, so it would make it.
kind regards,
Rafal
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2008-01-15 14:06 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2008-01-09 21:33 [U-Boot-Users] [PATCH] ppc: Refactor cache routines, so there is only one common set Rafal Jaworowski
2008-01-10 2:25 ` Liu Dave
2008-01-10 5:53 ` Kumar Gala
2008-01-15 11:20 ` Rafal Jaworowski
2008-01-15 14:06 ` Kumar Gala
2008-01-15 11:13 ` Rafal Jaworowski
2008-01-12 20:13 ` Wolfgang Denk
2008-01-12 20:37 ` Rafal Jaworowski
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