From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ben Warren Date: Thu, 17 Jan 2008 20:42:53 -0500 Subject: [U-Boot-Users] [PATCH v2 1/2] Add support for a Freescale non-CPMSPI controller In-Reply-To: <58A20A281BAF1047B4EAE68DE5C0BDC2C52382@zch01exm21.fsl.freescale.net> References: <478ECD7F.4000709@gmail.com> <58A20A281BAF1047B4EAE68DE5C0BDC2C52382@zch01exm21.fsl.freescale.net> Message-ID: <4790041D.50500@gmail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Liu Dave wrote: >> +#if defined(CONFIG_MPC834X) || \ >> + defined(CONFIG_MPC8313) || \ >> + defined(CONFIG_MPC8315) || \ >> + defined(CONFIG_MPC837X) >> + >> +typedef struct spi8xxx >> +{ >> + u8 res0[0x20]; /* 0x0-0x01f reserved */ >> + u32 mode; /* mode register */ >> + u32 event; /* event register */ >> + u32 mask; /* mask register */ >> + u32 com; /* command register */ >> + u32 tx; /* transmit register */ >> + u32 rx; /* receive register */ >> + u8 res1[0xC8]; /* fill up to 0x100 */ >> +} spi8xxx_t; >> > > Ben, the sizeof(struct spi8xxx_t) should be 0x1000, > So, This will break 83xx immap, the DMA and PCI will be failed. > I will send one patch to fix it. > > Oh jeez. Sorry. I guess it should be res1[0xfc8]. Thanks for taking care of this Dave. regards, Ben