[U-Boot-Users] [MIPS] Extend MIPS_MAX_CACHE_SIZE upto 64kB

[U-Boot-Users] [MIPS] Extend MIPS_MAX_CACHE_SIZE upto 64kB

[Shinya Kuribayashi]

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
---

 cpu/mips/cache.S |    9 +++++----
 1 files changed, 5 insertions(+), 4 deletions(-)


diff --git a/cpu/mips/cache.S b/cpu/mips/cache.S
index bda9bb1..2998a3b 100644
--- a/cpu/mips/cache.S
+++ b/cpu/mips/cache.S
@@ -32,10 +32,11 @@
 
 #define RA		t8
 
-	/* 16KB is the maximum size of instruction and data caches on
-	 * MIPS 4K.
-	 */
-#define MIPS_MAX_CACHE_SIZE	0x4000
+/*
+ * 16kB is the maximum size of instruction and data caches on MIPS 4K,
+ * 64kB is on 4KE, 24K, 5K, 34K, etc. Set bigger size for convenience.
+ */
+#define MIPS_MAX_CACHE_SIZE	0x10000
 
 #define INDEX_BASE	KSEG0
 

[U-Boot-Users] [MIPS] Extend MIPS_MAX_CACHE_SIZE upto 64kB

[Shinya Kuribayashi]

Shinya Kuribayashi wrote:
> Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
> ---
> 
>  cpu/mips/cache.S |    9 +++++----
>  1 files changed, 5 insertions(+), 4 deletions(-)
> 
> 
> diff --git a/cpu/mips/cache.S b/cpu/mips/cache.S
> index bda9bb1..2998a3b 100644
> --- a/cpu/mips/cache.S
> +++ b/cpu/mips/cache.S
> @@ -32,10 +32,11 @@
>  
>  #define RA		t8
>  
> -	/* 16KB is the maximum size of instruction and data caches on
> -	 * MIPS 4K.
> -	 */
> -#define MIPS_MAX_CACHE_SIZE	0x4000
> +/*
> + * 16kB is the maximum size of instruction and data caches on MIPS 4K,
> + * 64kB is on 4KE, 24K, 5K, 34K, etc. Set bigger size for convenience.
> + */
> +#define MIPS_MAX_CACHE_SIZE	0x10000
>  
>  #define INDEX_BASE	KSEG0
>  

Revised patch is attached.

 - add some comments on L2 cache,
 - and cache.S is no longer 4K specific routines now!

================>

[MIPS] Extend MIPS_MAX_CACHE_SIZE upto 64kB

From: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
---

 cpu/mips/cache.S |   14 +++++++++-----
 1 files changed, 9 insertions(+), 5 deletions(-)


diff --git a/cpu/mips/cache.S b/cpu/mips/cache.S
index e6f3175..89ada71 100644
--- a/cpu/mips/cache.S
+++ b/cpu/mips/cache.S
@@ -1,5 +1,5 @@
 /*
- *  Cache-handling routined for MIPS 4K CPUs
+ *  Cache-handling routined for MIPS CPUs
  *
  *  Copyright (c) 2003	Wolfgang Denk <wd@denx.de>
  *
@@ -32,10 +32,14 @@
 
 #define RA		t8
 
-	/* 16KB is the maximum size of instruction and data caches on
-	 * MIPS 4K.
-	 */
-#define MIPS_MAX_CACHE_SIZE	0x4000
+/*
+ * 16kB is the maximum size of instruction and data caches on MIPS 4K,
+ * 64kB is on 4KE, 24K, 5K, etc. Set bigger size for convenience.
+ *
+ * Note that the above size is the maximum size of primary cache. U-Boot
+ * doesn't have L2 cache support for now.
+ */
+#define MIPS_MAX_CACHE_SIZE	0x10000
 
 #define INDEX_BASE	KSEG0