[U-Boot-Users] DDR-II @ MPC8343A

Andre Schwarz
2008-03-25T19:41:41Z

Kim Phillips schrieb:
> On Tue, 25 Mar 2008 18:36:47 +0100
> Andre Schwarz <andre.schwarz@matrix-vision.de> wrote:
>
>
>> All,
>>
>> has anyone set up the DDR-II controller on a Freescale MPC8343A without ?
>>
>
> without what?
>
>
typo - sorry.
>> As far as I can see there are only DDR-I boards from Freescale.
>>
>>
> The MDS can do ddr2:
>
> U-Boot 1.3.2-00097-gbc508d1 (Mar 25 2008 - 10:47:17) MPC83XX
>
> Reset Status: Software Hard, External/Internal Soft, External/Internal Hard
>
> CPU: e300c1, MPC8349E, Rev: 30 at 528 MHz, CSB: 264 MHz
> Board: Freescale MPC8349EMDS
> I2C: ready
> SPI: ready
> DRAM: 256 MB (DDR2, 64-bit, ECC on)
> ...
>
>
Hmmm ... I get :

U-Boot 1.3.2-00075-gc5f497a-dirty (Mar 25 2008 - 19:55:00) MPC83XX

Reset Status: Check Stop, External/Internal Soft, External/Internal Hard

CPU: e300c1, MPC8343, Rev: 31 at 399.999 MHz, CSB: 266 MHz
Board: Matrix Vision mvBlueLYNX-M7
I2C: ready
SPI: ready
DRAM: cs0_bnds = 0x0000000f
cs0_config = 0x80844102
DDR:bar=0x00000000
DDR:ar=0x8000001b
256 MB

It's a 32-Bit DDR-II without ECC.
2 Chips are soldered to CS0, i.e. no EPROM present.

Since I expect something like "(DDR2, 32-Bit, ECC off)" and nothing
happens there is obviously something wrong with my memory setup.
Is this reasonable ?

Or am I simply missing a board specific "board_add_ram_info" ?
Am I assuming right that your info string "(DDR2, 64-bit, ECC on)" comes
from spd_sdram ?
>> Are there any patches not yet posted to handle this ?
>>
>>
> should work, only diff I see is that the 8343 is 32-bit only.
>
> Kim
>
I'll dig a little deeper now and ask more questions tommorow.

Thanks for your help !

regards,
Andre

MATRIX VISION GmbH, Talstra?e 16, DE-71570 Oppenweiler - Registergericht: Amtsgericht Stuttgart, HRB 271090
Gesch?ftsf?hrer: Gerhard Thullner, Werner Armingeon, Uwe Furtner
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