[U-Boot-Users] [PATCH] Add Vitesse 8601 support to TSEC driver

[Andre Schwarz <andre.schwarz@matrix-vision.de>]

Tor,

after all my VSC8601 is up and running on MPC8343  :-)

I'm sorry to say that I don't find this patch ok after going through the 
manuals :

Register 0x17 is a very coarse setting. If the capabilities of the PHY 
should be taken into account and be configurable we should use the skew 
control in extended register 0x1c. This should be definable - 
CFG_VSC8601_SKEWFIX simply applies maximum skew ...

After all changing the bits in register 0x17 _require_ a soft reset by 
asserting bit 15 in register 0 before they are going to work.

Obviously this patch has no effect at all.
Do you reset the PHY manually after this configuration ?

This PHY definitely needs a proper setup function since there are quite 
interesting registers which need read-modify-write.


What do you think ?


regards,
Andre

Kim Phillips schrieb:
> On Mon, 31 Mar 2008 10:01:34 -0400
> Ben Warren <biggerbadderben@gmail.com> wrote:
>
>   
>> Tor Krill wrote:
>>     
>>> Add phy_info for Vitesse VSC8601.
>>> Add config option, CFG_VSC8601_SKEWFIX, to enable RGMII skew timing compensation.
>>>
>>> Signed-off-by: Tor Krill <tor@excito.com>
>>>   
>>>       
>> Acked-by: Ben Warren <biggerbadderben@gmail.com>
>>     
>
> I don't have a Vitesse 8601, so technically I can't ack it, but I can:
>
> Reviewed-by: Kim Phillips <kim.phillips@freescale.com>
>
> minor nit: it would be nice if the following:
>
>   
>>> +#ifdef CFG_VSC8601_SKEWFIX
>>> +				{MIIM_VSC8601_EPHY_CON,MIIM_VSC8601_EPHY_CON_INIT_SKEW,NULL},
>>> +#endif
>>>       
>
> were made to have spaces after commas, and flow onto a separate
> line so as to not be a 96 char line..
>
> Kim
>
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