From mboxrd@z Thu Jan 1 00:00:00 1970 From: Scott Wood Date: Mon, 19 May 2008 15:36:15 -0500 Subject: [U-Boot-Users] [PATCH] mips: tolerate the MIPS 'CFG_HZ' valuesin the MHZ range for NAND delays In-Reply-To: <1211229110.3617.2.camel@mcmullan-linux.cifs.lab.netapp.com> References: <20080519201124.6F09D10376@mcmullan-linux.hq.netapp.com> <4831E28E.5060005@freescale.com> <1211229110.3617.2.camel@mcmullan-linux.cifs.lab.netapp.com> Message-ID: <4831E4BF.3020306@freescale.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de McMullan, Jason wrote: > On Mon, 2008-05-19 at 15:26 -0500, Scott Wood wrote: >> Even though it's MIPS that needs it, it should be flagged as a NAND >> patch since that's the code it touches. > > Totally agree. > >> How about this? >> >> if (state == FL_ERASING) >> timeo = CFG_HZ * 2 / 5; >> else >> timeo = CFG_HZ / 50 >> >> If we have CFG_HZ values that are within a factor of 2 of wrapping >> around, the platform should probably do some downward scaling (or we >> should think about 64-bit timestamps)... > > > Much better than my original patch. Should I revert, retry, and resend? Sure. -Scott