From mboxrd@z Thu Jan  1 00:00:00 1970
From: Scott Wood <scottwood@freescale.com>
Date: Mon, 19 May 2008 15:43:17 -0500
Subject: [U-Boot-Users] [PATCH] mips: tolerate the MIPS 'CFG_HZ' values
 in the MHZ range for NAND delays
In-Reply-To: <20080519203922.6438D2476E@gemini.denx.de>
References: <20080519203922.6438D2476E@gemini.denx.de>
Message-ID: <4831E665.3030003@freescale.com>
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To: u-boot@lists.denx.de

Wolfgang Denk wrote:
> In message <4831E28E.5060005@freescale.com> you wrote:
>> if (state == FL_ERASING)
>> 	timeo = CFG_HZ * 2 / 5;
>> else
>> 	timeo = CFG_HZ / 50
>>
>> If we have CFG_HZ values that are within a factor of 2 of wrapping 
>> around, the platform should probably do some downward scaling (or we 
>> should think about 64-bit timestamps)...
> 
> Not needed. CFG_HZ == 1000 for all sane ports.
> 
> Broken ports should be fixed.

Maybe we should define it in a non-board-specific header, so as to make 
the intent clear that it not actually be configurable?

-Scott