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* [U-Boot-Users] [PATCH][resubmit] MPC85xx, MPC83xx: Add/Fix UPM configuration support
@ 2008-05-19 16:05 David Saada
  2008-05-19 19:32 ` Jerry Van Baren
                   ` (2 more replies)
  0 siblings, 3 replies; 12+ messages in thread
From: David Saada @ 2008-05-19 16:05 UTC (permalink / raw)
  To: u-boot

Add support for UPM configuration on the 85xx platform.
In addition, on the MPC83xx, remove MPC834x precompiler condition, in order to support all MPC83xx processors.

Signed-off-by: David Saada <david.saada@ecitele.com>

cpu/mpc83xx/cpu.c |    5 ----
cpu/mpc85xx/cpu.c |   66 ++++++++++++++++++++++++++++++++++++++++++++++++++++++
include/mpc85xx.h |    7 ++++-
3 files changed, 72 insertions(+), 6 deletions(-)

--- a/cpu/mpc83xx/cpu.c 2008-05-15 01:42:46.000000000 +0300
+++ b/cpu/mpc83xx/cpu.c 2008-05-18 11:22:34.503036000 +0300
@@ -147,7 +147,6 @@ int checkcpu(void)
  */
 void upmconfig (uint upm, uint *table, uint size)
 {
-#if defined(CONFIG_MPC834X)
        volatile immap_t *immap = (immap_t *) CFG_IMMR;
        volatile lbus83xx_t *lbus = &immap->lbus;
        volatile uchar *dummy = NULL;
@@ -180,10 +179,6 @@ void upmconfig (uint upm, uint *table, u

        /* Set the OP field in the MxMR to "normal" and the MAD field to 000000 */
        *mxmr &= 0xCFFFFFC0;
-#else
-       printf("Error: %s() not defined for this configuration.\n", __FUNCTION__);
-       hang();
-#endif
 }


--- a/cpu/mpc85xx/cpu.c 2008-05-15 01:42:46.000000000 +0300
+++ b/cpu/mpc85xx/cpu.c 2008-05-18 11:22:34.528046000 +0300
@@ -29,6 +29,7 @@
 #include <watchdog.h>
 #include <command.h>
 #include <asm/cache.h>
+#include "asm/immap_85xx.h"

 DECLARE_GLOBAL_DATA_PTR;

@@ -274,3 +275,68 @@ int dma_xfer(void *dest, uint count, voi
        return dma_check();
 }
 #endif
+
+/*
+ * Program a UPM with the code supplied in the table.
+ *
+ * The 'dummy' variable is used to increment the MAD. 'dummy' is
+ * supposed to be a pointer to the memory of the device being
+ * programmed by the UPM.  The data in the MDR is written into
+ * memory and the MAD is incremented every time there's a read
+ * from 'dummy'. Unfortunately, the current prototype for this
+ * function doesn't allow for passing the address of this
+ * device, and changing the prototype will break a number lots
+ * of other code, so we need to use a round-about way of finding
+ * the value for 'dummy'.
+ *
+ * The value can be extracted from the base address bits of the
+ * Base Register (BR) associated with the specific UPM.  To find
+ * that BR, we need to scan all BRs until we find the one that
+ * has its MSEL bits matching the UPM we want.  Once we know the
+ * right BR, we can extract the base address bits from it.
+ *
+ * The MxMR and the BR and OR of the chosen bank should all be
+ * configured before calling this function.
+ *
+ * Parameters:
+ * upm: 0=UPMA, 1=UPMB, 2=UPMC
+ * table: Pointer to an array of values to program
+ * size: Number of elements in the array.  Must be 64 or less.
+ */
+void upmconfig (uint upm, uint *table, uint size)
+{
+    volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR);
+       volatile uchar *dummy = NULL;
+       const u32 msel = (upm + 4) << BRx_MS_SHIFT; /* What the MSEL field in BRn should be */
+       volatile uint *mxmr = &lbc->mamr + upm; /* Pointer to mamr, mbmr, or mcmr */
+       volatile uint *brx = &lbc->br0; /* Pointer to BRx */
+       uint i;
+
+       /* Scan all the banks to determine the base address of the device */
+       for (i = 0; i < 8; i++) {
+               if ((*brx & BRx_MS_MSK) == msel) {
+                       dummy = (uchar *) (*brx & BRx_BA_MSK);
+                       break;
+               }
+               brx += 2; /* Skip to next BRx */
+       }
+
+       if (!dummy) {
+               printf("Error: %s() could not find matching BR\n", __FUNCTION__);
+               hang();
+       }
+
+       /* Set the OP field in the MxMR to "write" and the MAD field to 000000 */
+       *mxmr = (*mxmr & 0xCFFFFFC0) | MxMR_OP_WARR;
+
+       for (i = 0; i < size; i++) {
+               lbc->mdr = table[i];
+               __asm__ __volatile__ ("sync");
+               *dummy; /* Write the value to memory and increment MAD */
+               __asm__ __volatile__ ("sync");
+       }
+
+       /* Set the OP field in the MxMR to "normal" and the MAD field to 000000 */
+       *mxmr &= 0xCFFFFFC0;
+}
+
--- a/include/mpc85xx.h 2008-05-15 01:42:46.000000000 +0300
+++ b/include/mpc85xx.h 2008-05-18 11:22:34.519035000 +0300
@@ -35,7 +35,10 @@
 #define BRx_MS_UPMA    0x00000080      /* U.P.M.A Machine Select       */
 #define BRx_MS_UPMB    0x000000a0      /* U.P.M.B Machine Select       */
 #define BRx_MS_UPMC    0x000000c0      /* U.P.M.C Machine Select       */
+#define BRx_MS_MSK     0x000000e0      /* Machine select mask */
+#define BRx_MS_SHIFT   5               /* Machine select shift */
 #define BRx_PS_8       0x00000800      /*  8 bit port size             */
+#define BRx_PS_16      0x00001000      /* 16 bit port size             */
 #define BRx_PS_32      0x00001800      /* 32 bit port size             */
 #define BRx_BA_MSK     0xffff8000      /* Base Address Mask            */

@@ -53,8 +56,10 @@
 #define ORxU_AM_MSK    0xffff8000      /* Address Mask Mask            */

 #define MxMR_OP_NORM   0x00000000      /* Normal Operation             */
-#define MxMR_DSx_2_CYCL 0x00400000     /* 2 cycle Disable Period       */
 #define MxMR_OP_WARR   0x10000000      /* Write to Array               */
+#define MxMR_DSx_2_CYCL 0x00400000     /* 2 cycle Disable Period       */
+#define MxMR_DSx_3_CYCL 0x00800000     /* 3 cycle Disable Period       */
+#define MxMR_GPL4_LPWT  0x00040000     /* LGPL4 Line in LUPWAIT mode   */
 #define MxMR_BSEL      0x80000000      /* Bus Select                   */

 /* helpers to convert values into an OR address mask (GPCM mode) */

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^ permalink raw reply	[flat|nested] 12+ messages in thread
* [U-Boot-Users]  [PATCH][resubmit] MPC85xx, MPC83xx: Add/Fix UPM configuration support
@ 2008-03-31  8:47 David Saada
  0 siblings, 0 replies; 12+ messages in thread
From: David Saada @ 2008-03-31  8:47 UTC (permalink / raw)
  To: u-boot


Add support for UPM configuration on the 85xx platform.
In addition, on the MPC83xx, remove MPC834x precompiler condition, in order
to support all MPC83xx processors.

Signed-off-by: David Saada <david.saada@ecitele.com>

 cpu/mpc83xx/cpu.c |    5 ----
 cpu/mpc85xx/cpu.c |   66
++++++++++++++++++++++++++++++++++++++++++++++++++++++
 include/mpc85xx.h |    7 ++++-
 3 files changed, 72 insertions(+), 6 deletions(-)

--- a/cpu/mpc83xx/cpu.c	2008-03-28 01:49:12.000000000 +0200
+++ b/cpu/mpc83xx/cpu.c	2008-03-30 16:56:59.356834000 +0300
@@ -227,7 +227,6 @@ int checkcpu(void)
  */
 void upmconfig (uint upm, uint *table, uint size)
 {
-#if defined(CONFIG_MPC834X)
 	volatile immap_t *immap = (immap_t *) CFG_IMMR;
 	volatile lbus83xx_t *lbus = &immap->lbus;
 	volatile uchar *dummy = NULL;
@@ -260,10 +259,6 @@ void upmconfig (uint upm, uint *table, u
 
 	/* Set the OP field in the MxMR to "normal" and the MAD field to 000000 */
 	*mxmr &= 0xCFFFFFC0;
-#else
-	printf("Error: %s() not defined for this configuration.\n", __FUNCTION__);
-	hang();
-#endif
 }
 
 
--- a/include/mpc85xx.h	2008-03-28 01:49:12.000000000 +0200
+++ b/include/mpc85xx.h	2008-03-30 16:57:12.746549000 +0300
@@ -35,7 +35,10 @@
 #define BRx_MS_UPMA	0x00000080	/* U.P.M.A Machine Select	*/
 #define BRx_MS_UPMB	0x000000a0	/* U.P.M.B Machine Select	*/
 #define BRx_MS_UPMC	0x000000c0	/* U.P.M.C Machine Select	*/
+#define BRx_MS_MSK	0x000000e0	/* Machine select mask */
+#define BRx_MS_SHIFT	5		/* Machine select shift */
 #define BRx_PS_8	0x00000800	/*  8 bit port size		*/
+#define BRx_PS_16	0x00001000	/* 16 bit port size		*/
 #define BRx_PS_32	0x00001800	/* 32 bit port size		*/
 #define BRx_BA_MSK	0xffff8000	/* Base Address Mask		*/
 
@@ -53,8 +56,10 @@
 #define ORxU_AM_MSK	0xffff8000	/* Address Mask Mask		*/
 
 #define MxMR_OP_NORM	0x00000000	/* Normal Operation		*/
-#define MxMR_DSx_2_CYCL 0x00400000	/* 2 cycle Disable Period	*/
 #define MxMR_OP_WARR	0x10000000	/* Write to Array		*/
+#define MxMR_DSx_2_CYCL 0x00400000	/* 2 cycle Disable Period	*/
+#define MxMR_DSx_3_CYCL 0x00800000	/* 3 cycle Disable Period	*/
+#define MxMR_GPL4_LPWT  0x00040000	/* LGPL4 Line in LUPWAIT mode	*/
 #define MxMR_BSEL	0x80000000	/* Bus Select			*/
 
 /* helpers to convert values into an OR address mask (GPCM mode) */
--- a/cpu/mpc85xx/cpu.c	2008-03-31 10:51:10.511187000 +0300
+++ b/cpu/mpc85xx/cpu.c	2008-03-31 10:52:27.636876000 +0300
@@ -29,6 +29,7 @@
 #include <watchdog.h>
 #include <command.h>
 #include <asm/cache.h>
+#include "asm/immap_85xx.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -275,3 +276,68 @@ int dma_xfer(void *dest, uint count, voi
 	return dma_check();
 }
 #endif
+
+/*
+ * Program a UPM with the code supplied in the table.
+ *
+ * The 'dummy' variable is used to increment the MAD. 'dummy' is
+ * supposed to be a pointer to the memory of the device being
+ * programmed by the UPM.  The data in the MDR is written into
+ * memory and the MAD is incremented every time there's a read
+ * from 'dummy'. Unfortunately, the current prototype for this
+ * function doesn't allow for passing the address of this
+ * device, and changing the prototype will break a number lots
+ * of other code, so we need to use a round-about way of finding
+ * the value for 'dummy'.
+ *
+ * The value can be extracted from the base address bits of the
+ * Base Register (BR) associated with the specific UPM.  To find
+ * that BR, we need to scan all BRs until we find the one that
+ * has its MSEL bits matching the UPM we want.  Once we know the
+ * right BR, we can extract the base address bits from it.
+ *
+ * The MxMR and the BR and OR of the chosen bank should all be
+ * configured before calling this function.
+ *
+ * Parameters:
+ * upm: 0=UPMA, 1=UPMB, 2=UPMC
+ * table: Pointer to an array of values to program
+ * size: Number of elements in the array.  Must be 64 or less.
+ */
+void upmconfig (uint upm, uint *table, uint size)
+{
+    volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR);
+	volatile uchar *dummy = NULL;
+	const u32 msel = (upm + 4) << BRx_MS_SHIFT; /* What the MSEL field in BRn
should be */
+	volatile uint *mxmr = &lbc->mamr + upm;	/* Pointer to mamr, mbmr, or mcmr
*/
+	volatile uint *brx = &lbc->br0;	/* Pointer to BRx */
+	uint i;
+
+	/* Scan all the banks to determine the base address of the device */
+	for (i = 0; i < 8; i++) {
+		if ((*brx & BRx_MS_MSK) == msel) {
+			dummy = (uchar *) (*brx & BRx_BA_MSK);
+			break;
+		}
+		brx += 2; /* Skip to next BRx */
+	}
+
+	if (!dummy) {
+		printf("Error: %s() could not find matching BR\n", __FUNCTION__);
+		hang();
+	}
+
+	/* Set the OP field in the MxMR to "write" and the MAD field to 000000 */
+	*mxmr = (*mxmr & 0xCFFFFFC0) | MxMR_OP_WARR;
+
+	for (i = 0; i < size; i++) {
+		lbc->mdr = table[i];
+		__asm__ __volatile__ ("sync");
+		*dummy;	/* Write the value to memory and increment MAD */
+		__asm__ __volatile__ ("sync");
+	}
+
+	/* Set the OP field in the MxMR to "normal" and the MAD field to 000000 */
+	*mxmr &= 0xCFFFFFC0;
+}
+

-- 
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^ permalink raw reply	[flat|nested] 12+ messages in thread
end of thread, other threads:[~2008-06-15 12:26 UTC | newest]

Thread overview: 12+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2008-05-19 16:05 [U-Boot-Users] [PATCH][resubmit] MPC85xx, MPC83xx: Add/Fix UPM configuration support David Saada
2008-05-19 19:32 ` Jerry Van Baren
2008-05-20  7:15   ` David Saada
2008-05-20 12:44     ` Jerry Van Baren
2008-05-20 15:50       ` Kim Phillips
     [not found]       ` <2acbd3e40805200827x241dfd49v2bb620935f73d71b@mail.gmail.com>
2008-05-20 16:07         ` Jerry Van Baren
2008-05-19 22:26 ` Kim Phillips
2008-05-20  7:32   ` David Saada
2008-05-20 15:45     ` Kim Phillips
2008-06-11 21:21 ` Andy Fleming
2008-06-15 12:26   ` David Saada
  -- strict thread matches above, loose matches on Subject: below --
2008-03-31  8:47 David Saada

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