From: Jerry Van Baren <gerald.vanbaren@ge.com>
To: u-boot@lists.denx.de
Subject: [U-Boot-Users] [RFC][FSL DDR 1/8] Add proper SPD definitions for DDR1/2/3
Date: Mon, 09 Jun 2008 17:03:04 -0400 [thread overview]
Message-ID: <484D9A88.2030805@ge.com> (raw)
In-Reply-To: <1213041322-5456-2-git-send-email-galak@kernel.crashing.org>
Kumar Gala wrote:
> Also added a few helper functions for DDR1 & DDR2 to print SPD info and
> verify the checksum.
>
> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
> ---
> common/Makefile | 1 +
> common/ddr_spd.c | 504 +++++++++++++++++++++++++++++++++++++++++++++++++++++
> include/ddr_spd.h | 249 ++++++++++++++++++++++++++
> 3 files changed, 754 insertions(+), 0 deletions(-)
> create mode 100644 common/ddr_spd.c
> create mode 100644 include/ddr_spd.h
>
> diff --git a/common/Makefile b/common/Makefile
> index b425795..503c3b5 100644
> --- a/common/Makefile
> +++ b/common/Makefile
> @@ -145,6 +145,7 @@ COBJS-y += cmd_mac.o
> COBJS-$(CONFIG_CMD_MFSL) += cmd_mfsl.o
> COBJS-$(CONFIG_MP) += cmd_mp.o
> COBJS-$(CONFIG_CMD_SF) += cmd_sf.o
> +COBJS-$(CONFIG_DDR_SPD) += ddr_spd.o
>
> COBJS := $(COBJS-y)
> SRCS := $(AOBJS:.o=.S) $(COBJS:.o=.c)
> diff --git a/common/ddr_spd.c b/common/ddr_spd.c
> new file mode 100644
> index 0000000..bfabb93
> --- /dev/null
> +++ b/common/ddr_spd.c
> @@ -0,0 +1,504 @@
> +/*
> + * Copyright 2008 Freescale Semiconductor, Inc.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * Version 2 as published by the Free Software Foundation.
> + */
> +
> +#include <common.h>
> +#include <ddr_spd.h>
> +
> +void
> +ddr1_spd_dump(const ddr1_spd_eeprom_t *spd)
[major snippage]
Hi Kumar,
There is a "do_sdram" command in common/cmd_i2c.c that I believe is
doing the same thing, but probably a lot less (I suspect the command is
showing its age).
#if defined(CONFIG_CMD_SDRAM)
U_BOOT_CMD(
isdram, 2, 1, do_sdram,
"isdram - print SDRAM configuration information\n",
"chip\n - print SDRAM configuration information\n"
" (valid chip values 50..57)\n"
);
#endif
Are you aware of that command? Is your SPD dump going to supersede it?
Best regards,
gvb
next prev parent reply other threads:[~2008-06-09 21:03 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-06-09 19:55 [U-Boot-Users] [RFC][FSL DDR 0/8] Freescale DDR rewrite Kumar Gala
2008-06-09 19:55 ` [U-Boot-Users] [RFC][FSL DDR 1/8] Add proper SPD definitions for DDR1/2/3 Kumar Gala
2008-06-09 19:55 ` [U-Boot-Users] [RFC][FSL DDR 2/8] Rewrite the FSL mpc8xxx DDR controller setup code Kumar Gala
2008-06-09 19:55 ` [U-Boot-Users] [RFC][FSL DDR 3/8] FSL DDR: Add interactive DDR config support Kumar Gala
2008-06-09 19:55 ` [U-Boot-Users] [RFC][FSL DDR 4/8] FSL DDR: Provide a generic fsl_ddr_sdram_set_lawbar() Kumar Gala
2008-06-09 19:55 ` [U-Boot-Users] [RFC][FSL DDR 5/8] FSL DDR: Add e500 TLB helper for DDR code Kumar Gala
2008-06-09 19:55 ` [U-Boot-Users] [RFC][FSL DDR 6/8] Modify mpc8641HPCN to use the new DDR setup code Kumar Gala
2008-06-09 19:55 ` [U-Boot-Users] [RFC][FSL DDR 7/8] Modify MPC8610HPCD " Kumar Gala
2008-06-09 19:55 ` [U-Boot-Users] [RFC][FSL DDR 8/8] Modify MPC8544 DS " Kumar Gala
2008-06-09 21:03 ` Jerry Van Baren [this message]
2008-06-09 21:10 ` [U-Boot-Users] [RFC][FSL DDR 1/8] Add proper SPD definitions for DDR1/2/3 Jon Loeliger
2008-07-05 22:32 ` [U-Boot-Users] [RFC][FSL DDR 0/8] Freescale DDR rewrite Wolfgang Denk
2008-07-07 15:48 ` Jon Loeliger
2008-07-07 16:01 ` Kumar Gala
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