* [U-Boot-Users] Using DDR1 in AMCC 460EX custom design
2008-06-30 18:32 [U-Boot-Users] Using DDR1 in AMCC 460EX custom design Felix Radensky
@ 2008-06-30 18:46 ` David Hawkins
2008-06-30 18:51 ` Stefan Roese
1 sibling, 0 replies; 5+ messages in thread
From: David Hawkins @ 2008-06-30 18:46 UTC (permalink / raw)
To: u-boot
Hi Felix,
> I will soon have to port U-Boot to a custom board based on AMCC 460EX CPU.
> This board should be very close to Canyonlands evaluation board, but board
> designers decided to use DDR1 instead of DDR2 present on Canyonlands.
>
> Looking at U-Boot 1.3.3 code, I can see that DDR1 support for 460EX is
> available
> in cpu/ppc4xx/cp44x_spd_ddr2.c. My question is - was DDR1 support ever
> tested
> on 460EX. Another question is - are there DDR1 DIMMs that can be used on
> Canyonlands ?
DDR1/DDR2 support is available on many processors, but the
hardware layout is memory specific.
I don't have a Canyonlands board, but if it was designed for
DDR2, then it will be setup with a 1.8V DDR supply and 0.9V
VTT supply, so you will *not* be able to use DDR1 DIMMs
on that specific hardware implementation.
A DDR1 board would be designed to use a 2.5V DDR supply,
and 1.25V VTT termination voltage, along with lots of
termination resistors.
So if you have DDR1 on your board, you will need to work out
the DDR1 settings. If the layout of your board is identical
to the Canyonlands board, then likely you can copy all that
boards general settings, and then apply the DDR1 specific
settings. If you board layout is different, then you'll need
to start from scratch - which isn't that hard.
One thing that can really help in determining the DDR1
settings required, is a board-level post-layout simulation.
Your hardware engineer should have performed a simulation
during board layout to make sure the clock delays and
voltage ringing on the transmission lines was all in spec.
So there should be some useful information there for you.
For example, I am using a Freescale MPC8349EA PowerQUICC II
Pro. It has clock and data-strobe adjustment registers,
which we use to align the clock and data correctly. We
had to make sure there would be a valid setting that would
work for us, based on the relative clock-and-data timing
shown in the post-layout simulations. As far as customizing
the DDR setup relative to a Freescale evaluation board,
I pretty much copied the basic settings, and then adjusted
the drive-strength and clock-alignment for my specific
layout.
You'll have to do something similar.
Cheers,
Dave
^ permalink raw reply [flat|nested] 5+ messages in thread
* [U-Boot-Users] Using DDR1 in AMCC 460EX custom design
2008-06-30 18:32 [U-Boot-Users] Using DDR1 in AMCC 460EX custom design Felix Radensky
2008-06-30 18:46 ` David Hawkins
@ 2008-06-30 18:51 ` Stefan Roese
2008-07-01 8:06 ` Felix Radensky
1 sibling, 1 reply; 5+ messages in thread
From: Stefan Roese @ 2008-06-30 18:51 UTC (permalink / raw)
To: u-boot
Hi Felix,
On Monday 30 June 2008, Felix Radensky wrote:
> I will soon have to port U-Boot to a custom board based on AMCC 460EX CPU.
> This board should be very close to Canyonlands evaluation board, but board
> designers decided to use DDR1 instead of DDR2 present on Canyonlands.
>
> Looking at U-Boot 1.3.3 code, I can see that DDR1 support for 460EX is
> available
> in cpu/ppc4xx/cp44x_spd_ddr2.c. My question is - was DDR1 support ever
> tested
> on 460EX.
No, not from me while porting to Canyonlands. Could be that AMCC tested it on
their 460EX Maple reference design. Please contact AMCC on this.
As you already noticed, cpu/ppc4xx/cp44x_spd_ddr2.c has some DDR1 support. But
I'm not sure if this will work "right out of the box". Could be that some
changes are needed.
> Another question is - are there DDR1 DIMMs that can be used on
> Canyonlands ?
No. This is not possible.
Best regards,
Stefan
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^ permalink raw reply [flat|nested] 5+ messages in thread