From mboxrd@z Thu Jan  1 00:00:00 1970
From: Andre Schwarz <andre.schwarz@matrix-vision.de>
Date: Tue, 26 Aug 2008 15:26:16 +0200
Subject: [U-Boot] MPC83xx DDR Controller setup
Message-ID: <48B40478.8060606@matrix-vision.de>
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To: u-boot@lists.denx.de

Kim,

can you (or anybody else) tell me what the following bit means on MPC834x ?
Actually it's set inside the CLK_CNTL register of the DDR controller.
It's completely missing in my (latest) datasheet's register definition ...

include/mpc83xx.h:#define DDR_SDRAM_CLK_CNTL_SS_EN              0x80000000



regards,
Andre

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