[U-Boot] [PATCH] ppc4xx - allow usage of fixed/unmanaged PHYs

[U-Boot] [PATCH] ppc4xx - allow usage of fixed/unmanaged PHYs

[Wolfgang Ocker]

This patch allows a managed switch like the 88E6083 to be directly
connected to a 4xx using PHY mode.

It avoids waiting for a link (it's always there) and uses fixed values
for speed and duplex mode since both settings are hardware controlled.

Should I use "FIXED" instead of "UNMANAGED" (so called in the kernel
afair)?

---
Support unmanaged/fixed PHYs like port 8/9 of Marvell 88E6083 on 4xx.
    
Added config vars CONFIG_UNMANAGED_PHY, CONFIG_UNMANAGED_PHY_SPEED
and CONFIG_UNMANAGED_PHY_FULL_DUPLEX to allow unmanaged PHYs
and to configure the settings for speed and duplex mode.

Signed-off-by: Wolfgang Ocker <weo@reccoware.de>

---
 cpu/ppc4xx/4xx_enet.c |    8 +++++++-
 1 files changed, 7 insertions(+), 1 deletions(-)

diff --git a/cpu/ppc4xx/4xx_enet.c b/cpu/ppc4xx/4xx_enet.c
index 8a38335..3b32fa5 100644
--- a/cpu/ppc4xx/4xx_enet.c
+++ b/cpu/ppc4xx/4xx_enet.c
@@ -800,7 +800,9 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis)
 	unsigned long failsafe;
 	unsigned mode_reg;
 	unsigned short devnum;
+#ifndef CONFIG_UNMANAGED_PHY
 	unsigned short reg_short;
+#endif
 #if defined(CONFIG_440GX) || \
     defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
     defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \
@@ -945,6 +947,7 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis)
 	out_be32((void *)EMAC_M1 + hw_p->hw_addr, mode_reg);
 #endif /* defined(CONFIG_440GX) || defined(CONFIG_440SP) */
 
+#ifndef CONFIG_UNMANAGED_PHY
 	/* wait for PHY to complete auto negotiation */
 	reg_short = 0;
 #ifndef CONFIG_CS8952_PHY
@@ -1082,7 +1085,10 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis)
 
 	speed = miiphy_speed (dev->name, reg);
 	duplex = miiphy_duplex (dev->name, reg);
-
+#else /* !CONFIG_UNMANAGED_PHY */
+	speed = CONFIG_UNMANAGED_PHY_SPEED;
+	duplex = CONFIG_UNMANAGED_PHY_FULL_DUPLEX ? FULL : HALF;
+#endif
 	if (hw_p->print_speed) {
 		hw_p->print_speed = 0;
 		printf ("ENET Speed is %d Mbps - %s duplex connection (EMAC%d)\n",

[U-Boot] [PATCH] ppc4xx - allow usage of fixed/unmanaged PHYs

[Wolfgang Denk]

Dear Wolfgang Ocker,

In message <1219774284.3294.52.camel@galileo.recco.de> you wrote:
> This patch allows a managed switch like the 88E6083 to be directly
> connected to a 4xx using PHY mode.
> 
> It avoids waiting for a link (it's always there) and uses fixed values
> for speed and duplex mode since both settings are hardware controlled.

How does this patch work in configurations which have such  a  switch
attached  to  one  network interface, but a normal PHY to one or more
other interfaces?

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
You said you  didn't  want  to  use  CGI.pm,  but  methinks  you  are
needlessly reinventing the wheel, one spoke at a time. Either you are
masochistic,  or  you  just haven't seen enough of what CGI.pm can do
for you. -- Randal L. Schwartz in <8cyb81rg81.fsf@gadget.cscaper.com>

[U-Boot] [PATCH] ppc4xx - allow usage of fixed/unmanaged PHYs

[Grant Erickson]

On 8/26/08 11:11 AM, Wolfgang Ocker wrote:
> This patch allows a managed switch like the 88E6083 to be directly
> connected to a 4xx using PHY mode.
> 
> It avoids waiting for a link (it's always there) and uses fixed values
> for speed and duplex mode since both settings are hardware controlled.
> 
> Should I use "FIXED" instead of "UNMANAGED" (so called in the kernel
> afair)?
> 
> ---
> Support unmanaged/fixed PHYs like port 8/9 of Marvell 88E6083 on 4xx.
>     
> Added config vars CONFIG_UNMANAGED_PHY, CONFIG_UNMANAGED_PHY_SPEED
> and CONFIG_UNMANAGED_PHY_FULL_DUPLEX to allow unmanaged PHYs
> and to configure the settings for speed and duplex mode.
> 
> Signed-off-by: Wolfgang Ocker <weo@reccoware.de>

Wolfgang:

Are ports 8/9 truly "unmanaged" or are they like ports 4/5 on the M88E6061
in which the ports have MDIO/MII interfaces but do not follow IEEE register
conventions?

If the former, then I think it is better to just pull the speed and duplex
settings from the switch and pass them up to the 4xx Ethernet driver. In my
situation, I did as shown below. It is likely more invasive than your
approach; however, it ensures that software follows what the hardware is
strapped to.

diff -aruN u-boot-1.3.2/cpu/ppc4xx/4xx_enet.c
u-boot-1.3.2.N/cpu/ppc4xx/4xx_enet.c
--- u-boot-1.3.2/cpu/ppc4xx/4xx_enet.c    2008-05-15 16:16:22.000000000
-0700
+++ u-boot-1.3.2.N/cpu/ppc4xx/4xx_enet.c    2008-05-15 16:15:47.000000000
-0700
@@ -92,6 +92,10 @@
 #include <malloc.h>
 #include <asm/ppc4xx-intvec.h>
 
+#if defined(CONFIG_M88E6061)
+#include <m88e6061.h>
+#endif
+
 /*
  * Only compile for platform with AMCC EMAC ethernet controller and
  * network support enabled.
@@ -903,7 +907,7 @@
 
     /* wait for PHY to complete auto negotiation */
     reg_short = 0;
-#ifndef CONFIG_CS8952_PHY
+#if !defined(CONFIG_CS8952_PHY) && !defined(CONFIG_M88E6061)
     switch (devnum) {
     case 0:
         reg = CONFIG_PHY_ADDR;
@@ -941,7 +945,7 @@
         miiphy_write (dev->name, reg, 0x18, 0x4101);
         miiphy_write (dev->name, reg, 0x09, 0x0e00);
         miiphy_write (dev->name, reg, 0x04, 0x01e1);
-#endif
+#endif /* defined(CONFIG_M88E1111_PHY) */
         miiphy_reset (dev->name, reg);
 
 #if defined(CONFIG_440GX) || \
@@ -960,7 +964,7 @@
             miiphy_write (dev->name, reg, 23, 0x1300);
 #else
             miiphy_write (dev->name, reg, 23, 0x1000);
-#endif
+#endif /* defined(CONFIG_CIS8201_SHORT_ETCH) */
             /*
              * Vitesse VSC8201/Cicada CIS8201 errata:
              * Interoperability problem with Intel 82547EI phys
@@ -978,7 +982,7 @@
             miiphy_write (dev->name, reg, 0x1f, 0x0000);
             /* end Vitesse/Cicada errata */
         }
-#endif
+#endif /* defined(CONFIG_CIS8201_PHY) */
 
 #if defined(CONFIG_ET1011C_PHY)
         /*
@@ -997,9 +1001,8 @@
 
             miiphy_write(dev->name, reg, 0x1c, 0x74f0);
         }
-#endif
-
-#endif
+#endif /* defined(CONFIG_ET1011C_PHY) */
+#endif /*defined(CONFIG_440GX) || ... || defined(CONFIG_405EX) */
         /* Start/Restart autonegotiation */
         phy_setup_aneg (dev->name, reg);
         udelay (1000);
@@ -1034,10 +1038,15 @@
         puts (" done\n");
         udelay (500000);    /* another 500 ms (results in faster booting)
*/
     }
-#endif /* #ifndef CONFIG_CS8952_PHY */
+#endif /* !defined(CONFIG_CS8952_PHY) && !defined(CONFIG_M88E6061) */
 
+#if defined(CONFIG_M88E6061)
+    speed = m88e6061_speed (dev->name, CFG_M88E6061_CPU_PORT);
+    duplex = m88e6061_duplex (dev->name, CFG_M88E6061_CPU_PORT);
+#else
     speed = miiphy_speed (dev->name, reg);
     duplex = miiphy_duplex (dev->name, reg);
+#endif /* defined(CONFIG_M88E6061) */
 
     if (hw_p->print_speed) {
         hw_p->print_speed = 0;

Regards,

Grant

[U-Boot] [PATCH] ppc4xx - allow usage of fixed/unmanaged PHYs

[Wolfgang Ocker]

Hi Wolfgang!

On Tue, 2008-08-26 at 20:52 +0200, Wolfgang Denk wrote:
> In message <1219774284.3294.52.camel@galileo.recco.de> you wrote:
> > This patch allows a managed switch like the 88E6083 to be directly
> > connected to a 4xx using PHY mode.
> > 
> > It avoids waiting for a link (it's always there) and uses fixed values
> > for speed and duplex mode since both settings are hardware controlled.
> 
> How does this patch work in configurations which have such  a  switch
> attached  to  one  network interface, but a normal PHY to one or more
> other interfaces?

It does not work. I guess you have to further increase complexity and
handle all the possible configurations (devnum + CONFIG_PHYx_UNMANAGED
etc., analogous to the phy address).

In case I interpret the code correctly, different kinds of PHYs on a
board are not supported in general.

Thanks,
Wolfgang

[U-Boot] [PATCH] ppc4xx - allow usage of fixed/unmanaged PHYs

[Wolfgang Ocker]

Hello Grant!

On Tue, 2008-08-26 at 12:12 -0700, Grant Erickson wrote:
> Are ports 8/9 truly "unmanaged" or are they like ports 4/5 on the M88E6061
> in which the ports have MDIO/MII interfaces but do not follow IEEE register
> conventions?

> If the former, then I think it is better to just pull the speed and duplex
> settings from the switch and pass them up to the 4xx Ethernet driver. In my
> situation, I did as shown below. It is likely more invasive than your
> approach; however, it ensures that software follows what the hardware is
> strapped to.

Yes! It's possible to determine the speed and duplex mode (it's even
possible to set the duplex mode, speed is read only).

I'll test that tomorrow.

Thanks a lot,
Wolfgang

[U-Boot] [PATCH] ppc4xx - allow usage of fixed/unmanaged PHYs

[Ben Warren]

Wolfgang Ocker wrote:
> Hi Wolfgang!
>
> On Tue, 2008-08-26 at 20:52 +0200, Wolfgang Denk wrote:
>   
>> In message <1219774284.3294.52.camel@galileo.recco.de> you wrote:
>>     
>>> This patch allows a managed switch like the 88E6083 to be directly
>>> connected to a 4xx using PHY mode.
>>>
>>> It avoids waiting for a link (it's always there) and uses fixed values
>>> for speed and duplex mode since both settings are hardware controlled.
>>>       
>> How does this patch work in configurations which have such  a  switch
>> attached  to  one  network interface, but a normal PHY to one or more
>> other interfaces?
>>     
>
> It does not work. I guess you have to further increase complexity and
> handle all the possible configurations (devnum + CONFIG_PHYx_UNMANAGED
> etc., analogous to the phy address).
>
> In case I interpret the code correctly, different kinds of PHYs on a
> board are not supported in general.
>
> Thanks,
> Wolfgang
>
> _
This is a very common situation and was one of the motivations for my 
effort to move Ethernet initialization to board code.  The use of 
different CONFIGs for each interface is IMHO not scalable.  I'm 
intrigued by the idea of getting specific information from a device tree 
as has been recently suggested, but wonder if it'll ever happen.

Sorry for the diatribe.  I should have the 4xx controller switched over 
to cpu/board initialization within a couple of days.  Let's look then 
into how to pass PHY specifics to each interface.

regards,
Ben

[U-Boot] [PATCH] ppc4xx - allow usage of fixed/unmanaged PHYs

[Stefan Roese]

Hi Wolfgang,

On Tuesday 26 August 2008, Wolfgang Ocker wrote:
> This patch allows a managed switch like the 88E6083 to be directly
> connected to a 4xx using PHY mode.
>
> It avoids waiting for a link (it's always there) and uses fixed values
> for speed and duplex mode since both settings are hardware controlled.
>
> Should I use "FIXED" instead of "UNMANAGED" (so called in the kernel
> afair)?
>
> ---
> Support unmanaged/fixed PHYs like port 8/9 of Marvell 88E6083 on 4xx.
>
> Added config vars CONFIG_UNMANAGED_PHY, CONFIG_UNMANAGED_PHY_SPEED
> and CONFIG_UNMANAGED_PHY_FULL_DUPLEX to allow unmanaged PHYs
> and to configure the settings for speed and duplex mode.

This commit:

78d78236896d62bb8ca7302af38d8f1493eb2651

    ppc4xx: Add support for GPCS, SGMII and M88E1112 PHY
    
    This patch adds GPCS, SGMII and M88E1112 PHY support
    for the AMCC PPC460GT/EX processors.
    
    Signed-off-by: Victor Gallardo <vgallardo@amcc.com>
    Signed-off-by: Stefan Roese <sr@denx.de>

added PPC4xx support for this "fixed" PHY's. Please take a look at it to see 
if you can use it for your board/PHY as well. I think it should be generic 
enough for your case.

If you don't tell me otherwise, I view your patch as obsolete.

Best regards,
Stefan

=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: office at denx.de
=====================================================================

[U-Boot] [PATCH] ppc4xx - allow usage of fixed/unmanaged PHYs

[Wolfgang Ocker]

On Mon, 2008-09-22 at 14:59 +0200, Stefan Roese wrote:
> This commit:
> 
> 78d78236896d62bb8ca7302af38d8f1493eb2651
> 
>     ppc4xx: Add support for GPCS, SGMII and M88E1112 PHY
>     
>     This patch adds GPCS, SGMII and M88E1112 PHY support
>     for the AMCC PPC460GT/EX processors.
>     
>     Signed-off-by: Victor Gallardo <vgallardo@amcc.com>
>     Signed-off-by: Stefan Roese <sr@denx.de>
> 
> added PPC4xx support for this "fixed" PHY's. Please take a look at it to see 
> if you can use it for your board/PHY as well. I think it should be generic 
> enough for your case.

Thank you for asking - I missed to give feedback, sorry.

The patch works perfectly!

> If you don't tell me otherwise, I view your patch as obsolete.

Yes, it's obsolete.

Many thanks, also to Victor,
Wolfgang