From mboxrd@z Thu Jan 1 00:00:00 1970 From: Felix Radensky Date: Thu, 16 Oct 2008 11:10:13 +0200 Subject: [U-Boot] GPIO configuration on 460EX In-Reply-To: <200810160922.35491.sr@denx.de> References: <48F680CC.30206@embedded-sol.com> <200810160922.35491.sr@denx.de> Message-ID: <48F704F5.8040009@embedded-sol.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi, Stefan Stefan Roese wrote: > Hi Felix, > > On Thursday 16 October 2008, Felix Radensky wrote: > >> I'm looking at GPIO setup code for Canyonlands, and >> it looks like some initializations mentioned in the 460EX >> manual are missing. When pin is configured as alternate >> input, the corresponding bits in TSRL/H registers should >> be set. U-Boot code sets TSRL/H registers only for output >> pins. >> >> Am I missing something ? >> > > Looking again at the users manual I can't find that the TSR register should be > set for input functionality. Take a look at figure 35-1. Here you will see > that TSR is only involved for output functionality. > > I was looking at section 35.5.3 and Table 35-9 in user manual (Version 1.14) TSR is involved in both input and output functionality. This indeed contradicts the description you were referring to. Maybe AMCC guys reading this list can clarify ? > I assume that you are asking because of your Linux IRQ problem with the > external interrupt, correct? I'll take a look at the Linux thread and try to > give another answer there. > Thanks a lot. Your suggestion in this thread indeed helped. I was using wrong IRQ number in device tree. > And feel free to test with TSR configured for input as well. If this gets your > interrupt working then this we need to change this GPIO config code of > course. > > I've tried that, but it didn't help. Thanks a lot for you help. Felix.