From: Dirk Behme <dirk.behme@googlemail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] OMAP3 broken NAND hardware ECC generation
Date: Sun, 09 Nov 2008 19:51:54 +0100 [thread overview]
Message-ID: <4917314A.50700@googlemail.com> (raw)
Dear Scott and Nishanth,
we have broken OMAP3 NAND hardware ECC generation while our clean up
of OMAP3 NAND code.
I did some debugging. Do you like to have a look to
http://git.denx.de/?p=u-boot/u-boot-arm.git;a=blob;f=drivers/mtd/nand/omap_gpmc.c;h=01b79593949fe828e4b1d3da2cf4b399c1b580ab;hb=refs/heads/omap3
?
Using some well defined data in SDRAM, I used older U-Boot with
working nand ecc hw/sw implementation and our recent version to write
this data to NAND. I then compared ecc written and found that our
latest version writes the correct location, but all zero:
Working version from older U-Boot:
OOB:
ff ff ec 13 0f 00 00 00
00 00 00 00 00 00 ff ff
ff ff ff ff ff ff ff ff
ff ff ff ff ff ff ff ff
ff ff ff ff ff ff ff ff
ff ff ff ff ff ff ff ff
ff ff ff ff ff ff ff ff
ff ff ff ff ff ff ff ff
Recent version:
OOB:
ff ff 00 00 00 00 00 00
00 00 00 00 00 00 ff ff
ff ff ff ff ff ff ff ff
ff ff ff ff ff ff ff ff
ff ff ff ff ff ff ff ff
ff ff ff ff ff ff ff ff
ff ff ff ff ff ff ff ff
ff ff ff ff ff ff ff ff
In both versions the data the ecc is calculated for is the same. In
recent version only zero is written.
Some additional debugging by adding some printf() in hw ecc functions:
OMAP3 beagleboard.org # nandecc hw
omap_hwecc_init
HW ECC selected
OMAP3 beagleboard.org # nand write 80000000 680000 1000
NAND write: device 0 offset 0x680000, size 0x1000
omap_calculate_ecc 0x00 0x00 0x00
omap_calculate_ecc 0x00 0x00 0x00
omap_calculate_ecc 0x00 0x00 0x00
omap_calculate_ecc 0x00 0x00 0x00
omap_calculate_ecc 0x00 0x00 0x00
omap_calculate_ecc 0x00 0x00 0x00
omap_calculate_ecc 0x00 0x00 0x00
omap_calculate_ecc 0x00 0x00 0x00
4096 bytes written: OK
OMAP3 beagleboard.org #
This is the result of
printf("omap_calculate_ecc 0x%02x 0x%02x 0x%02x\n", ecc_code[2],
ecc_code[1], ecc_code[0]);
I'm not sure, but it seems to me, that omap_enable_hwecc() is never
called. An printf() in this function is not shown.
Maybe call of nand_scan_tail(mtd); in omap_nand_switch_ecc() resets
anything? Or any other idea?
Thanks for your help
Dirk
next reply other threads:[~2008-11-09 18:51 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-11-09 18:51 Dirk Behme [this message]
2008-11-10 18:33 ` [U-Boot] OMAP3 broken NAND hardware ECC generation Scott Wood
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