[U-Boot] [PATCH-OMAP3 v2] OMAP3: Fix gpmc_cs_base pointer math in NAND

[dirk.behme at googlemail.com <dirk.behme@googlemail.com>]

gpmc_cs_base is an uint32_t pointer, correct pointer math. Missed after
readl/writel conversion.

Signed-off-by: Dirk Behme <dirk.behme@gmail.com>

---

Changes in v2:

- Correct patch header style.

v2 of this patch makes previous version v1 obsolete.

Jean-Christophe: Would be nice if you could handle this patch with priority
as it prevents BeagleBoard from starting. Thanks!

 drivers/mtd/nand/omap_gpmc.c |   10 +++++-----
 1 files changed, 5 insertions(+), 5 deletions(-)

Index: u-boot-arm/drivers/mtd/nand/omap_gpmc.c
===================================================================
--- u-boot-arm.orig/drivers/mtd/nand/omap_gpmc.c
+++ u-boot-arm/drivers/mtd/nand/omap_gpmc.c
@@ -48,13 +48,13 @@ static void omap_nand_hwcontrol(struct m
 	 */
 	switch (ctrl) {
 	case NAND_CTRL_CHANGE | NAND_CTRL_CLE:
-		this->IO_ADDR_W = gpmc_cs_base + GPMC_NAND_CMD;
+		this->IO_ADDR_W = gpmc_cs_base + OFFS(GPMC_NAND_CMD);
 		break;
 	case NAND_CTRL_CHANGE | NAND_CTRL_ALE:
-		this->IO_ADDR_W = gpmc_cs_base + GPMC_NAND_ADR;
+		this->IO_ADDR_W = gpmc_cs_base + OFFS(GPMC_NAND_ADR);
 		break;
 	case NAND_CTRL_CHANGE | NAND_NCE:
-		this->IO_ADDR_W = gpmc_cs_base + GPMC_NAND_DAT;
+		this->IO_ADDR_W = gpmc_cs_base + OFFS(GPMC_NAND_DAT);
 		break;
 	}
 
@@ -321,8 +321,8 @@ int board_nand_init(struct nand_chip *na
 	gpmc_config |= 0x10;
 	writel(gpmc_config, gpmc_base + OFFS(GPMC_CONFIG));
 
-	nand->IO_ADDR_R = gpmc_cs_base + GPMC_NAND_DAT;
-	nand->IO_ADDR_W = gpmc_cs_base + GPMC_NAND_CMD;
+	nand->IO_ADDR_R = gpmc_cs_base + OFFS(GPMC_NAND_DAT);
+	nand->IO_ADDR_W = gpmc_cs_base + OFFS(GPMC_NAND_CMD);
 
 	nand->cmd_ctrl = omap_nand_hwcontrol;
 	nand->options = NAND_NO_PADDING | NAND_CACHEPRG | NAND_NO_AUTOINCR |