[U-Boot] [PATCH] mpc83xx: New board support SIMPC8313

[U-Boot] [PATCH] mpc83xx: New board support SIMPC8313

[Ron Madrid]

This patch will create a new board, SIMPC8313, from Sheldon Instruments.  This
board boots from NAND devices and is configurable for either a large page or
small page device.

Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>
---
 MAINTAINERS                                 |    4 +
 MAKEALL                                     |    1 +
 Makefile                                    |   20 +
 board/sheldon/simpc8313/Makefile            |   50 +++
 board/sheldon/simpc8313/config.mk           |   13 +
 board/sheldon/simpc8313/sdram.c             |  206 +++++++++++
 board/sheldon/simpc8313/simpc8313.c         |  136 +++++++
 doc/README.simpc8313                        |   71 ++++
 include/configs/SIMPC8313.h                 |  534 +++++++++++++++++++++++++++
 nand_spl/board/sheldon/simpc8313/Makefile   |  101 +++++
 nand_spl/board/sheldon/simpc8313/u-boot.lds |   52 +++
 11 files changed, 1188 insertions(+), 0 deletions(-)
 create mode 100644 board/sheldon/simpc8313/Makefile
 create mode 100644 board/sheldon/simpc8313/config.mk
 create mode 100644 board/sheldon/simpc8313/sdram.c
 create mode 100644 board/sheldon/simpc8313/simpc8313.c
 create mode 100644 doc/README.simpc8313
 create mode 100644 include/configs/SIMPC8313.h
 create mode 100644 nand_spl/board/sheldon/simpc8313/Makefile
 create mode 100644 nand_spl/board/sheldon/simpc8313/u-boot.lds

diff --git a/MAINTAINERS b/MAINTAINERS
index 750e374..f844ef4 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -259,6 +259,10 @@ Jon Loeliger <jdl@freescale.com>
 
 	MPC8641HPCN	MPC8641D
 
+Ron Madrid <info@sheldoninst.com>
+
+	SIMPC8313	MPC8313
+
 Dan Malek <dan@embeddedalley.com>
 
 	stxgp3		MPC85xx
diff --git a/MAKEALL b/MAKEALL
index 9ccb9ac..635bd0d 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -339,6 +339,7 @@ LIST_83xx="		\
 	MPC837XEMDS	\
 	MPC837XERDB	\
 	MVBLM7		\
+	SIMPC8313_LP	\
 	sbc8349		\
 	TQM834x		\
 "
diff --git a/Makefile b/Makefile
index 7c13ce8..20c6d9c 100644
--- a/Makefile
+++ b/Makefile
@@ -2248,6 +2248,26 @@ MPC837XERDB_config:	unconfig
 MVBLM7_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc83xx mvblm7 matrix_vision
 
+SIMPC8313_LP_config \
+SIMPC8313_SP_config: unconfig
+	@mkdir -p $(obj)include
+	@mkdir -p $(obj)board/sheldon/simpc8313
+	@mkdir -p $(obj)nand_spl/board/sheldon/simpc8313
+	@if [ "$(findstring _LP_,$@)" ] ; then \
+		$(XECHO) -n "...NAND..." ; \
+		echo "TEXT_BASE = 0x00100000" > $(obj)board/sheldon/simpc8313/config.tmp ; \
+		echo "#define CONFIG_NAND_U_BOOT" >> $(obj)include/config.h ; \
+		echo "#define CONFIG_NAND_LP" >> $(obj)include/config.h ; \
+	fi ; \
+	if [ "$(findstring _SP_,$@)" ] ; then \
+		$(XECHO) -n "...NAND..." ; \
+		echo "TEXT_BASE = 0x00100000" > $(obj)board/sheldon/simpc8313/config.tmp ; \
+		echo "#define CONFIG_NAND_U_BOOT" >> $(obj)include/config.h ; \
+		echo "#define CONFIG_NAND_SP" >> $(obj)include/config.h ; \
+	fi ;
+	@$(MKCONFIG) -a SIMPC8313 ppc mpc83xx simpc8313 sheldon
+	@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
+
 sbc8349_config:		unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc83xx sbc8349
 
diff --git a/board/sheldon/simpc8313/Makefile b/board/sheldon/simpc8313/Makefile
new file mode 100644
index 0000000..7c34c5e
--- /dev/null
+++ b/board/sheldon/simpc8313/Makefile
@@ -0,0 +1,50 @@
+#
+# (C) Copyright 2006
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS	:= $(BOARD).o sdram.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/sheldon/simpc8313/config.mk b/board/sheldon/simpc8313/config.mk
new file mode 100644
index 0000000..95f6481
--- /dev/null
+++ b/board/sheldon/simpc8313/config.mk
@@ -0,0 +1,13 @@
+ifndef NAND_SPL
+sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
+endif
+
+ifndef TEXT_BASE
+TEXT_BASE = 0xFE000000
+endif
+
+ifdef CONFIG_NAND_LP
+PAD_TO = 0xFFF20000
+else
+PAD_TO = 0xFFF04000
+endif
diff --git a/board/sheldon/simpc8313/sdram.c b/board/sheldon/simpc8313/sdram.c
new file mode 100644
index 0000000..4af29e2
--- /dev/null
+++ b/board/sheldon/simpc8313/sdram.c
@@ -0,0 +1,206 @@
+/*
+ * Copyright (C) Sheldon Instruments, Inc. 2008
+ *
+ * Author: Ron Madrid <info@sheldoninst.com>
+ * Adapted from ../freescale/mpc8313erdb/sdram.c
+ *
+ * (C) Copyright 2006
+ * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS for A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ */
+
+#include <common.h>
+#include <mpc83xx.h>
+#include <spd_sdram.h>
+
+#include <asm/bitops.h>
+#include <asm/io.h>
+
+#include <asm/processor.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static long fixed_sdram(void);
+
+#if defined(CONFIG_NAND_SPL)
+#define puts(v) {}
+void si_read_i2c(int, int, u8*);
+void si_wait_i2c(void);
+#endif
+
+#define DDRLAWAR_SIZE	   0x0000003F
+
+phys_size_t initdram(int board_type)
+{
+	volatile immap_t *im = (immap_t *) CFG_IMMR;
+	volatile lbus83xx_t *lbc= &im->lbus;
+
+	u32 msize = 0;
+
+	if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im)
+		return -1;
+
+	puts("Initializing\n");
+
+	/* DDR SDRAM - Main SODIMM */
+	im->sysconf.ddrlaw[0].bar = CFG_DDR_BASE & LAWBAR_BAR;
+
+	msize = fixed_sdram();
+
+	/* Local Bus setup lbcr and mrtpr */
+	lbc->lbcr = CFG_LBC_LBCR;
+	lbc->mrtpr = CFG_LBC_MRTPR;
+	sync();
+
+	puts("   DDR RAM: ");
+	/* return total bus SDRAM size(bytes)  -- DDR */
+	return (msize * 1024 * 1024);
+}
+
+/*************************************************************************
+ *  fixed sdram init -- reads values from boot sequencer I2C
+ ************************************************************************/
+static long fixed_sdram(void)
+{
+	volatile immap_t *im = (immap_t *) CFG_IMMR;
+	u32 msizelog2, msize = 1;
+#if defined(CONFIG_NAND_SPL)
+	u32 i;
+	u8 buffer[135];
+	u32 lbyte = 0, count = 135;
+	u32 addr = 0, data = 0;
+
+	si_read_i2c(lbyte, count, buffer);
+
+	for (i = 18; i < count; i+=7){
+		addr = (u32)buffer[i];
+		addr <<= 8;
+		addr |= (u32)buffer[i + 1];
+		addr <<= 2;
+		data = (u32)buffer[i + 2];
+		data <<= 8;
+		data |= (u32)buffer[i + 3];
+		data <<= 8;
+		data |= (u32)buffer[i + 4];
+		data <<= 8;
+		data |= (u32)buffer[i + 5];
+
+		*((u32 *)(CFG_IMMR + addr)) = data;
+	}
+
+	sync();
+
+	/* enable DDR controller */
+	im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN;
+#endif /* (CONFIG_NAND_SPL) */
+
+	msizelog2 = ((im->sysconf.ddrlaw[0].ar & DDRLAWAR_SIZE) + 1);
+	msize <<= (msizelog2 - 20);
+
+	return msize;
+}
+
+#if defined(CONFIG_NAND_SPL)
+void si_read_i2c(int lbyte, int count, u8 *buffer)
+{
+	u8 chip = 0x50; /* boot sequencer I2C */
+	u8 ubyte;
+	u8 dummy;
+	u32 i;
+	volatile immap_t *im = (immap_t *) CFG_IMMR;
+
+	chip <<= 1;
+	ubyte = (lbyte&0xff00)>>8;
+	lbyte &= 0xff;
+
+	/*
+	 * Set up controller
+	 */
+	im->i2c[0].cr = 0x00;
+	im->i2c[0].fdr = 0x3f;
+	im->i2c[0].dfsrr = 0x10;
+	im->i2c[0].adr = 0x00;
+	im->i2c[0].sr = 0x80;
+	im->i2c[0].dr = 0;
+
+	while (im->i2c[0].sr & 0x20)
+		;
+
+	/*
+	 * Writing address to device
+	 */
+	im->i2c[0].cr = 0xb0;
+	im->i2c[0].dr = chip;
+	si_wait_i2c();
+
+	im->i2c[0].cr = 0xb0;
+	im->i2c[0].dr = ubyte;
+
+	si_wait_i2c();
+	im->i2c[0].dr = lbyte;
+	si_wait_i2c();
+	im->i2c[0].cr = 0xb4;
+	im->i2c[0].dr = chip + 1;
+	si_wait_i2c();
+	im->i2c[0].cr = 0xa0;
+
+	/*
+	 * Dummy read
+	 */
+	dummy = im->i2c[0].dr;
+
+	si_wait_i2c();
+
+	/*
+	 * Read actual data
+	 */
+	for (i = 0; i < count; i++)
+	{
+		if (i == (count - 2))	/* Reached next to last byte */
+			im->i2c[0].cr = 0xa8;
+		if (i == (count - 1))	/* Reached last byte */
+			im->i2c[0].cr = 0x88;
+		
+		/* Read byte of data */
+		buffer[i] = im->i2c[0].dr;
+
+		if (i ==(count - 1))
+			break;
+		si_wait_i2c();
+
+	}
+
+	/*
+	 * Reset controller
+	 */
+	im->i2c[0].cr = 0x80;
+	im->i2c[0].sr = 0x00;
+
+	return;
+}
+
+void si_wait_i2c(void){
+	volatile immap_t *im = (immap_t *) CFG_IMMR;
+
+	while (!(im->i2c[0].sr & 0x02))
+		;
+	im->i2c[0].sr = 0;
+	return;
+}
+#endif /* CONFIG_NAND_SPL */
diff --git a/board/sheldon/simpc8313/simpc8313.c b/board/sheldon/simpc8313/simpc8313.c
new file mode 100644
index 0000000..8875973
--- /dev/null
+++ b/board/sheldon/simpc8313/simpc8313.c
@@ -0,0 +1,136 @@
+/*
+ * Copyright (C) Sheldon Instruments, Inc. 2008
+ *
+ * Author: Ron Madrid <info@sheldoninst.com>
+ * Adapted from board/freescale/mpc8313erdb/mpc8313erdb.c
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS for A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#if defined(CONFIG_OF_LIBFDT)
+#include <libfdt.h>
+#endif
+#include <pci.h>
+#include <mpc83xx.h>
+#include <ns16550.h>
+#include <nand.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int checkboard(void)
+{
+	puts("Board: Sheldon Instruments SIMPC8313\n");
+	return 0;
+}
+
+#ifndef CONFIG_NAND_SPL
+static struct pci_region pci_regions[] = {
+	{
+		bus_start: CFG_PCI1_MEM_BASE,
+		phys_start: CFG_PCI1_MEM_PHYS,
+		size: CFG_PCI1_MEM_SIZE,
+		flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
+	},
+	{
+		bus_start: CFG_PCI1_MMIO_BASE,
+		phys_start: CFG_PCI1_MMIO_PHYS,
+		size: CFG_PCI1_MMIO_SIZE,
+		flags: PCI_REGION_MEM
+	},
+	{
+		bus_start: CFG_PCI1_IO_BASE,
+		phys_start: CFG_PCI1_IO_PHYS,
+		size: CFG_PCI1_IO_SIZE,
+		flags: PCI_REGION_IO
+	}
+};
+
+void pci_init_board(void)
+{
+	volatile immap_t *immr = (volatile immap_t *)CFG_IMMR;
+	volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
+	volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
+	struct pci_region *reg[] = { pci_regions };
+	int warmboot;
+
+	/* Enable all 3 PCI_CLK_OUTPUTs. */
+	clk->occr |= 0xe0000000;
+
+	/*
+	 * Configure PCI Local Access Windows
+	 */
+	pci_law[0].bar = CFG_PCI1_MEM_PHYS & LAWBAR_BAR;
+	pci_law[0].ar = LBLAWAR_EN | LBLAWAR_512MB;
+
+	pci_law[1].bar = CFG_PCI1_IO_PHYS & LAWBAR_BAR;
+	pci_law[1].ar = LBLAWAR_EN | LBLAWAR_1MB;
+
+	warmboot = gd->bd->bi_bootflags & BOOTFLAG_WARM;
+
+	mpc83xx_pci_init(1, reg, warmboot);
+}
+
+/*
+ * Miscellaneous late-boot configurations
+ */
+int misc_init_r(void)
+{
+	int rc = 0;
+
+	return rc;
+}
+
+#if defined(CONFIG_OF_BOARD_SETUP)
+void ft_board_setup(void *blob, bd_t *bd)
+{
+	ft_cpu_setup(blob, bd);
+#ifdef CONFIG_PCI
+	ft_pci_setup(blob, bd);
+#endif
+}
+#endif
+#else /* CONFIG_NAND_SPL */
+void board_init_f(ulong bootflag)
+{
+	NS16550_init((NS16550_t)(CFG_IMMR + 0x4500),
+	             CFG_NS16550_CLK / 16 / CONFIG_BAUDRATE);
+	puts("NAND boot... ");
+	init_timebase();
+	initdram(0);
+	relocate_code(CFG_NAND_U_BOOT_RELOC + 0x10000, (gd_t *)gd,
+	              CFG_NAND_U_BOOT_RELOC);
+}
+
+void board_init_r(gd_t *gd, ulong dest_addr)
+{
+	nand_boot();
+}
+
+void putc(char c)
+{
+	if (gd->flags & GD_FLG_SILENT)
+		return;
+
+	if (c == '\n')
+		NS16550_putc((NS16550_t)(CFG_IMMR + 0x4500), '\r');
+
+	NS16550_putc((NS16550_t)(CFG_IMMR + 0x4500), c);
+}
+#endif
diff --git a/doc/README.simpc8313 b/doc/README.simpc8313
new file mode 100644
index 0000000..c2bac55
--- /dev/null
+++ b/doc/README.simpc8313
@@ -0,0 +1,71 @@
+Sheldon Instruments SIMPC8313 Board
+-----------------------------------------
+
+1.	Board Switches and Jumpers
+
+	S2 is used to set CFG_RESET_SOURCE.
+
+	To boot the image in Large page NAND flash, use these DIP
+	switch settings for S2:
+
+	+----------+ ON
+	| * * **** |
+	|  * *     |
+	+----------+
+	  12345678
+
+	To boot the image in Small page NAND flash, use these DIP
+	switch settings for S2:
+
+	+----------+ ON
+	| *** **** |
+	|    *     |
+	+----------+
+	  12345678
+	(where the '*' indicates the position of the tab of the switch.)
+
+2.	Memory Map
+	The memory map looks like this:
+
+	0x0000_0000	0x1fff_ffff	DDR		 512M
+	0x8000_0000	0x8fff_ffff	PCI MEM		 256M
+	0x9000_0000	0x9fff_ffff	PCI_MMIO	 256M
+	0xe000_0000	0xe00f_ffff	IMMR		 1M
+	0xe200_0000	0xe20f_ffff	PCI IO	 	 16M
+	0xe280_0000	0xe280_7fff	NAND FLASH (CS0) 32K
+	or
+	0xe280_0000	0xe281_ffff	NAND FLASH (CS0) 128K
+	0xff00_0000	0xff00_7fff	FPGA (CS1)	 1M
+
+3.	Compilation
+
+	Assuming you're using BASH (or similar) as your shell:
+
+	export CROSS_COMPILE=your-cross-compiler-prefix-
+	make distclean
+	make SIMPC8313_LP_config
+	(or make SIMPC8313_SP_config, depending on the page size
+	 of your NAND flash)
+	make
+
+4.	Downloading and Flashing Images
+
+4.1	Reflash U-boot Image using U-boot
+
+	=>run update_uboot
+
+	You may want to try
+	=>tftp $loadaddr $uboot
+	first, to make sure that the TFTP load will succeed before it
+	goes ahead and wipes out your current firmware.  And of course,
+	if the new u-boot doesn't boot, you can plug the board into
+	your PCI slot and with the supplied driver and sample app
+	you can reburn a working u-boot.
+
+4.2	Downloading and Booting Linux Kernel
+
+	TODO:
+
+5	Notes
+
+	The console baudrate for SIMPC8313 is 115200bps.
diff --git a/include/configs/SIMPC8313.h b/include/configs/SIMPC8313.h
new file mode 100644
index 0000000..4c086fd
--- /dev/null
+++ b/include/configs/SIMPC8313.h
@@ -0,0 +1,534 @@
+/*
+ * Copyright (C) Sheldon Instruments, Inc. 2008
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+/*
+ * simpc8313 board configuration file
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ */
+#define CONFIG_E300		1
+#define CONFIG_MPC83XX		1
+#define CONFIG_MPC831X		1
+#define CONFIG_MPC8313		1
+
+#define CONFIG_PCI
+#define CONFIG_83XX_GENERIC_PCI
+
+#define CONFIG_MISC_INIT_R
+
+/*
+ * On-board devices
+ *
+ * TSEC1 is Marvell PHY 88E1118
+ */
+
+#define CFG_33MHZ
+
+#define CONFIG_83XX_CLKIN	33333333	/* in Hz */
+
+#define CONFIG_SYS_CLK_FREQ	CONFIG_83XX_CLKIN
+
+#define CFG_IMMR		0xE0000000
+
+#if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
+#define CONFIG_DEFAULT_IMMR	CFG_IMMR
+#endif
+
+#define CFG_MEMTEST_START	0x00001000
+#define CFG_MEMTEST_END		0x07f00000
+
+#define CFG_ACR_PIPE_DEP	3	/* Arbiter pipeline depth (0-3) */
+#define CFG_ACR_RPTCNT		3	/* Arbiter repeat count (0-7) */
+
+/*
+ * Device configurations
+ */
+#define CONFIG_TSEC1
+
+/*
+ * DDR Setup
+ */
+#define CFG_DDR_BASE		0x00000000	/* DDR is system memory*/
+#define CFG_SDRAM_BASE		CFG_DDR_BASE
+#define CFG_DDR_SDRAM_BASE	CFG_DDR_BASE
+
+#define CONFIG_VERY_BIG_RAM
+#define CONFIG_MAX_MEM_MAPPED (512 << 20)
+
+#define CFG_DDRCDR		( DDRCDR_EN \
+				| DDRCDR_PZ_NOMZ \
+				| DDRCDR_NZ_NOMZ \
+				| DDRCDR_M_ODR )
+				/* 0x73000002 TODO ODR & DRN ? */
+
+/*
+ * FLASH on the Local Bus
+ */
+#define CFG_NO_FLASH
+
+#define CFG_MONITOR_BASE	TEXT_BASE	/* start of monitor */
+
+#if !defined(CONFIG_NAND_SPL)
+#define CFG_RAMBOOT
+#endif
+
+#define CFG_INIT_RAM_LOCK	1
+#define CFG_INIT_RAM_ADDR	0xFD000000	/* Initial RAM address */
+#define CFG_INIT_RAM_END	0x1000		/* End of used area in RAM*/
+
+#define CFG_GBL_DATA_SIZE	0x100		/* num bytes initial data */
+#define CFG_GBL_DATA_OFFSET	(CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP_OFFSET	CFG_GBL_DATA_OFFSET
+
+/* CFG_MONITOR_LEN must be a multiple of CONFIG_ENV_SECT_SIZE */
+#define CFG_MONITOR_LEN		(256 * 1024)	/* Reserve 256 kB for Mon */
+#define CFG_MALLOC_LEN		(512 * 1024)	/* Reserved for malloc */
+
+/*
+ * Local Bus LCRR and LBCR regs
+ */
+#define CFG_LCRR	LCRR_CLKDIV_2	/* 0x00000002 */
+#define CFG_LBC_LBCR	( 0x00040000 /* TODO */ \
+			| (0xFF << LBCR_BMT_SHIFT) \
+			| 0xF )	/* 0x0004ff0f */
+
+#define CFG_LBC_MRTPR	0x20000000  /*TODO */	/* LB refresh timer prescal, 266MHz/32 */
+
+/* drivers/mtd/nand/nand.c */
+#ifdef CONFIG_NAND_SPL
+#define CFG_NAND_BASE		0xFFF00000
+#else
+#define CFG_NAND_BASE		0xE2800000
+#endif
+
+#define CFG_MAX_NAND_DEVICE	1
+#define NAND_MAX_CHIPS		1
+#define CONFIG_MTD_NAND_VERIFY_WRITE
+#define CONFIG_CMD_NAND 1
+#define CONFIG_NAND_FSL_ELBC 1
+
+#define CFG_NAND_U_BOOT_SIZE  (512 << 10)
+#define CFG_NAND_U_BOOT_DST   0x00100000
+#define CFG_NAND_U_BOOT_START 0x00100100
+#define CFG_NAND_U_BOOT_RELOC 0x00010000
+
+#define CFG_NAND_BR_PRELIM	( CFG_NAND_BASE \
+				| (2<<BR_DECC_SHIFT)	/* Use HW ECC */ \
+				| BR_PS_8		/* Port Size = 8 bit */ \
+				| BR_MS_FCM		/* MSEL = FCM */ \
+				| BR_V )		/* valid */
+
+#ifdef CONFIG_NAND_SP
+#define CFG_NAND_OR_PRELIM	( 0xFFFF8000	/* length 32K */ \
+				| OR_FCM_CSCT \
+				| OR_FCM_CST \
+				| OR_FCM_CHT \
+				| OR_FCM_SCY_1 \
+				| OR_FCM_TRLX \
+				| OR_FCM_EHTR )
+#define CFG_LBLAWAR0_PRELIM	0x8000000E	/* 32KB  */
+#define CFG_NAND_PAGE_SIZE	(512)		/* NAND chip page size */
+#define CFG_NAND_BLOCK_SIZE	(16 << 10)	/* NAND chip block size */
+#define NAND_CACHE_PAGES	32
+#elif defined(CONFIG_NAND_LP)
+#define CFG_NAND_OR_PRELIM	( 0xFFFC0000	/* length 256K */ \
+				| OR_FCM_PGS \
+				| OR_FCM_CSCT \
+				| OR_FCM_CST \
+				| OR_FCM_CHT \
+				| OR_FCM_SCY_1 \
+				| OR_FCM_TRLX \
+				| OR_FCM_EHTR )
+#define CFG_LBLAWAR0_PRELIM	0x80000011	/* 256KB  */
+#define CFG_NAND_PAGE_SIZE	(2048)		/* NAND chip page size */
+#define CFG_NAND_BLOCK_SIZE	(128 << 10)	/* NAND chip block size */
+#define NAND_CACHE_PAGES	64
+#else
+#error Page size of NAND not defined.
+#endif /* CONFIG_NAND_SP */
+
+#define CFG_NAND_U_BOOT_OFFS  CFG_NAND_BLOCK_SIZE
+
+#define CFG_BR0_PRELIM CFG_NAND_BR_PRELIM
+#define CFG_OR0_PRELIM CFG_NAND_OR_PRELIM
+
+#define CFG_LBLAWBAR0_PRELIM	CFG_NAND_BASE
+
+#define CFG_NAND_LBLAWBAR_PRELIM CFG_LBLAWBAR0_PRELIM
+#define CFG_NAND_LBLAWAR_PRELIM CFG_LBLAWAR0_PRELIM
+
+/*
+ * JFFS2 configuration
+ */
+#define CONFIG_JFFS2_NAND
+#define CONFIG_JFFS2_DEV	"nand0"
+
+/* mtdparts command line support */
+#define CONFIG_JFFS2_CMDLINE
+#define MTDIDS_DEFAULT		"nand0=nand0"
+#define MTDPARTS_DEFAULT	"mtdparts=nand0:2M(u-boot),6M(kernel),-(jffs2)"
+
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT	1
+#define CONFIG_OF_BOARD_SETUP	1
+#define CONFIG_OF_STDOUT_VIA_ALIAS	1
+
+/*
+ * Serial Port
+ */
+#define CONFIG_CONS_INDEX	1
+#define CFG_NS16550
+#define CFG_NS16550_SERIAL
+#define CFG_NS16550_REG_SIZE	1
+
+#define CFG_BAUDRATE_TABLE	\
+	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200}
+
+#define CFG_NS16550_COM1	(CFG_IMMR+0x4500)
+#define CFG_NS16550_COM2	(CFG_IMMR+0x4600)
+
+/* Use the HUSH parser */
+#define CFG_HUSH_PARSER
+#define CFG_PROMPT_HUSH_PS2 "> "
+
+/* I2C */
+#define CONFIG_HARD_I2C			/* I2C with hardware support*/
+#define CONFIG_FSL_I2C
+#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_I2C_CMD_TREE
+#define CFG_I2C_SPEED		400000	/* I2C speed and slave address */
+#define CFG_I2C_SLAVE		0x7F
+#define CFG_I2C_NOPROBES	{{0,0x69}} /* Don't probe these addrs */
+#define CFG_I2C_OFFSET		0x3000
+#define CFG_I2C2_OFFSET		0x3100
+
+/*
+ * General PCI
+ * Addresses are mapped 1-1.
+ */
+#define CFG_PCI1_MEM_BASE	0x80000000
+#define CFG_PCI1_MEM_PHYS	CFG_PCI1_MEM_BASE
+#define CFG_PCI1_MEM_SIZE	0x10000000	/* 256M */
+#define CFG_PCI1_MMIO_BASE	0x90000000
+#define CFG_PCI1_MMIO_PHYS	CFG_PCI1_MMIO_BASE
+#define CFG_PCI1_MMIO_SIZE	0x10000000	/* 256M */
+#define CFG_PCI1_IO_BASE	0x00000000
+#define CFG_PCI1_IO_PHYS	0xE2000000
+#define CFG_PCI1_IO_SIZE	0x00100000	/* 1M */
+
+#define CONFIG_PCI_PNP		/* do pci plug-and-play */
+#define CFG_PCI_SUBSYS_VENDORID 0x1057	/* Motorola */
+
+/*
+ * TSEC
+ */
+#define CONFIG_TSEC_ENET		/* TSEC ethernet support */
+
+#define CONFIG_NET_MULTI
+#define CONFIG_GMII			/* MII PHY management */
+
+#ifdef CONFIG_TSEC1
+#define CONFIG_HAS_ETH0
+#define CONFIG_TSEC1_NAME	"TSEC0"
+#define CFG_TSEC1_OFFSET	0x24000
+#define TSEC1_PHY_ADDR		0x1c
+#define TSEC1_FLAGS		TSEC_GIGABIT
+#define TSEC1_PHYIDX		0
+#endif
+
+#ifdef CONFIG_TSEC2
+#define CONFIG_HAS_ETH1
+#define CONFIG_TSEC2_NAME	"TSEC1"
+#define CFG_TSEC2_OFFSET	0x25000
+#define TSEC2_PHY_ADDR		4
+#define TSEC2_FLAGS		TSEC_GIGABIT
+#define TSEC2_PHYIDX		0
+#endif
+
+
+/* Options are: TSEC[0-1] */
+#define CONFIG_ETHPRIME			"TSEC1"
+
+/*
+ * Configure on-board RTC
+ */
+#define CONFIG_RTC_DS1337
+#define CFG_I2C_RTC_ADDR		0x68
+
+/*
+ * Environment
+ */
+#if defined(CONFIG_NAND_U_BOOT)
+	#define CONFIG_ENV_IS_IN_NAND	1
+	#define CONFIG_ENV_OFFSET		(768 * 1024)
+	#define CONFIG_ENV_SECT_SIZE	CFG_NAND_BLOCK_SIZE
+	#define CONFIG_ENV_SIZE		CONFIG_ENV_SECT_SIZE
+	#define CONFIG_ENV_SIZE_REDUND	CONFIG_ENV_SIZE
+	#define CONFIG_ENV_RANGE		(CONFIG_ENV_SECT_SIZE * 4)
+	#define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
+#elif !defined(CFG_RAMBOOT)
+	#define CONFIG_ENV_IS_IN_FLASH	1
+	#define CONFIG_ENV_ADDR		(CFG_MONITOR_BASE + CFG_MONITOR_LEN)
+	#define CONFIG_ENV_SECT_SIZE	0x10000	/* 64K(one sector) for env */
+	#define CONFIG_ENV_SIZE		0x2000
+
+/* Address and size of Redundant Environment Sector */
+#else
+	#define CONFIG_ENV_IS_NOWHERE	1	/* Store ENV in memory only */
+	#define CONFIG_ENV_ADDR		(CFG_MONITOR_BASE - 0x1000)
+	#define CONFIG_ENV_SIZE		0x2000
+#endif
+
+#define CONFIG_LOADS_ECHO	1	/* echo on for serial download */
+#define CFG_LOADS_BAUD_CHANGE	1	/* allow baudrate change */
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+#undef CONFIG_CMD_IMLS
+#undef CONFIG_CMD_FLASH
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_JFFS2
+
+#if defined(CFG_RAMBOOT) && !defined(CONFIG_NAND_U_BOOT)
+    #undef CONFIG_CMD_ENV
+    #undef CONFIG_CMD_LOADS
+#endif
+
+#define CONFIG_CMDLINE_EDITING 1
+
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP			/* undef to save memory */
+#define CFG_LOAD_ADDR	0x2000000	/* default load address */
+#define CFG_PROMPT	"=> "		/* Monitor Command Prompt */
+#define CFG_CBSIZE	1024		/* Console I/O Buffer Size */
+
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)	/* Print Buffer Size */
+#define CFG_MAXARGS	16		/* max number of command args */
+#define CFG_BARGSIZE	CFG_CBSIZE	/* Boot Argument Buffer Size */
+#define CFG_HZ		1000		/* decrementer freq: 1ms ticks */
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CFG_BOOTMAPSZ	(8 << 20)	/* Initial Memory map for Linux*/
+
+#define CFG_RCWH_PCIHOST 0x80000000	/* PCIHOST  */
+
+#define CFG_HRCW_LOW (\
+	HRCWL_LCL_BUS_TO_SCB_CLK_1X1 |\
+	0x20000000 /* reserved, must be set */ |\
+	HRCWL_DDR_TO_SCB_CLK_2X1 |\
+	HRCWL_CSB_TO_CLKIN_4X1 |\
+	HRCWL_CORE_TO_CSB_2_5X1)
+
+#define CFG_NS16550_CLK (CONFIG_83XX_CLKIN * 4)
+
+#define CFG_HRCW_HIGH_BASE (\
+	HRCWH_PCI_HOST |\
+	HRCWH_PCI1_ARBITER_ENABLE |\
+	HRCWH_CORE_ENABLE |\
+	HRCWH_BOOTSEQ_DISABLE |\
+	HRCWH_SW_WATCHDOG_DISABLE |\
+	HRCWH_TSEC1M_IN_RGMII |\
+	HRCWH_TSEC2M_IN_RGMII |\
+	HRCWH_BIG_ENDIAN |\
+	HRCWH_LALE_NORMAL)
+
+#ifdef CONFIG_NAND_LP
+#define CFG_HRCW_HIGH (CFG_HRCW_HIGH_BASE |\
+		       HRCWH_FROM_0XFFF00100 |\
+		       HRCWH_ROM_LOC_NAND_LP_8BIT |\
+		       HRCWH_RL_EXT_NAND)
+#else
+#define CFG_HRCW_HIGH (CFG_HRCW_HIGH_BASE |\
+		       HRCWH_FROM_0XFFF00100 |\
+		       HRCWH_ROM_LOC_NAND_SP_8BIT |\
+		       HRCWH_RL_EXT_NAND)
+#endif
+
+/* System IO Config */
+#define CFG_SICRH	(SICRH_TSOBI1 | SICRH_TSOBI2)	/* RGMII */
+#define CFG_SICRL	SICRL_USBDR			/* Enable Internal USB Phy  */
+
+#define CFG_HID0_INIT	0x000000000
+#define CFG_HID0_FINAL	(HID0_ENABLE_MACHINE_CHECK | \
+			 HID0_ENABLE_DYNAMIC_POWER_MANAGMENT)
+
+#define CFG_HID2 HID2_HBE
+
+#define CONFIG_HIGH_BATS	1	/* High BATs supported */
+
+/* DDR @ 0x00000000 */
+#define CFG_IBAT0L	(CFG_SDRAM_BASE | BATL_PP_10)
+#define CFG_IBAT0U	(CFG_SDRAM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
+#define CFG_IBAT1L	((CFG_SDRAM_BASE + 0x10000000) | BATL_PP_10)
+#define CFG_IBAT1U	((CFG_SDRAM_BASE + 0x10000000) | BATU_BL_256M | BATU_VS | BATU_VP)
+
+/* PCI @ 0x80000000 */
+#define CFG_IBAT2L	(CFG_PCI1_MEM_BASE | BATL_PP_10)
+#define CFG_IBAT2U	(CFG_PCI1_MEM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
+#define CFG_IBAT3L	(CFG_PCI1_MMIO_BASE | BATL_PP_10 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
+#define CFG_IBAT3U	(CFG_PCI1_MMIO_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
+
+/* PCI2 not supported on 8313 */
+#define CFG_IBAT4L	(0)
+#define CFG_IBAT4U	(0)
+
+/* IMMRBAR @ 0xE0000000, PCI IO @ 0xE2000000 */
+#define CFG_IBAT5L	(CFG_IMMR | BATL_PP_10 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
+#define CFG_IBAT5U	(CFG_IMMR | BATU_BL_256M | BATU_VS | BATU_VP)
+
+/* SDRAM @ 0xF0000000, stack in DCACHE 0xFDF00000 & FLASH @ 0xFE000000 */
+#define CFG_IBAT6L	(0xF0000000 | BATL_PP_10)
+#define CFG_IBAT6U	(0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
+
+#define CFG_IBAT7L	(0)
+#define CFG_IBAT7U	(0)
+
+#define CFG_DBAT0L	CFG_IBAT0L
+#define CFG_DBAT0U	CFG_IBAT0U
+#define CFG_DBAT1L	CFG_IBAT1L
+#define CFG_DBAT1U	CFG_IBAT1U
+#define CFG_DBAT2L	CFG_IBAT2L
+#define CFG_DBAT2U	CFG_IBAT2U
+#define CFG_DBAT3L	CFG_IBAT3L
+#define CFG_DBAT3U	CFG_IBAT3U
+#define CFG_DBAT4L	CFG_IBAT4L
+#define CFG_DBAT4U	CFG_IBAT4U
+#define CFG_DBAT5L	CFG_IBAT5L
+#define CFG_DBAT5U	CFG_IBAT5U
+#define CFG_DBAT6L	CFG_IBAT6L
+#define CFG_DBAT6U	CFG_IBAT6U
+#define CFG_DBAT7L	CFG_IBAT7L
+#define CFG_DBAT7U	CFG_IBAT7U
+
+/*
+ * Internal Definitions
+ *
+ * Boot Flags
+ */
+#define BOOTFLAG_COLD	0x01	/* Normal Power-On: Boot from FLASH */
+#define BOOTFLAG_WARM	0x02	/* Software reboot */
+
+/*
+ * Environment Configuration
+ */
+#define CONFIG_ENV_OVERWRITE
+
+#define CONFIG_NETDEV		eth1
+
+#define CONFIG_HOSTNAME		simpc8313
+#define CONFIG_ROOTPATH		/tftpboot/10.196.31.85
+#define CONFIG_BOOTFILE		/tftpboot/uImage
+#define CONFIG_UBOOTPATH	u-boot-nand.bin	/* U-Boot image on TFTP server */
+#define CONFIG_FDTFILE		simpc8313.dtb
+
+#define CONFIG_LOADADDR		500000	/* default location for tftp and bootm */
+#define CONFIG_BOOTDELAY	5	/* 5 second delay */
+#define CONFIG_BAUDRATE		115200
+
+#define CONFIG_BOOTCOMMAND	"nand read 500000 kernel 600000;bootm 500000 - ae0000"
+
+#define XMK_STR(x)	#x
+#define MK_STR(x)	XMK_STR(x)
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	"netdev=" MK_STR(CONFIG_NETDEV) "\0"				\
+	"ethprime=TSEC1\0"						\
+	"uboot=" MK_STR(CONFIG_UBOOTPATH) "\0"				\
+	"tftpflash=tftpboot $loadaddr $uboot; "				\
+		"protect off " MK_STR(TEXT_BASE) " +$filesize; "	\
+		"erase " MK_STR(TEXT_BASE) " +$filesize; "		\
+		"cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; "	\
+		"protect on " MK_STR(TEXT_BASE) " +$filesize; "		\
+		"cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0"	\
+	"fdtaddr=400000\0"						\
+	"fdtfile=" MK_STR(CONFIG_FDTFILE) "\0"				\
+	"console=ttyS0\0"						\
+	"setbootargs=setenv bootargs "					\
+		"root=$rootdev rw console=$console,$baudrate $othbootargs\0" \
+	"setipargs=setenv bootargs nfsroot=$serverip:$rootpath "	 \
+		"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
+		"root=$rootdev rw console=$console,$baudrate $othbootargs\0"	\
+	"load_uboot=tftp 100000 u-boot-nand.bin\0"			\
+	"burn_uboot=nand erase u-boot 80000; "				\
+		"nand write 100000 u-boot $filesize\0"			\
+	"update_uboot=run load_uboot;run burn_uboot\0"			\
+	"mtdids=nand0=nand0\0"						\
+	"mtdparts=mtdparts=nand0:2M(u-boot),6M(kernel),-(jffs2)\0"	\
+	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
+		"nfsroot=${serverip}:${rootpath}\0"			\
+	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
+	"addip=setenv bootargs ${bootargs} "				\
+		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
+		":${hostname}:${netdev}:off panic=1\0"			\
+	"addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0"	\
+	"bootargs=root=/dev/mtdblock2 rootfstype=jffs2 rw "		\
+		"console=ttyS0,115200\0"				\
+	""
+
+#define CONFIG_NFSBOOTCOMMAND						\
+	"setenv rootdev /dev/nfs;"					\
+	"run setbootargs;"						\
+	"run setipargs;"						\
+	"tftp $loadaddr $bootfile;"					\
+	"tftp $fdtaddr $fdtfile;"					\
+	"bootm $loadaddr - $fdtaddr"
+
+#define CONFIG_RAMBOOTCOMMAND						\
+	"setenv rootdev /dev/ram;"					\
+	"run setbootargs;"						\
+	"tftp $ramdiskaddr $ramdiskfile;"				\
+	"tftp $loadaddr $bootfile;"					\
+	"tftp $fdtaddr $fdtfile;"					\
+	"bootm $loadaddr $ramdiskaddr $fdtaddr"
+
+#undef MK_STR
+#undef XMK_STR
+
+#endif	/* __CONFIG_H */
diff --git a/nand_spl/board/sheldon/simpc8313/Makefile b/nand_spl/board/sheldon/simpc8313/Makefile
new file mode 100644
index 0000000..ba79619
--- /dev/null
+++ b/nand_spl/board/sheldon/simpc8313/Makefile
@@ -0,0 +1,101 @@
+#
+# (C) Copyright 2007
+# Stefan Roese, DENX Software Engineering, sr at denx.de.
+# (C) Copyright 2008 Freescale Semiconductor
+# (C) Copyright Sheldon Instruments, Inc. 2008
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+NAND_SPL := y
+TEXT_BASE := 0xfff00000
+
+include $(TOPDIR)/config.mk
+
+LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
+LDFLAGS	= -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
+AFLAGS	+= -DCONFIG_NAND_SPL
+CFLAGS	+= -DCONFIG_NAND_SPL
+
+SOBJS	= start.o ticks.o
+COBJS	= nand_boot_fsl_elbc.o $(BOARD).o sdram.o ns16550.o nand_init.o time.o
+
+SRCS	:= $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
+OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
+__OBJS	:= $(SOBJS) $(COBJS)
+LNDIR	:= $(OBJTREE)/nand_spl/board/$(BOARDDIR)
+
+nandobj	:= $(OBJTREE)/nand_spl/
+
+ALL	= $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
+
+all:	$(obj).depend $(ALL)
+
+$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
+	$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
+
+$(nandobj)u-boot-spl.bin:	$(nandobj)u-boot-spl
+	$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
+
+$(nandobj)u-boot-spl:	$(OBJS)
+	cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) \
+		-Map $(nandobj)u-boot-spl.map \
+		-o $(nandobj)u-boot-spl
+
+# create symbolic links for common files
+
+$(obj)start.S:
+	ln -sf $(SRCTREE)/cpu/mpc83xx/start.S $(obj)start.S
+
+$(obj)nand_boot_fsl_elbc.c:
+	ln -sf $(SRCTREE)/nand_spl/nand_boot_fsl_elbc.c \
+	       $(obj)nand_boot_fsl_elbc.c
+
+$(obj)sdram.c:
+	ln -sf $(SRCTREE)/board/$(BOARDDIR)/sdram.c $(obj)sdram.c
+
+$(obj)$(BOARD).c:
+	ln -sf $(SRCTREE)/board/$(BOARDDIR)/$(BOARD).c $(obj)$(BOARD).c
+
+$(obj)ns16550.c:
+	ln -sf $(SRCTREE)/drivers/serial/ns16550.c $(obj)ns16550.c
+
+$(obj)nand_init.c:
+	ln -sf $(SRCTREE)/cpu/mpc83xx/nand_init.c $(obj)nand_init.c
+
+$(obj)time.c:
+	ln -sf $(SRCTREE)/lib_ppc/time.c $(obj)time.c
+
+$(obj)ticks.S:
+	ln -sf $(SRCTREE)/lib_ppc/ticks.S $(obj)ticks.S
+
+#########################################################################
+
+$(obj)%.o:	$(obj)%.S
+	$(CC) $(AFLAGS) -c -o $@ $<
+
+$(obj)%.o:	$(obj)%.c
+	$(CC) $(CFLAGS) -c -o $@ $<
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/nand_spl/board/sheldon/simpc8313/u-boot.lds b/nand_spl/board/sheldon/simpc8313/u-boot.lds
new file mode 100644
index 0000000..40c4145
--- /dev/null
+++ b/nand_spl/board/sheldon/simpc8313/u-boot.lds
@@ -0,0 +1,52 @@
+/*
+ * (C) Copyright 2006
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Copyright 2008 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SECTIONS
+{
+	. = 0xfff00000;
+	.text : {
+		*(.text*)
+		. = ALIGN(16);
+		*(.rodata*)
+		*(.eh_frame)
+	}
+
+	. = ALIGN(8);
+	.data : {
+		*(.data*)
+		*(.sdata*)
+		_GOT2_TABLE_ = .;
+		*(.got2)
+		__got2_entries = (. - _GOT2_TABLE_) >> 2;
+	}
+
+	. = ALIGN(8);
+	__bss_start = .;
+	.bss (NOLOAD) : { *(.*bss) }
+	_end = .;
+}
+ENTRY(_start)
+ASSERT(_end <= 0xfff01000, "NAND bootstrap too big");
-- 
1.5.5.1

[U-Boot] [PATCH] mpc83xx: New board support SIMPC8313

[Kim Phillips]

On Tue,  4 Nov 2008 16:37:45 -0800
Ron Madrid <ron_madrid@sbcglobal.net> wrote:

> This patch will create a new board, SIMPC8313, from Sheldon Instruments.  This
> board boots from NAND devices and is configurable for either a large page or
> small page device.
> 
> Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>

Hi Ron, thanks for this; can you please describe how memory is
connected (soldered vs. non-), and give us some brief info regarding
the board's other features/interfaces, e.g. number & nature of ethernet
ports, pci interfaces, PHYs...

> ---
>  MAINTAINERS                                 |    4 +
>  MAKEALL                                     |    1 +
>  Makefile                                    |   20 +
>  board/sheldon/simpc8313/Makefile            |   50 +++
>  board/sheldon/simpc8313/config.mk           |   13 +
>  board/sheldon/simpc8313/sdram.c             |  206 +++++++++++
>  board/sheldon/simpc8313/simpc8313.c         |  136 +++++++
>  doc/README.simpc8313                        |   71 ++++
>  include/configs/SIMPC8313.h                 |  534 +++++++++++++++++++++++++++
>  nand_spl/board/sheldon/simpc8313/Makefile   |  101 +++++
>  nand_spl/board/sheldon/simpc8313/u-boot.lds |   52 +++
>  11 files changed, 1188 insertions(+), 0 deletions(-)

although this patch applies, it doesn't build due to the CFG_ ->
CONFIG_SYS_ change; please s/CFG_/CONFIG_SYS_/g to avoid getting this
(and a slew of other errors):

...NAND...Configuring for SIMPC8313 board...
In file included from simpc8313.c:32:
/home/kim/git/u-boot/include/ns16550.h:108:2: error: #error "Please define NS16550 registers size."

> diff --git a/MAINTAINERS b/MAINTAINERS
> index 750e374..f844ef4 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -259,6 +259,10 @@ Jon Loeliger <jdl@freescale.com>
>  
>  	MPC8641HPCN	MPC8641D
>  
> +Ron Madrid <info@sheldoninst.com>

hmm..I'm not sure if this email address is acceptable.

> diff --git a/MAKEALL b/MAKEALL
> index 9ccb9ac..635bd0d 100755
> --- a/MAKEALL
> +++ b/MAKEALL
> @@ -339,6 +339,7 @@ LIST_83xx="		\
>  	MPC837XEMDS	\
>  	MPC837XERDB	\
>  	MVBLM7		\
> +	SIMPC8313_LP	\
>  	sbc8349		\
>  	TQM834x		\

please move SIMPC8313 below sbc8349 to maintain alpha order

>  "
> diff --git a/Makefile b/Makefile
> index 7c13ce8..20c6d9c 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -2248,6 +2248,26 @@ MPC837XERDB_config:	unconfig
>  MVBLM7_config: unconfig
>  	@$(MKCONFIG) $(@:_config=) ppc mpc83xx mvblm7 matrix_vision
>  
> +SIMPC8313_LP_config \
> +SIMPC8313_SP_config: unconfig
> +	@mkdir -p $(obj)include
> +	@mkdir -p $(obj)board/sheldon/simpc8313
> +	@mkdir -p $(obj)nand_spl/board/sheldon/simpc8313

what happens if you leave out the line above?

> +	@if [ "$(findstring _LP_,$@)" ] ; then \
> +		$(XECHO) -n "...NAND..." ; \
> +		echo "TEXT_BASE = 0x00100000" > $(obj)board/sheldon/simpc8313/config.tmp ; \
> +		echo "#define CONFIG_NAND_U_BOOT" >> $(obj)include/config.h ; \
> +		echo "#define CONFIG_NAND_LP" >> $(obj)include/config.h ; \
> +	fi ; \
> +	if [ "$(findstring _SP_,$@)" ] ; then \
> +		$(XECHO) -n "...NAND..." ; \

might want to inform the user whether they are building a small vs.
large NAND page u-boot.

> +		echo "TEXT_BASE = 0x00100000" > $(obj)board/sheldon/simpc8313/config.tmp ; \

TEXT_BASE doesn't differ between the two - can we rm these lines from
here and change the value of the one in the board's config.mk file?  If
the board can't boot from anything but nand, might want to put
CONFIG_NAND_U_BOOT elsewhere, too.

> +		echo "#define CONFIG_NAND_U_BOOT" >> $(obj)include/config.h ; \
> +		echo "#define CONFIG_NAND_SP" >> $(obj)include/config.h ; \
> +	fi ;
> +	@$(MKCONFIG) -a SIMPC8313 ppc mpc83xx simpc8313 sheldon
> +	@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
> +
>  sbc8349_config:		unconfig
>  	@$(MKCONFIG) $(@:_config=) ppc mpc83xx sbc8349

the new board target code belongs after the sbc8349 (alpha order again).

> diff --git a/board/sheldon/simpc8313/Makefile b/board/sheldon/simpc8313/Makefile

> +include $(TOPDIR)/config.mk
> +
> +LIB	= $(obj)lib$(BOARD).a
> +
> +COBJS	:= $(BOARD).o sdram.o
> +
> +SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
> +OBJS	:= $(addprefix $(obj),$(COBJS))
> +SOBJS	:= $(addprefix $(obj),$(SOBJS))

please clean up the code alignment here.

> diff --git a/board/sheldon/simpc8313/config.mk b/board/sheldon/simpc8313/config.mk
> new file mode 100644
> index 0000000..95f6481
> --- /dev/null
> +++ b/board/sheldon/simpc8313/config.mk
> @@ -0,0 +1,13 @@
> +ifndef NAND_SPL
> +sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
> +endif
> +
> +ifndef TEXT_BASE
> +TEXT_BASE = 0xFE000000

this is the place I was referring to in the Makefile comment above.

> diff --git a/board/sheldon/simpc8313/sdram.c b/board/sheldon/simpc8313/sdram.c
> new file mode 100644
> index 0000000..4af29e2
> --- /dev/null
> +++ b/board/sheldon/simpc8313/sdram.c
> @@ -0,0 +1,206 @@
> +/*
> + * Copyright (C) Sheldon Instruments, Inc. 2008
> + *
> + * Author: Ron Madrid <info@sheldoninst.com>
> + * Adapted from ../freescale/mpc8313erdb/sdram.c

if that's true, you've neglected to carry the Freescale copyright.

> + *
> + * (C) Copyright 2006
> + * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS for A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + */

the last part of the address of the FSF is missing.

> +static long fixed_sdram(void);

can you reorder the functions to avoid having to have these types of
declarations?

> +#if defined(CONFIG_NAND_SPL)
> +#define puts(v) {}

why is this necessary? do you mean to delete the puts() calls
themselves?

> +void si_read_i2c(int, int, u8*);
> +void si_wait_i2c(void);

please reorder the functions to eliminate these declarations, thanks.

> +#endif
> +
> +#define DDRLAWAR_SIZE	   0x0000003F

please use LAWAR_SIZE instead.

> +phys_size_t initdram(int board_type)
> +{
> +	volatile immap_t *im = (immap_t *) CFG_IMMR;
> +	volatile lbus83xx_t *lbc= &im->lbus;
> +
> +	u32 msize = 0;

initialization not needed.

> +	if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im)
> +		return -1;
> +
> +	puts("Initializing\n");
> +
> +	/* DDR SDRAM - Main SODIMM */
> +	im->sysconf.ddrlaw[0].bar = CFG_DDR_BASE & LAWBAR_BAR;
> +
> +	msize = fixed_sdram();
> +
> +	/* Local Bus setup lbcr and mrtpr */
> +	lbc->lbcr = CFG_LBC_LBCR;
> +	lbc->mrtpr = CFG_LBC_MRTPR;
> +	sync();
> +
> +	puts("   DDR RAM: ");
> +	/* return total bus SDRAM size(bytes)  -- DDR */
> +	return (msize * 1024 * 1024);
> +}
> +
> +/*************************************************************************
> + *  fixed sdram init -- reads values from boot sequencer I2C
> + ************************************************************************/
> +static long fixed_sdram(void)
> +{
> +	volatile immap_t *im = (immap_t *) CFG_IMMR;

s/CFG_/CONFIG_SYS_/g

> +	u32 msizelog2, msize = 1;
> +#if defined(CONFIG_NAND_SPL)
> +	u32 i;
> +	u8 buffer[135];
> +	u32 lbyte = 0, count = 135;

lbyte can be factored out (it's only used once), count can have a more
descriptive name, made a const int, and moved above buffer and be used
in buffer's definition.

> +	u32 addr = 0, data = 0;

these don't need to be initialized.

> +
> +	si_read_i2c(lbyte, count, buffer);
> +
> +	for (i = 18; i < count; i+=7){

s/i+=7/i += 7/

> +		*((u32 *)(CFG_IMMR + addr)) = data;

use the out_be32 i/o memory accessor and friends please (here and
elsewhere in the patch).

> +#if defined(CONFIG_NAND_SPL)
> +void si_read_i2c(int lbyte, int count, u8 *buffer)
> +{
> +	u8 chip = 0x50; /* boot sequencer I2C */
> +	u8 ubyte;
> +	u8 dummy;
> +	u32 i;
> +	volatile immap_t *im = (immap_t *) CFG_IMMR;
> +
> +	chip <<= 1;
> +	ubyte = (lbyte&0xff00)>>8;

u-boot codingstyle makes this:

ubyte = (lbyte & 0xff00) >> 8;

> diff --git a/board/sheldon/simpc8313/simpc8313.c b/board/sheldon/simpc8313/simpc8313.c
> new file mode 100644
> index 0000000..8875973
> --- /dev/null
> +++ b/board/sheldon/simpc8313/simpc8313.c
> @@ -0,0 +1,136 @@
> +/*
> + * Copyright (C) Sheldon Instruments, Inc. 2008
> + *
> + * Author: Ron Madrid <info@sheldoninst.com>
> + * Adapted from board/freescale/mpc8313erdb/mpc8313erdb.c

again, please maintain copyrights of others.

> +#include <common.h>
> +#if defined(CONFIG_OF_LIBFDT)
> +#include <libfdt.h>
> +#endif

protecting this include isn't necessary anymore.

> diff --git a/doc/README.simpc8313 b/doc/README.simpc8313

> +4.2	Downloading and Booting Linux Kernel
> +
> +	TODO:

are you not able to boot an OS?

> +#define CONFIG_ROOTPATH		/tftpboot/10.196.31.85

this doesn't look like a path to an nfs server.

> +#define CONFIG_BOOTCOMMAND	"nand read 500000 kernel 600000;bootm 500000 - ae0000"

instead of hardcoding, please use $loadaddr, $fdtaddr, etc.

Kim

[U-Boot] [PATCH] mpc83xx: New board support SIMPC8313

[Ron Madrid]

Kim,

Thank you for the feedback.  I am in the process of implementing
the appropriate changes, however I have a couple of questions/
concerns about your review.

> 
> ...NAND...Configuring for SIMPC8313 board...
> In file included from simpc8313.c:32:
> /home/kim/git/u-boot/include/ns16550.h:108:2: error: #error "Please define 
> NS16550 registers size."

I have this line in my board config file:
#define CFG_NS16550_REG_SIZE    1
So I don't know where this error would come from as I did not see it when
I performed my builds

> > +Ron Madrid <info@sheldoninst.com>
> 
> hmm..I'm not sure if this email address is acceptable.
> 

What are acceptable email addresses if this one in fact is not?

[U-Boot] [PATCH] mpc83xx: New board support SIMPC8313

[Kim Phillips]

On Mon, 10 Nov 2008 13:45:53 -0800 (PST)
Ron Madrid <ron_madrid@sbcglobal.net> wrote:

> > ...NAND...Configuring for SIMPC8313 board...
> > In file included from simpc8313.c:32:
> > /home/kim/git/u-boot/include/ns16550.h:108:2: error: #error "Please define 
> > NS16550 registers size."
> 
> I have this line in my board config file:
> #define CFG_NS16550_REG_SIZE    1
> So I don't know where this error would come from as I did not see it when
> I performed my builds

your tree is not up to date as of at least this commit:

commit 6d0f6bcf337c5261c08fabe12982178c2c489d76
Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Date:   Thu Oct 16 15:01:15 2008 +0200

    rename CFG_ macros to CONFIG_SYS
    
    Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

which changed what ns16550 is expecting from CFG_NS16550_REG_SIZE to
CONFIG_SYS_NS16550_REG_SIZE.

> > > +Ron Madrid <info@sheldoninst.com>
> > 
> > hmm..I'm not sure if this email address is acceptable.
> > 
> 
> What are acceptable email addresses if this one in fact is not?

I would think ones that are more likely to be directly associated with
a human being that is familiar with u-boot, e.g.:

Ron Madrid <ron_madrid@sbcglobal.net>

:)

Kim

[U-Boot] [PATCH] mpc83xx: New board support SIMPC8313

[Ron Madrid]

> > > > +Ron Madrid 
> > > 
> > > hmm..I'm not sure if this email address is acceptable.
> > > 
> > 
> > What are acceptable email addresses if this one in fact is not?
> 
> I would think ones that are more likely to be directly associated with
> a human being that is familiar with u-boot, e.g.:
> 
> Ron Madrid 
> 

While my familiarity with u-boot is still up for debate, what would happen should I no longer be employed by my current employer.  I would not want to continue to be listed as a maintainer for a u-boot project that I am not associated with, or much less begin to receive email regarding the project.  BTW, a work email address is not a possibility.

Ron

[U-Boot] [PATCH] mpc83xx: New board support SIMPC8313

[Wolfgang Denk]

Dear Ron,

In message <9954.60540.qm@web83502.mail.sp1.yahoo.com> you wrote:
> > > 
> > > What are acceptable email addresses if this one in fact is not?
> > 
> > I would think ones that are more likely to be directly associated with
> > a human being that is familiar with u-boot, e.g.:
> > 
> > Ron Madrid 
> > 
> 
> While my familiarity with u-boot is still up for debate, what would happen should I no longer be employed by my current employer.  I would not want to continue to be listed as a maintainer for a u-boot project that I am not associated with, or much less
>  begin to receive email regarding the project.  BTW, a work email address is not a possibility.

The sign-off is a short form  for  the  "Developer's  Certificate  of
Origin 1.1" (see Documentation/SubmittingPatches in your Linux kernel
tree).  It is your veryown signature, not some anonymous company mail
address where nobody can be made responsible for.

Feel free to add some generic  address  to  the  MAINTAINERS  file  -
that's  ok. But it is you as a person who is signing the postings. So
it has to be your own (current) mail address.

If needed, we will track you down later ;-)

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
If I had to live my life again,  I'd  make  the  same  mistakes, only
sooner.                                          -- Tallulah Bankhead

[U-Boot] [PATCH] mpc83xx: New board support SIMPC8313

[Ron Madrid]

> TEXT_BASE doesn't differ between the two - can we rm these lines from
> here and change the value of the one in the board's config.mk file?  If
> the board can't boot from anything but nand, might want to put
> CONFIG_NAND_U_BOOT elsewhere, too.

Would it be appropriate to put the CONFIG_NAND_U_BOOT in
the board config file?  It would seem that this would have the
same effect as placing it in the config.h file, but I don't know if
there is something that would prohibit this.

Ron

[U-Boot] [PATCH] mpc83xx: New board support SIMPC8313

[Kim Phillips]

On Tue, 11 Nov 2008 14:26:11 -0800 (PST)
Ron Madrid <ron_madrid@sbcglobal.net> wrote:

> > TEXT_BASE doesn't differ between the two - can we rm these lines from
> > here and change the value of the one in the board's config.mk file?  If
> > the board can't boot from anything but nand, might want to put
> > CONFIG_NAND_U_BOOT elsewhere, too.
> 
> Would it be appropriate to put the CONFIG_NAND_U_BOOT in
> the board config file?  It would seem that this would have the
> same effect as placing it in the config.h file, but I don't know if
> there is something that would prohibit this.

me neither; I suppose it's ok.

Kim

[U-Boot] [PATCH] mpc83xx: New board support SIMPC8313

[Ron Madrid]

> 
> > +        *((u32 *)(CFG_IMMR + addr)) = data;
> 
> use the out_be32 i/o memory accessor and friends please (here and
> elsewhere in the patch).
> 

I am trying to resolve this last issue with your review and replacing
all of the i/o memory accesses with in/out_be* has caused my
code to inflate by about 200 bytes, and now I'm over the 4K limit 
by about 160 bytes for the 8313 bootstrap.  Without trying to
squeeze my code is there anything that could be done to shrink
my code?

Ron

[U-Boot] [PATCH] mpc83xx: New board support SIMPC8313

[Scott Wood]

Ron Madrid wrote:
>>> +        *((u32 *)(CFG_IMMR + addr)) = data;
>> use the out_be32 i/o memory accessor and friends please (here and
>> elsewhere in the patch).
>>
> 
> I am trying to resolve this last issue with your review and replacing
> all of the i/o memory accesses with in/out_be* has caused my
> code to inflate by about 200 bytes, and now I'm over the 4K limit 
> by about 160 bytes for the 8313 bootstrap.  Without trying to
> squeeze my code is there anything that could be done to shrink
> my code?

Use raw accessors and make sure that explicit barriers are used where 
needed.

-Scott

[U-Boot] [PATCH] mpc83xx: New board support SIMPC8313

[Ron Madrid]

> Use raw accessors and make sure that explicit barriers are used where 
> needed.

Is there somewhere that I can find information regarding when and where are the appropriate places are to use barriers?

Ron

[U-Boot] [PATCH] mpc83xx: New board support SIMPC8313

[Scott Wood]

Ron Madrid wrote:
>> Use raw accessors and make sure that explicit barriers are used where 
>> needed.
> 
> Is there somewhere that I can find information regarding when and where are the appropriate places are to use barriers?

Basically, you need a barrier any time ordering matters.  If access A 
needs to happen before access B, put a sync between them.

-Scott