From mboxrd@z Thu Jan 1 00:00:00 1970 From: Dirk Behme Date: Sat, 15 Nov 2008 06:52:40 +0100 Subject: [U-Boot] [PATCH] OMAP3: set L1NEON bit in aux control register In-Reply-To: <1226703695-14978-1-git-send-email-mans@mansr.com> References: <1226703695-14978-1-git-send-email-mans@mansr.com> Message-ID: <491E63A8.5090206@googlemail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Mans Rullgard wrote: > This is required to work around ARM erratum 621766, affecting > Cortex-A8 r1p0-3: > > When a sequence of Neon load instructions is intermixed with several > branches, some of which are mispredicted, it is possible for the > processor to deadlock due to Neon loads on the speculative path not > being properly flushed from the Neon load queue. > > Signed-off-by: Mans Rullgard Acked-by: Dirk Behme --- Jean-Christophe: This is for u-boot-arm/omap3, so please read the subject as "[PATCH-OMAP3] OMAP3: ..." > --- > cpu/arm_cortexa8/omap3/board.c | 2 ++ > 1 files changed, 2 insertions(+), 0 deletions(-) > > diff --git a/cpu/arm_cortexa8/omap3/board.c b/cpu/arm_cortexa8/omap3/board.c > index 90809a6..7c2a7ea 100644 > --- a/cpu/arm_cortexa8/omap3/board.c > +++ b/cpu/arm_cortexa8/omap3/board.c > @@ -139,6 +139,8 @@ void setup_auxcr() > __asm__ __volatile__("mrc p15, 0, r0, c1, c0, 1"); > /* Enabling ASA */ > __asm__ __volatile__("orr r0, r0, #0x10"); > + /* Enable L1NEON */ > + __asm__ __volatile__("orr r0, r0, #1<<5"); > /* SMI instruction to call ROM Code API */ > __asm__ __volatile__(".word 0xE1600070"); > __asm__ __volatile__("mov r0, %0":"=r"(i));