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* [U-Boot] [PATCH] net: tsec: Fix Marvell 88E1121R phy init
@ 2008-12-02  9:31 Anatolij Gustschin
  2008-12-02 21:46 ` Andy Fleming
  0 siblings, 1 reply; 3+ messages in thread
From: Anatolij Gustschin @ 2008-12-02  9:31 UTC (permalink / raw)
  To: u-boot

This patch tries to ensure that phy interrupt pin
won't be asserted after booting. We experienced
following issues with current 88E1121R phy init:

Marvell 88E1121R phy can be hardware-configured
to share MDC/MDIO and interrupt pins for both ports
P0 and P1 (e.g. as configured on socrates board).
Port 0 interrupt pin will be shared by both ports
in such configuration. After booting Linux and
configuring eth0 interface, port 0 phy interrupts
are enabled. After rebooting without proper eth0
interface shutdown port 0 phy interrupts remain
enabled so any change on port 0 (link status, etc.)
cause assertion of the interrupt. Now booting Linux
and configuring eth1 interface will cause permanent
phy interrupt storm as the registered phy 1 interrupt
handler doesn't acknowledge phy 0 interrupts. This
of course should be fixed in Linux driver too.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
---
 drivers/net/tsec.c |    3 +++
 include/tsec.h     |    4 ++++
 2 files changed, 7 insertions(+), 0 deletions(-)

diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index d7da081..2ced585 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -1196,6 +1196,9 @@ struct phy_info phy_info_M88E1121R = {
 			   {MIIM_88E1121_PHY_LED_CTRL, miim_read,
 			    &mii_88E1121_set_led},
 			   {MIIM_CONTROL, MIIM_CONTROL_INIT, &mii_cr_init},
+			   /* Disable IRQs and de-assert interrupt */
+			   {MIIM_88E1121_PHY_IRQ_EN, 0, NULL},
+			   {MIIM_88E1121_PHY_IRQ_STATUS, miim_read, NULL},
 			   {miim_end,}
 			   },
 	(struct phy_cmd[]){	/* startup */
diff --git a/include/tsec.h b/include/tsec.h
index d2951f6..7b52e06 100644
--- a/include/tsec.h
+++ b/include/tsec.h
@@ -226,6 +226,10 @@
 #define MIIM_88E1121_PHY_LED_PAGE	3
 #define MIIM_88E1121_PHY_LED_DEF	0x0030
 
+/* 88E1121 PHY IRQ Enable/Status Register */
+#define MIIM_88E1121_PHY_IRQ_EN		18
+#define MIIM_88E1121_PHY_IRQ_STATUS	19
+
 #define MIIM_88E1121_PHY_PAGE		22
 
 /* 88E1145 Extended PHY Specific Control Register */
-- 
1.5.3.3

^ permalink raw reply related	[flat|nested] 3+ messages in thread

* [U-Boot] [PATCH] net: tsec: Fix Marvell 88E1121R phy init
  2008-12-02  9:31 [U-Boot] [PATCH] net: tsec: Fix Marvell 88E1121R phy init Anatolij Gustschin
@ 2008-12-02 21:46 ` Andy Fleming
  2008-12-05  7:09   ` Ben Warren
  0 siblings, 1 reply; 3+ messages in thread
From: Andy Fleming @ 2008-12-02 21:46 UTC (permalink / raw)
  To: u-boot

On Tue, Dec 2, 2008 at 3:31 AM, Anatolij Gustschin <agust@denx.de> wrote:
> This patch tries to ensure that phy interrupt pin
> won't be asserted after booting. We experienced
> following issues with current 88E1121R phy init:
>
> Marvell 88E1121R phy can be hardware-configured
> to share MDC/MDIO and interrupt pins for both ports
> P0 and P1 (e.g. as configured on socrates board).
> Port 0 interrupt pin will be shared by both ports
> in such configuration. After booting Linux and
> configuring eth0 interface, port 0 phy interrupts
> are enabled. After rebooting without proper eth0
> interface shutdown port 0 phy interrupts remain
> enabled so any change on port 0 (link status, etc.)
> cause assertion of the interrupt. Now booting Linux
> and configuring eth1 interface will cause permanent
> phy interrupt storm as the registered phy 1 interrupt
> handler doesn't acknowledge phy 0 interrupts. This
> of course should be fixed in Linux driver too.

Agreed, and...

>
> Signed-off-by: Anatolij Gustschin <agust@denx.de>

Acked-by: Andy Fleming <afleming@freescale.com>

^ permalink raw reply	[flat|nested] 3+ messages in thread

* [U-Boot] [PATCH] net: tsec: Fix Marvell 88E1121R phy init
  2008-12-02 21:46 ` Andy Fleming
@ 2008-12-05  7:09   ` Ben Warren
  0 siblings, 0 replies; 3+ messages in thread
From: Ben Warren @ 2008-12-05  7:09 UTC (permalink / raw)
  To: u-boot

Hi Anatolij & Andy,

Andy Fleming wrote:
> On Tue, Dec 2, 2008 at 3:31 AM, Anatolij Gustschin <agust@denx.de> wrote:
>   
>> This patch tries to ensure that phy interrupt pin
>> won't be asserted after booting. We experienced
>> following issues with current 88E1121R phy init:
>>
>> Marvell 88E1121R phy can be hardware-configured
>> to share MDC/MDIO and interrupt pins for both ports
>> P0 and P1 (e.g. as configured on socrates board).
>> Port 0 interrupt pin will be shared by both ports
>> in such configuration. After booting Linux and
>> configuring eth0 interface, port 0 phy interrupts
>> are enabled. After rebooting without proper eth0
>> interface shutdown port 0 phy interrupts remain
>> enabled so any change on port 0 (link status, etc.)
>> cause assertion of the interrupt. Now booting Linux
>> and configuring eth1 interface will cause permanent
>> phy interrupt storm as the registered phy 1 interrupt
>> handler doesn't acknowledge phy 0 interrupts. This
>> of course should be fixed in Linux driver too.
>>     
>
> Agreed, and...
>
>   
>> Signed-off-by: Anatolij Gustschin <agust@denx.de>
>>     
>
> Acked-by: Andy Fleming <afleming@freescale.com>
>   
Applied to net repo.

thanks,
Ben

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2008-12-05  7:09 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2008-12-02  9:31 [U-Boot] [PATCH] net: tsec: Fix Marvell 88E1121R phy init Anatolij Gustschin
2008-12-02 21:46 ` Andy Fleming
2008-12-05  7:09   ` Ben Warren

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