[U-Boot] [PATCH] TQM85xx: Fix a couple warnings in TQM8548 build

[U-Boot] [PATCH] TQM85xx: Fix a couple warnings in TQM8548 build

[Andy Fleming]

The ecm variable in sdram.c was being declared for all 8548, but only
used by specific 8548 boards, so we make that variable require those
specific boards, too

The nand code was using an index "i" into a table, and then re-using "i"
to set addresses for each upm.  However, then it relied on the old value
of i still being there to enable things.  Changed the second "i" to "j"

Signed-off-by: Andy Fleming <afleming@freescale.com>
---
I applied this to the 85xx tree, but if you could review it and confirm it
doesn't break anything...


 board/tqc/tqm85xx/nand.c  |    6 +++---
 board/tqc/tqm85xx/sdram.c |    2 ++
 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/board/tqc/tqm85xx/nand.c b/board/tqc/tqm85xx/nand.c
index dea652d..8133fdc 100644
--- a/board/tqc/tqm85xx/nand.c
+++ b/board/tqc/tqm85xx/nand.c
@@ -395,7 +395,7 @@ static void upmb_write (u_char addr, ulong val)
  */
 static void nand_upm_setup (volatile ccsr_lbc_t *lbc)
 {
-	uint i;
+	uint i, j;
 	uint or3 = CONFIG_SYS_OR3_PRELIM;
 	uint clock = get_lbc_clock ();
 
@@ -429,8 +429,8 @@ static void nand_upm_setup (volatile ccsr_lbc_t *lbc)
 	/* Assign address of table */
 	nand_upm_patt = upm_freq_table[i].upm_patt;
 
-	for (i = 0; i < 64; i++) {
-		upmb_write (i, *nand_upm_patt);
+	for (j = 0; j < 64; j++) {
+		upmb_write (j, *nand_upm_patt);
 		nand_upm_patt++;
 	}
 
diff --git a/board/tqc/tqm85xx/sdram.c b/board/tqc/tqm85xx/sdram.c
index 2b3de44..6d73a88 100644
--- a/board/tqc/tqm85xx/sdram.c
+++ b/board/tqc/tqm85xx/sdram.c
@@ -79,7 +79,9 @@ long int sdram_setup (int casl)
 	volatile ccsr_ddr_t *ddr = (void *)(CONFIG_SYS_MPC85xx_DDR_ADDR);
 #ifdef CONFIG_TQM8548
 	volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+#if defined(CONFIG_TQM8548_AG) || defined(CONFIG_TQM8548_BE)
 	volatile ccsr_local_ecm_t *ecm = (void *)(CONFIG_SYS_MPC85xx_ECM_ADDR);
+#endif
 #else /* !CONFIG_TQM8548 */
 	unsigned long cfg_ddr_timing1;
 	unsigned long cfg_ddr_mode;
-- 
1.6.0.6

[U-Boot] [PATCH] TQM85xx: Fix a couple warnings in TQM8548 build

[Jens Gehrlein]

Hi Andy,

Andy Fleming schrieb:
> The ecm variable in sdram.c was being declared for all 8548, but only
> used by specific 8548 boards, so we make that variable require those
> specific boards, too
> 

[snip]

> diff --git a/board/tqc/tqm85xx/sdram.c b/board/tqc/tqm85xx/sdram.c
> index 2b3de44..6d73a88 100644
> --- a/board/tqc/tqm85xx/sdram.c
> +++ b/board/tqc/tqm85xx/sdram.c
> @@ -79,7 +79,9 @@ long int sdram_setup (int casl)
>  	volatile ccsr_ddr_t *ddr = (void *)(CONFIG_SYS_MPC85xx_DDR_ADDR);
>  #ifdef CONFIG_TQM8548
>  	volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
> +#if defined(CONFIG_TQM8548_AG) || defined(CONFIG_TQM8548_BE)
>  	volatile ccsr_local_ecm_t *ecm = (void *)(CONFIG_SYS_MPC85xx_ECM_ADDR);
> +#endif
>  #else /* !CONFIG_TQM8548 */
>  	unsigned long cfg_ddr_timing1;
>  	unsigned long cfg_ddr_mode;

Currently ecm is only used in DDR20 workaround.

Strictly speaking, this workaround should apply to all TQM8548, not
only to its variants AG and BE, because it's valid for all CPU
revisions.

I overlooked this, when reviewing the patch "MPC85xx: TQM8548:
workaround for erratum DDR 19 and 20".

But I'm fine with the current code and your patch for now. Currently,
there are no other TQM8548 variants than AG and BE.

Kind regards,
Jens

[U-Boot] [PATCH] TQM85xx: Fix a couple warnings in TQM8548 build

[Wolfgang Grandegger]

Jens Gehrlein wrote:
> Hi Andy,
> 
> Andy Fleming schrieb:
>> The ecm variable in sdram.c was being declared for all 8548, but only
>> used by specific 8548 boards, so we make that variable require those
>> specific boards, too
>>
> 
> [snip]
> 
>> diff --git a/board/tqc/tqm85xx/sdram.c b/board/tqc/tqm85xx/sdram.c
>> index 2b3de44..6d73a88 100644
>> --- a/board/tqc/tqm85xx/sdram.c
>> +++ b/board/tqc/tqm85xx/sdram.c
>> @@ -79,7 +79,9 @@ long int sdram_setup (int casl)
>>  	volatile ccsr_ddr_t *ddr = (void *)(CONFIG_SYS_MPC85xx_DDR_ADDR);
>>  #ifdef CONFIG_TQM8548
>>  	volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
>> +#if defined(CONFIG_TQM8548_AG) || defined(CONFIG_TQM8548_BE)
>>  	volatile ccsr_local_ecm_t *ecm = (void *)(CONFIG_SYS_MPC85xx_ECM_ADDR);
>> +#endif
>>  #else /* !CONFIG_TQM8548 */
>>  	unsigned long cfg_ddr_timing1;
>>  	unsigned long cfg_ddr_mode;
> 
> Currently ecm is only used in DDR20 workaround.
> 
> Strictly speaking, this workaround should apply to all TQM8548, not
> only to its variants AG and BE, because it's valid for all CPU
> revisions.
> 
> I overlooked this, when reviewing the patch "MPC85xx: TQM8548:
> workaround for erratum DDR 19 and 20".

I decided to enable the work-around only for new TQM8548 board variants
as I'm not able to test the old ones.

> But I'm fine with the current code and your patch for now. Currently,
> there are no other TQM8548 variants than AG and BE.

Andy, thanks for the quick fix.

Wolfgang.