From: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 1/2] rtl8169: fix cache coherency problem
Date: Wed, 25 Feb 2009 14:27:24 +0900 [thread overview]
Message-ID: <49A4D6BC.3010608@renesas.com> (raw)
Fix the problem that cannot access actual data when CPU data cache enabled.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
---
drivers/net/rtl8169.c | 11 ++++++++++-
1 files changed, 10 insertions(+), 1 deletions(-)
diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c
index e9f6391..b441ec4 100644
--- a/drivers/net/rtl8169.c
+++ b/drivers/net/rtl8169.c
@@ -420,6 +420,8 @@ static int rtl_recv(struct eth_device *dev)
ioaddr = dev->iobase;
cur_rx = tpc->cur_rx;
+ flush_cache((unsigned long)&tpc->RxDescArray[cur_rx],
+ sizeof(struct RxDesc));
if ((le32_to_cpu(tpc->RxDescArray[cur_rx].status) & OWNbit) == 0) {
if (!(le32_to_cpu(tpc->RxDescArray[cur_rx].status) & RxRES)) {
unsigned char rxdata[RX_BUF_LEN];
@@ -437,6 +439,8 @@ static int rtl_recv(struct eth_device *dev)
cpu_to_le32(OWNbit + RX_BUF_SIZE);
tpc->RxDescArray[cur_rx].buf_addr =
cpu_to_le32((unsigned long)tpc->RxBufferRing[cur_rx]);
+ flush_cache((unsigned long)tpc->RxBufferRing[cur_rx],
+ RX_BUF_SIZE);
} else {
puts("Error Rx");
}
@@ -478,6 +482,7 @@ static int rtl_send(struct eth_device *dev, volatile void *packet, int length)
/* point to the current txb incase multiple tx_rings are used */
ptxb = tpc->Tx_skbuff[entry * MAX_ETH_FRAME_SIZE];
memcpy(ptxb, (char *)packet, (int)length);
+ flush_cache((unsigned long)ptxb, length);
while (len < ETH_ZLEN)
ptxb[len++] = '\0';
@@ -497,7 +502,10 @@ static int rtl_send(struct eth_device *dev, volatile void *packet, int length)
tpc->cur_tx++;
to = currticks() + TX_TIMEOUT;
- while ((le32_to_cpu(tpc->TxDescArray[entry].status) & OWNbit)
+ do {
+ flush_cache((unsigned long)&tpc->TxDescArray[entry],
+ sizeof(struct TxDesc));
+ } while ((le32_to_cpu(tpc->TxDescArray[entry].status) & OWNbit)
&& (currticks() < to)); /* wait */
if (currticks() >= to) {
@@ -639,6 +647,7 @@ static void rtl8169_init_ring(struct eth_device *dev)
tpc->RxBufferRing[i] = &rxb[i * RX_BUF_SIZE];
tpc->RxDescArray[i].buf_addr =
cpu_to_le32((unsigned long)tpc->RxBufferRing[i]);
+ flush_cache((unsigned long)tpc->RxBufferRing[i], RX_BUF_SIZE);
}
#ifdef DEBUG_RTL8169
--
1.5.5
next reply other threads:[~2009-02-25 5:27 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-02-25 5:27 Yoshihiro Shimoda [this message]
2009-04-03 21:54 ` [U-Boot] [PATCH 1/2] rtl8169: fix cache coherency problem Wolfgang Denk
2009-04-07 4:16 ` Nobuhiro Iwamatsu
2009-04-24 19:41 ` Wolfgang Denk
2009-04-24 23:42 ` Ben Warren
2009-04-27 22:18 ` Wolfgang Denk
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=49A4D6BC.3010608@renesas.com \
--to=shimoda.yoshihiro@renesas.com \
--cc=u-boot@lists.denx.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox