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From: Jerry Van Baren <gvb.uboot@gmail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] FSL DDR @ 83xx
Date: Mon, 02 Mar 2009 22:40:48 -0500	[thread overview]
Message-ID: <49ACA6C0.8020407@gmail.com> (raw)
In-Reply-To: <4940E05B.8000805@matrix-vision.de>

Andre Schwarz wrote:
> Kumar Gala schrieb:
>> On Dec 9, 2008, at 12:01 PM, Andre Schwarz wrote:
>>
>>> Jon Loeliger schrieb:
>>>> On Mon, 2008-12-08 at 18:02 +0100, Andre Schwarz wrote:
>>>>
>>>>> Kim,
>>>>>
>>>>> I'd like to change my DDR setup code since it looks like my computed
>>>>> values are not perfectly stable on our 8343 based board.
>>>>>
>>>>> This implies using a fake SPD and the related code to set up the
>>>>> controller.
>>>>>
>>>>> Is the "new" common FSL DDR setup code (cpu/mpc8xxx/ddr/*) stable for
>>>>> 83xx or shall I stick to cpu/mpc83xx/spd_sdram.c for a while ?
>>>>>
>>>> The new, common DDR code in use by the FSL boards does not
>>>> yet cover the 83xx family, though the plan is to eventually
>>>> do so.
>>>>
>>>> Patches in that direction, are, naturally, welcome... :-)
>>>>
>>>> jdl
>>>>
>>>>
>>>>
>>> Is anybody working on this ?
>>> The spd_sdram code lacks support for 3 bank adress bits and various
>>> termination schemes which
>>> are essential for tiny boards with soldered memory.
>>>
>>> Of course I could contribute for the 8343.
>>> But I don't now about the "others" (85xx/86x) in detail and don't want
>>> to scatter #ifdefs all over the code ...
>>>
>>> regards,
>>> Andr?
>> I don't believe anyone is currently working on getting the new ddr
>> code to be used w/83xx.  Feel free to submit patches that does this
>> and we will review them as they are posted.
>>
>> - k
> After spending few hours it seems to work basically.
> This is what I've done :
> 
> - add mpc8xxx(ddr/libddr.a to top level Makefile for 83xx
> - created mpc83xx/ddr-gen2.c and ported to meet ddr83xx_t
> - created board specific ddr.c for SPD accessor and basic setup.
> - created board specific ddr2_spd_eeprom_t (soldered memory)
> 
> The board config got these #defines :
> 
> #define CONFIG_FSL_DDR2
> #define CONFIG_DDR_SPD
> #define CONFIG_NUM_DDR_CONTROLLERS      1           -> this should go
> into mpc83xx header
> #define CONFIG_DIMM_SLOTS_PER_CTLR      1
> #define CONFIG_CHIP_SELECTS_PER_CTRL    1
> 
> Since spd_sdram.o is always build (mpc83xx/Makefile) and the code is
> also activated by CONFIG_SPD_EEPROM
> we should find a reasonable way  to switch between "old" and "new" DDR
> code by some kind of #define.
> 
> Is this the way to go ?
> 
> regards,
> Andr?

Hi Andr?, others,

Has anyone made any progress on moving the mpc83xx family to the 
mpc8xxx/ddr unified initialization?

Andr?, could you post what you did to the list or, if it isn't in 
publishable shape, email it to me so I can bash at it?

Thanks,
gvb

  parent reply	other threads:[~2009-03-03  3:40 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-12-08 17:02 [U-Boot] FSL DDR @ 83xx Andre Schwarz
2008-12-08 19:50 ` Jon Loeliger
2008-12-09 18:01   ` Andre Schwarz
2008-12-09 19:04     ` Kumar Gala
2008-12-11  9:41       ` Andre Schwarz
2008-12-12 19:13         ` Jon Loeliger
2008-12-12 19:14         ` Jon Loeliger
2009-03-03  3:40         ` Jerry Van Baren [this message]
2009-03-03  9:12           ` Andre Schwarz
2008-12-11 11:06       ` Andre Schwarz
2008-12-12 19:16         ` Jon Loeliger
2008-12-08 20:01 ` Kim Phillips
2008-12-09 10:35   ` Andre Schwarz

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