* [U-Boot] Dynamically sized CFI flash.
@ 2009-03-11 0:45 Jon Smirl
2009-03-11 7:05 ` Heiko Schocher
0 siblings, 1 reply; 3+ messages in thread
From: Jon Smirl @ 2009-03-11 0:45 UTC (permalink / raw)
To: u-boot
I'm porting support for a Phytec PCM030 (mpc5200) from 1.2 up to
current head so that I can get it merged. These boards can be
populated with a variety of flash chips, there is code to compute the
size of these chips and fix up bank_base[] in cfi_flash.c In u-boot
1.3.4 bank_base[] was rewritten. What is the correct way to do these
calculations?
extern ulong bank_base[CFG_MAX_FLASH_BANKS];
int board_early_init_r (void)
{
int width, id;
ulong mb, dev_size;
ulong base = 0xff000000;
ulong lpb;
lpb = *(vu_long *)MPC5XXX_LPB;
*(vu_long *)MPC5XXX_BOOTCS_START = START_REG(base);
*(vu_long *)MPC5XXX_BOOTCS_STOP = STOP_REG(base, 16 * 1024 * 1024);
/*
* we run the PCI bus with 33 1/3 MHz. The flash requires 75ns accesstime.
* 2 base waitstates plus one additional waitstate makes the access as fast
* as possible (=90ns)
*/
lpb &= 0x0000dfc0; /* make it writable and mask out wait stages */
lpb |= 0x0001d000; /* adjust wait stages */
*(vu_long *)MPC5XXX_LPB = lpb;
/* get flash width */
width = (lpb >> 8) & 0x3;
switch (width) {
case 0: /* 8 bit */
*(vu_char *)base = 0x90;
id = *(vu_char *)(base + 3);
*(vu_char *)base = 0xff;
break;
case 1: /* 16 bit */
*(vu_short *)base = 0x90;
id = *(vu_short *)(base + 2) & 0xff;
*(vu_short *)base = 0xff;
break;
case 3: /* 32 bit */
*(vu_short *)base = 0x90;
id = *(vu_short *)(base + 4) & 0xff;
*(vu_short *)base = 0xff;
break;
}
switch (id) {
case 0x16:
mb = 4;
break;
case 0x17:
mb = 8;
break;
case 0x18:
mb = 16;
break;
case 0x20:
mb = 8;
break;
case 0x21:
mb = 16;
break;
case 0x22:
mb = 32;
break;
}
/* On these boards everything which is 32bit wide consists
* of two 16bit Flashes
*/
if (width == 3)
mb <<= 1;
/*
* On this platform one chip select can only handle up to 32MiB.
* So we must limit boot cs's baseaddress to 0xfe000000 and above
*/
if (mb > 32)
dev_size = 32;
else
dev_size = mb;
*(vu_long *)MPC5XXX_BOOTCS_START = START_REG(0x0u - (dev_size << 20));
*(vu_long *)MPC5XXX_BOOTCS_STOP = STOP_REG(0x0u - (dev_size << 20),
(dev_size << 20));
/*
* the developer is responsible to setup other chip select lines to
* reach other parts of the device if its larger than 32MiB
*/
bank_base[0] = 0x0u - (mb << 20);
return 0;
}
--
Jon Smirl
jonsmirl@gmail.com
^ permalink raw reply [flat|nested] 3+ messages in thread* [U-Boot] Dynamically sized CFI flash.
2009-03-11 0:45 [U-Boot] Dynamically sized CFI flash Jon Smirl
@ 2009-03-11 7:05 ` Heiko Schocher
2009-03-11 17:01 ` Jon Smirl
0 siblings, 1 reply; 3+ messages in thread
From: Heiko Schocher @ 2009-03-11 7:05 UTC (permalink / raw)
To: u-boot
Hello Jon,
Jon Smirl wrote:
> I'm porting support for a Phytec PCM030 (mpc5200) from 1.2 up to
> current head so that I can get it merged. These boards can be
> populated with a variety of flash chips, there is code to compute the
> size of these chips and fix up bank_base[] in cfi_flash.c In u-boot
> 1.3.4 bank_base[] was rewritten. What is the correct way to do these
> calculations?
>
I suggest to activate CONFIG_SYS_UPDATE_FLASH_SIZE
Then you get the update_flash_size (int flash_size) function
called after the cfi driver counted the flash size.
examples:
[hs at pollux u-boot]$ grep -lr update_flash_size .
./board/jupiter/jupiter.c
./board/tqc/tqm8272/tqm8272.c
./lib_ppc/board.c
[hs at pollux u-boot]$
bye
Heiko
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
^ permalink raw reply [flat|nested] 3+ messages in thread
* [U-Boot] Dynamically sized CFI flash.
2009-03-11 7:05 ` Heiko Schocher
@ 2009-03-11 17:01 ` Jon Smirl
0 siblings, 0 replies; 3+ messages in thread
From: Jon Smirl @ 2009-03-11 17:01 UTC (permalink / raw)
To: u-boot
On Wed, Mar 11, 2009 at 3:05 AM, Heiko Schocher <hs@denx.de> wrote:
> I suggest to activate CONFIG_SYS_UPDATE_FLASH_SIZE
> Then you get the update_flash_size (int flash_size) function
> called after the cfi driver counted the flash size.
Sascha, didn't you write this?
I see how to add update_flash_size(). But how is update_flash_size()
going to know the size if it doesn't know where the flash starts?
Don't I need this code that manipulate bootcs to determine the
starting address of the flash?
On Tue, Mar 10, 2009 at 8:45 PM, Jon Smirl <jonsmirl@gmail.com> wrote:
> I'm porting support for a Phytec PCM030 (mpc5200) from 1.2 up to
> current head so that I can get it merged. These boards can be
> populated with a variety of flash chips, there is code to compute the
> size of these chips and fix up bank_base[] in cfi_flash.c In u-boot
> 1.3.4 bank_base[] was rewritten. What is the correct way to do these
> calculations?
>
> extern ulong bank_base[CFG_MAX_FLASH_BANKS];
>
> int board_early_init_r (void)
> {
> int width, id;
> ulong mb, dev_size;
> ulong base = 0xff000000;
> ulong lpb;
>
> lpb = *(vu_long *)MPC5XXX_LPB;
>
> *(vu_long *)MPC5XXX_BOOTCS_START = START_REG(base);
> *(vu_long *)MPC5XXX_BOOTCS_STOP = STOP_REG(base, 16 * 1024 * 1024);
> /*
> * we run the PCI bus with 33 1/3 MHz. The flash requires 75ns accesstime.
> * 2 base waitstates plus one additional waitstate makes the access as fast
> * as possible (=90ns)
> */
> lpb &= 0x0000dfc0; /* make it writable and mask out wait stages */
> lpb |= 0x0001d000; /* adjust wait stages */
> *(vu_long *)MPC5XXX_LPB = lpb;
>
> /* get flash width */
> width = (lpb >> 8) & 0x3;
>
> switch (width) {
> case 0: /* 8 bit */
> *(vu_char *)base = 0x90;
> id = *(vu_char *)(base + 3);
> *(vu_char *)base = 0xff;
> break;
> case 1: /* 16 bit */
> *(vu_short *)base = 0x90;
> id = *(vu_short *)(base + 2) & 0xff;
> *(vu_short *)base = 0xff;
> break;
> case 3: /* 32 bit */
> *(vu_short *)base = 0x90;
> id = *(vu_short *)(base + 4) & 0xff;
> *(vu_short *)base = 0xff;
> break;
> }
>
> switch (id) {
> case 0x16:
> mb = 4;
> break;
> case 0x17:
> mb = 8;
> break;
> case 0x18:
> mb = 16;
> break;
> case 0x20:
> mb = 8;
> break;
> case 0x21:
> mb = 16;
> break;
> case 0x22:
> mb = 32;
> break;
> }
>
> /* On these boards everything which is 32bit wide consists
> * of two 16bit Flashes
> */
> if (width == 3)
> mb <<= 1;
>
> /*
> * On this platform one chip select can only handle up to 32MiB.
> * So we must limit boot cs's baseaddress to 0xfe000000 and above
> */
> if (mb > 32)
> dev_size = 32;
> else
> dev_size = mb;
>
> *(vu_long *)MPC5XXX_BOOTCS_START = START_REG(0x0u - (dev_size << 20));
> *(vu_long *)MPC5XXX_BOOTCS_STOP = STOP_REG(0x0u - (dev_size << 20),
> (dev_size << 20));
>
> /*
> * the developer is responsible to setup other chip select lines to
> * reach other parts of the device if its larger than 32MiB
> */
> bank_base[0] = 0x0u - (mb << 20);
>
> return 0;
> }
>
>
>
> --
> Jon Smirl
> jonsmirl at gmail.com
>
--
Jon Smirl
jonsmirl at gmail.com
^ permalink raw reply [flat|nested] 3+ messages in thread
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2009-03-11 0:45 [U-Boot] Dynamically sized CFI flash Jon Smirl
2009-03-11 7:05 ` Heiko Schocher
2009-03-11 17:01 ` Jon Smirl
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