From mboxrd@z Thu Jan 1 00:00:00 1970 From: Kazuaki Ichinohe Date: Thu, 19 Mar 2009 20:28:52 +0900 Subject: [U-Boot] About PCI of U-BOOT of CANYONLANDS In-Reply-To: <49C20D75.6000406@denx.de> References: <49BFA0BE.7060103@fsi.co.jp> <200903171413.03396.sr@denx.de> <49C04E2C.5070507@fsi.co.jp> <200903181007.13324.sr@denx.de> <49C0E31C.9050200@denx.de> <49C0E3E7.9040503@fsi.co.jp> <49C0E913.2070609@fsi.co.jp> <49C0EFB2.9020800@fsi.co.jp> <49C109AD.70106@denx.de> <49C1CD60.6010103@fsi.co.jp> <49C20D75.6000406@denx.de> Message-ID: <49C22C74.2070809@fsi.co.jp> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Anatolij, Stefan, Thank you for the reply. I confirmed your patch source. However, the exception was generated. ------------------------------------------------ U-Boot 2009.01 ( 3? 19 2009 - 18:41:36) CPU: AMCC PowerPC 460EX Rev. A at 800 MHz (PLB=200, OPB=100, EBC=100 MHz) Security/Kasumi support Bootstrap Option H - Boot ROM Location I2C (Addr 0x52) Internal PCI arbiter disabled 32 kB I-Cache 32 kB D-Cache Board: Canyonlands - AMCC PPC460EX Evaluation Board, 1*PCIe/1*SATA, Rev. 14 I2C: ready DTT: 1 is 39 C DRAM: 512 MB (ECC not enabled, 400 MHz, CL3) FLASH: 64 MB NAND: 128 MiB PCI: Bus Dev VenId DevId Class Int 00 06 1002 5960 0300 ff 00 06 1002 5940 0380 ff PCIE1: link is not up. PCIE1: initialization as root-complex failed Video: ATI Radeon video card (1002, 5960) found @(0:6:0) rinfo->mmio_base = 0x88000000 rinfo->fb_local_base = 0x59c00000 videoboot: Booting PCI video card bus 0, function 0, device 6 Machine Check Exception. Caused by (from msr): regs 1fe3ab50 Data Write PLB Error NIP: 1FF859E0 XER: 00000000 LR: 1FF87848 REGS: 1fe3ab50 TRAP: 0200 DEAR: 00000000 MSR: 00021000 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 00 GPR00: 1FF87848 1FE3AC40 1FE3AF20 D0801014 0000C000 1FE3AC4C 00000000 00000001 GPR08: 00000000 1FF8595C 000006BD 00000000 00000006 055671DE 1FFABF00 1FFBF000 GPR16: 1FF91D3C 1FFCC999 1FE37D40 1FE37D44 00000000 00000000 1FE401E0 1FFFF890 GPR24: 1FFAAF88 1FFA6420 1FFFFC90 1FFFFC90 1FFFFC90 00001014 1FFAE314 0000C000 Call backtrace: 1FF860E0 1FF87848 1FF8712C 1FF84AD0 1FF84644 1FF82B44 1FF834A8 1FF82498 1FF5FCDC 1FF42EF0 1FF41710 machine check Regards, Kazuaki Ichinohe Anatolij Gustschin wrote: > Hi Kazuaki, Stefan, > > Kazuaki Ichinohe wrote: > >> This is a problem that the memory space of BAR2 is inaccessible. >> Even if the value of VIDEO_IO_OFFSET is changed, the problem is not solved. >> >> It is a log that you demanded as follows. > > Thanks! Now I see this too. Previously you have mentioned that > the driver crashed in u-boot/drivers/video/ati_radeon_fb.c, line 760. > But before this, a bunch of pci register accesses should be done already. > I only wanted to make sure that the driver really crashes while first > ATI register access. > > Please, try the inlined patch below and see if BAR2 memory space > works with it. Thanks! > > > >>>> The memory space is displayed in BAR2 of the PCI configuration space. >>>> The video driver accesses this memory space and the exception is >>>> generated. >>>> >>>> driver source: u-boot/drivers/video/ati_radeon_fb.c >>>> function name: void *video_hw_init(void) >>>> line : 760line >>> it seems that the driver is able to access memory space (registers, e.g. >>> in radeon_identify_vram() ) but cannot access framebuffer? >>> >>> Please replace '#undef DEBUG' in drivers/video/ati_radeon_fb.c >>> with '#define DEBUG' and also enable CONFIG_VIDEO and use >>> #define VIDEO_IO_OFFSET 0xD0800000 and post the boot log again. >>> > > > diff --git a/cpu/ppc4xx/4xx_pci.c b/cpu/ppc4xx/4xx_pci.c > index e8871fc..9639547 100644 > --- a/cpu/ppc4xx/4xx_pci.c > +++ b/cpu/ppc4xx/4xx_pci.c > @@ -550,10 +550,12 @@ int pci_440_init (struct pci_controller *hose) > out32r( PCIX0_POM0SA, 0 ); /* disable */ > out32r( PCIX0_POM1SA, 0 ); /* disable */ > out32r( PCIX0_POM2SA, 0 ); /* disable */ > -#if defined(CONFIG_440SPE) || \ > - defined(CONFIG_460EX) || defined(CONFIG_460GT) > +#if defined(CONFIG_440SPE) > out32r( PCIX0_POM0LAL, 0x10000000 ); > out32r( PCIX0_POM0LAH, 0x0000000c ); > +#elif defined(CONFIG_460EX) || defined(CONFIG_460GT) > + out32r( PCIX0_POM0LAL, 0x20000000 ); > + out32r( PCIX0_POM0LAH, 0x0000000c ); > #else > out32r( PCIX0_POM0LAL, 0x00000000 ); > out32r( PCIX0_POM0LAH, 0x00000003 ); > > > Best regards, > Anatolij > > -- > DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany > Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de >