From mboxrd@z Thu Jan 1 00:00:00 1970 From: Scott Wood Date: Thu, 26 Mar 2009 12:22:47 -0500 Subject: [U-Boot] U-Boot's need for MMU In-Reply-To: References: Message-ID: <49CBB9E7.8080307@freescale.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de cmfairfa at rockwellcollins.com wrote: > Hi, > I am wondering what the ramifications of not using the MMU in U-Boot are? > I have an MPC8360 (e300 core) where it is capable of disabling the MMU via > the MSR[IR] and MSR[DR] bits. > > Before disabling the MMU, I'm just wondering why U-Boot bothers to set up > the MMU on CPU's that providing disabling of the MMU. A big one is that you can't have certain regions be cached (memory) and others uncached (I/O) -- you'll need to turn the D-cache off altogether. And even then I'm not sure what happens to the guarded bit when the MMU is off. > I'm not disabling the MMU just for kicks, there are/may be some > program-specific scenarios where I may need to use the option of disabling > the MMU. Such as? One should generally lead with the reason they want to do something, and only afterwards ask "why not". :-) -Scott