From mboxrd@z Thu Jan 1 00:00:00 1970 From: Shinya Kuribayashi Date: Fri, 01 May 2009 09:56:08 +0900 Subject: [U-Boot] [PATCH] include/ns16550.h: Unify structure declaration for registers In-Reply-To: References: <1238769946-30370-1-git-send-email-dzu@denx.de> <49F2657D.5080706@ruby.dti.ne.jp> <49F5C0AA.2000401@ruby.dti.ne.jp> <49F8A196.60202@pobox.com> <49F8A692.3070203@pobox.com> Message-ID: <49FA48A8.8030208@pobox.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi, Detlev Zundel wrote: > Thinking about it some more, I wonder about the following. You said, > this would work for you: > > struct NS16550 { > unsigned long rbr; > unsigned long postpad_rbr[3]; > .... > > while > > struct NS16550 { > unsigned char rbr; > unsigned char postpad_rbr[12]; 15? > ... > > doesn't. If we regard only the "significant" 8-bits, the first layout > is congruent to the second shifted by 2 bytes (on big-endian machines). I think you mean 'at offset 0x3', right? My 16550 registers are like this: 0 1 2 3 +----+----+----+----+ 0x00 | reserved |rbr | +----+----+----+----+ 0x04 | reserved | +----+----+----+----+ 0x08 | reserved | +----+----+----+----+ 0x0c | reserved | +----+----+----+----+ 0x10 | reserved |ier | +----+----+----+----+ 0x14 | reserved | +----+----+----+----+ 0x18 | reserved | +----+----+----+----+ 0x1c | reserved | +----+----+----+----+ ... > So what about using +16 for your board and lower the base address by 2? > Does that work? What is your base address? Is that 64-bit aligned? With 64-bit (16 bytes) aligned base address, AND offset +0x3, AND struct NS16550 configured by -16 (below) struct NS16550 { unsigned char rbr; unsigned char postpad_rbr[15]; unsigned char ier; unsigned char postpad_ier[15]; ... }; , then yes, I think this probably works for sane hardwares who can handle byte read/write operations properly. As for my hardware, however, this still doesn't work. My processor (MIPS 4KEc) of couse supports byte read/write, on the other hand, the address decoder at UART module can not handle byte addresses properly; all byte read/write accesses with +1/+2/+3 offset, will be round-down to +0. Therefore, I can take 'offset +0x3' option. This is the reasony I said 'my hardware requires 32-bit word access to NS16550 registers'. > This is somewhat hypothetical and outright ugly, but I still want to > know if this works. I know the address decoder of my UART hardware sucks, but it's not unusual. I'll reply to remaining mails shortly. Thanks, Shinya