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From: Dinh Nguyen <dinguyen@kernel.org>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v11 9/9] ARM: socfpga: Increase Malloc pool size to support FAT filesystem in SPL
Date: Tue, 5 Mar 2019 22:52:38 -0600	[thread overview]
Message-ID: <49ca27ca-c731-1e05-b031-08eeff0454d1@kernel.org> (raw)
In-Reply-To: <20190305162310.1396-10-tien.fong.chee@intel.com>



On 3/5/19 10:23 AM, tien.fong.chee at intel.com wrote:
> From: Tien Fong Chee <tien.fong.chee@intel.com>
> 
> After some series of patches to maximise reusable of memory pool, here come
> to result of reasonable size required for whole SDMMC boot working on A10
> SoCDK. Size required come from default max cluster(0x10000) +
> others(0x2000) + additional memory for headroom(0x3000).

This commit log is really confusing. What "series of patches"? I think
you're just needing a bigger malloc pool. Can you just say that and
explain why you need it?

Thanks,
Dinh

  parent reply	other threads:[~2019-03-06  4:52 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-05 16:23 [U-Boot] [PATCH v11 0/9] Add support for loading FPGA bitstream tien.fong.chee at intel.com
2019-03-05 16:23 ` [U-Boot] [PATCH v11 1/9] ARM: socfpga: Description on FPGA bitstream type and file name for Arria 10 tien.fong.chee at intel.com
2019-03-05 19:12   ` Dinh Nguyen
2019-03-07  7:51     ` Chee, Tien Fong
2019-03-07  8:18       ` Marek Vasut
2019-03-07  8:30         ` Chee, Tien Fong
2019-03-07  8:38           ` Marek Vasut
2019-03-07  8:56             ` Chee, Tien Fong
2019-03-05 16:23 ` [U-Boot] [PATCH v11 2/9] ARM: socfpga: Add default FPGA bitstream fitImage for Arria10 SoCDK tien.fong.chee at intel.com
2019-03-05 16:23 ` [U-Boot] [PATCH v11 3/9] ARM: socfpga: Cleaning up the messages tien.fong.chee at intel.com
2019-03-06  4:31   ` Dinh Nguyen
2019-03-07  7:57     ` Chee, Tien Fong
2019-03-05 16:23 ` [U-Boot] [PATCH v11 4/9] ARM: socfpga: Move the watchdog reset to the looping location tien.fong.chee at intel.com
2019-03-06  4:35   ` Dinh Nguyen
2019-03-07  8:04     ` Chee, Tien Fong
2019-03-05 16:23 ` [U-Boot] [PATCH v11 5/9] ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loading tien.fong.chee at intel.com
2019-03-05 16:23 ` [U-Boot] [PATCH v11 6/9] ARM: socfpga: Add the configuration for FPGA SoCFPGA A10 SoCDK tien.fong.chee at intel.com
2019-03-06  4:11   ` Dinh Nguyen
2019-03-07  8:06     ` Chee, Tien Fong
2019-03-05 16:23 ` [U-Boot] [PATCH v11 7/9] spl : socfpga: Implement fpga bitstream loading with socfpga loadfs tien.fong.chee at intel.com
2019-03-05 16:23 ` [U-Boot] [PATCH v11 8/9] ARM: socfpga: Synchronize the configuration for A10 SoCDK tien.fong.chee at intel.com
2019-03-06  4:54   ` Dinh Nguyen
2019-03-07  8:14     ` Chee, Tien Fong
2019-03-05 16:23 ` [U-Boot] [PATCH v11 9/9] ARM: socfpga: Increase Malloc pool size to support FAT filesystem in SPL tien.fong.chee at intel.com
2019-03-05 20:05   ` Simon Goldschmidt
2019-03-06  2:04     ` Chee, Tien Fong
2019-03-07  7:07     ` Chee, Tien Fong
2019-03-07  8:10       ` Simon Goldschmidt
2019-03-07  8:32         ` Chee, Tien Fong
2019-03-06  4:52   ` Dinh Nguyen [this message]
2019-03-07  8:24     ` Chee, Tien Fong
2019-03-07 15:33       ` Dinh Nguyen
2019-03-08  4:36         ` Chee, Tien Fong

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