public inbox for u-boot@lists.denx.de
 help / color / mirror / Atom feed
* [U-Boot] [GIT PULL] MIPS updates
@ 2009-05-16  0:29 Shinya Kuribayashi
  2009-05-16  0:43 ` Shinya Kuribayashi
  2009-05-16  7:36 ` Wolfgang Denk
  0 siblings, 2 replies; 14+ messages in thread
From: Shinya Kuribayashi @ 2009-05-16  0:29 UTC (permalink / raw)
  To: u-boot

please pull U-Boot/MIPS repository to pick up the following changes.

Thanks in advance,

  Shinya

---

The following changes since commit a2e0ffcf2d9a22c582a93e84a4bef20fd3877f47:
  Wolfgang Denk (1):
        Prepare v2009.06-rc2

are available in the git repository at:

  git://git.denx.de/u-boot-mips.git master

Shinya Kuribayashi (2):
      MIPS: Make all extern-ed functions in bitops.h static
      MIPS: lib_mips/board.c: Remove unused variables

Thomas Lange (1):
      MIPS: Implement ethernet halt for au1x00

 cpu/mips/au1x00_eth.c     |    4 +++
 include/asm-mips/bitops.h |   64 ++++++++++++++++++++++----------------------
 lib_mips/board.c          |    3 +-
 3 files changed, 37 insertions(+), 34 deletions(-)

diff --git a/cpu/mips/au1x00_eth.c b/cpu/mips/au1x00_eth.c
index 6272a3a..5074997 100644
--- a/cpu/mips/au1x00_eth.c
+++ b/cpu/mips/au1x00_eth.c
@@ -276,6 +276,10 @@ static int au1x00_init(struct eth_device* dev, bd_t * bd){
 }
 
 static void au1x00_halt(struct eth_device* dev){
+	volatile u32 *macen = (volatile u32*)MAC0_ENABLE;
+
+	/* Put MAC0 in reset */
+	*macen = 0;
 }
 
 int au1x00_enet_initialize(bd_t *bis){
diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h
index 56d7225..659ac9d 100644
--- a/include/asm-mips/bitops.h
+++ b/include/asm-mips/bitops.h
@@ -60,7 +60,7 @@
  * Note that @nr may be almost arbitrarily large; this function is not
  * restricted to acting on a single-word quantity.
  */
-extern __inline__ void
+static __inline__ void
 set_bit(int nr, volatile void *addr)
 {
 	unsigned long *m = ((unsigned long *) addr) + (nr >> 5);
@@ -84,7 +84,7 @@ set_bit(int nr, volatile void *addr)
  * If it's called on the same region of memory simultaneously, the effect
  * may be that only one operation succeeds.
  */
-extern __inline__ void __set_bit(int nr, volatile void * addr)
+static __inline__ void __set_bit(int nr, volatile void * addr)
 {
 	unsigned long * m = ((unsigned long *) addr) + (nr >> 5);
 
@@ -101,7 +101,7 @@ extern __inline__ void __set_bit(int nr, volatile void * addr)
  * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
  * in order to ensure changes are visible on other processors.
  */
-extern __inline__ void
+static __inline__ void
 clear_bit(int nr, volatile void *addr)
 {
 	unsigned long *m = ((unsigned long *) addr) + (nr >> 5);
@@ -125,7 +125,7 @@ clear_bit(int nr, volatile void *addr)
  * Note that @nr may be almost arbitrarily large; this function is not
  * restricted to acting on a single-word quantity.
  */
-extern __inline__ void
+static __inline__ void
 change_bit(int nr, volatile void *addr)
 {
 	unsigned long *m = ((unsigned long *) addr) + (nr >> 5);
@@ -149,7 +149,7 @@ change_bit(int nr, volatile void *addr)
  * If it's called on the same region of memory simultaneously, the effect
  * may be that only one operation succeeds.
  */
-extern __inline__ void __change_bit(int nr, volatile void * addr)
+static __inline__ void __change_bit(int nr, volatile void * addr)
 {
 	unsigned long * m = ((unsigned long *) addr) + (nr >> 5);
 
@@ -164,7 +164,7 @@ extern __inline__ void __change_bit(int nr, volatile void * addr)
  * This operation is atomic and cannot be reordered.
  * It also implies a memory barrier.
  */
-extern __inline__ int
+static __inline__ int
 test_and_set_bit(int nr, volatile void *addr)
 {
 	unsigned long *m = ((unsigned long *) addr) + (nr >> 5);
@@ -194,7 +194,7 @@ test_and_set_bit(int nr, volatile void *addr)
  * If two examples of this operation race, one can appear to succeed
  * but actually fail.  You must protect multiple accesses with a lock.
  */
-extern __inline__ int __test_and_set_bit(int nr, volatile void * addr)
+static __inline__ int __test_and_set_bit(int nr, volatile void * addr)
 {
 	int mask, retval;
 	volatile int *a = addr;
@@ -215,7 +215,7 @@ extern __inline__ int __test_and_set_bit(int nr, volatile void * addr)
  * This operation is atomic and cannot be reordered.
  * It also implies a memory barrier.
  */
-extern __inline__ int
+static __inline__ int
 test_and_clear_bit(int nr, volatile void *addr)
 {
 	unsigned long *m = ((unsigned long *) addr) + (nr >> 5);
@@ -246,7 +246,7 @@ test_and_clear_bit(int nr, volatile void *addr)
  * If two examples of this operation race, one can appear to succeed
  * but actually fail.  You must protect multiple accesses with a lock.
  */
-extern __inline__ int __test_and_clear_bit(int nr, volatile void * addr)
+static __inline__ int __test_and_clear_bit(int nr, volatile void * addr)
 {
 	int	mask, retval;
 	volatile int	*a = addr;
@@ -267,7 +267,7 @@ extern __inline__ int __test_and_clear_bit(int nr, volatile void * addr)
  * This operation is atomic and cannot be reordered.
  * It also implies a memory barrier.
  */
-extern __inline__ int
+static __inline__ int
 test_and_change_bit(int nr, volatile void *addr)
 {
 	unsigned long *m = ((unsigned long *) addr) + (nr >> 5);
@@ -297,7 +297,7 @@ test_and_change_bit(int nr, volatile void *addr)
  * If two examples of this operation race, one can appear to succeed
  * but actually fail.  You must protect multiple accesses with a lock.
  */
-extern __inline__ int __test_and_change_bit(int nr, volatile void * addr)
+static __inline__ int __test_and_change_bit(int nr, volatile void * addr)
 {
 	int	mask, retval;
 	volatile int	*a = addr;
@@ -322,7 +322,7 @@ extern __inline__ int __test_and_change_bit(int nr, volatile void * addr)
  * Note that @nr may be almost arbitrarily large; this function is not
  * restricted to acting on a single-word quantity.
  */
-extern __inline__ void set_bit(int nr, volatile void * addr)
+static __inline__ void set_bit(int nr, volatile void * addr)
 {
 	int	mask;
 	volatile int	*a = addr;
@@ -344,7 +344,7 @@ extern __inline__ void set_bit(int nr, volatile void * addr)
  * If it's called on the same region of memory simultaneously, the effect
  * may be that only one operation succeeds.
  */
-extern __inline__ void __set_bit(int nr, volatile void * addr)
+static __inline__ void __set_bit(int nr, volatile void * addr)
 {
 	int	mask;
 	volatile int	*a = addr;
@@ -364,7 +364,7 @@ extern __inline__ void __set_bit(int nr, volatile void * addr)
  * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
  * in order to ensure changes are visible on other processors.
  */
-extern __inline__ void clear_bit(int nr, volatile void * addr)
+static __inline__ void clear_bit(int nr, volatile void * addr)
 {
 	int	mask;
 	volatile int	*a = addr;
@@ -386,7 +386,7 @@ extern __inline__ void clear_bit(int nr, volatile void * addr)
  * Note that @nr may be almost arbitrarily large; this function is not
  * restricted to acting on a single-word quantity.
  */
-extern __inline__ void change_bit(int nr, volatile void * addr)
+static __inline__ void change_bit(int nr, volatile void * addr)
 {
 	int	mask;
 	volatile int	*a = addr;
@@ -408,7 +408,7 @@ extern __inline__ void change_bit(int nr, volatile void * addr)
  * If it's called on the same region of memory simultaneously, the effect
  * may be that only one operation succeeds.
  */
-extern __inline__ void __change_bit(int nr, volatile void * addr)
+static __inline__ void __change_bit(int nr, volatile void * addr)
 {
 	unsigned long * m = ((unsigned long *) addr) + (nr >> 5);
 
@@ -423,7 +423,7 @@ extern __inline__ void __change_bit(int nr, volatile void * addr)
  * This operation is atomic and cannot be reordered.
  * It also implies a memory barrier.
  */
-extern __inline__ int test_and_set_bit(int nr, volatile void * addr)
+static __inline__ int test_and_set_bit(int nr, volatile void * addr)
 {
 	int	mask, retval;
 	volatile int	*a = addr;
@@ -448,7 +448,7 @@ extern __inline__ int test_and_set_bit(int nr, volatile void * addr)
  * If two examples of this operation race, one can appear to succeed
  * but actually fail.  You must protect multiple accesses with a lock.
  */
-extern __inline__ int __test_and_set_bit(int nr, volatile void * addr)
+static __inline__ int __test_and_set_bit(int nr, volatile void * addr)
 {
 	int	mask, retval;
 	volatile int	*a = addr;
@@ -469,7 +469,7 @@ extern __inline__ int __test_and_set_bit(int nr, volatile void * addr)
  * This operation is atomic and cannot be reordered.
  * It also implies a memory barrier.
  */
-extern __inline__ int test_and_clear_bit(int nr, volatile void * addr)
+static __inline__ int test_and_clear_bit(int nr, volatile void * addr)
 {
 	int	mask, retval;
 	volatile int	*a = addr;
@@ -494,7 +494,7 @@ extern __inline__ int test_and_clear_bit(int nr, volatile void * addr)
  * If two examples of this operation race, one can appear to succeed
  * but actually fail.  You must protect multiple accesses with a lock.
  */
-extern __inline__ int __test_and_clear_bit(int nr, volatile void * addr)
+static __inline__ int __test_and_clear_bit(int nr, volatile void * addr)
 {
 	int	mask, retval;
 	volatile int	*a = addr;
@@ -515,7 +515,7 @@ extern __inline__ int __test_and_clear_bit(int nr, volatile void * addr)
  * This operation is atomic and cannot be reordered.
  * It also implies a memory barrier.
  */
-extern __inline__ int test_and_change_bit(int nr, volatile void * addr)
+static __inline__ int test_and_change_bit(int nr, volatile void * addr)
 {
 	int	mask, retval;
 	volatile int	*a = addr;
@@ -540,7 +540,7 @@ extern __inline__ int test_and_change_bit(int nr, volatile void * addr)
  * If two examples of this operation race, one can appear to succeed
  * but actually fail.  You must protect multiple accesses with a lock.
  */
-extern __inline__ int __test_and_change_bit(int nr, volatile void * addr)
+static __inline__ int __test_and_change_bit(int nr, volatile void * addr)
 {
 	int	mask, retval;
 	volatile int	*a = addr;
@@ -565,7 +565,7 @@ extern __inline__ int __test_and_change_bit(int nr, volatile void * addr)
  * @nr: bit number to test
  * @addr: Address to start counting from
  */
-extern __inline__ int test_bit(int nr, volatile void *addr)
+static __inline__ int test_bit(int nr, volatile void *addr)
 {
 	return ((1UL << (nr & 31)) & (((const unsigned int *) addr)[nr >> 5])) != 0;
 }
@@ -582,7 +582,7 @@ extern __inline__ int test_bit(int nr, volatile void *addr)
  * Returns the bit-number of the first zero bit, not the number of the byte
  * containing a bit.
  */
-extern __inline__ int find_first_zero_bit (void *addr, unsigned size)
+static __inline__ int find_first_zero_bit (void *addr, unsigned size)
 {
 	unsigned long dummy;
 	int res;
@@ -633,7 +633,7 @@ extern __inline__ int find_first_zero_bit (void *addr, unsigned size)
  * @offset: The bitnumber to start searching at
  * @size: The maximum size to search
  */
-extern __inline__ int find_next_zero_bit (void * addr, int size, int offset)
+static __inline__ int find_next_zero_bit (void * addr, int size, int offset)
 {
 	unsigned int *p = ((unsigned int *) addr) + (offset >> 5);
 	int set = 0, bit = offset & 31, res;
@@ -679,7 +679,7 @@ extern __inline__ int find_next_zero_bit (void * addr, int size, int offset)
  *
  * Undefined if no zero exists, so code should check against ~0UL first.
  */
-extern __inline__ unsigned long ffz(unsigned long word)
+static __inline__ unsigned long ffz(unsigned long word)
 {
 	unsigned int	__res;
 	unsigned int	mask = 1;
@@ -736,7 +736,7 @@ extern __inline__ unsigned long ffz(unsigned long word)
  * @offset: The bitnumber to start searching at
  * @size: The maximum size to search
  */
-extern __inline__ int find_next_zero_bit(void *addr, int size, int offset)
+static __inline__ int find_next_zero_bit(void *addr, int size, int offset)
 {
 	unsigned long *p = ((unsigned long *) addr) + (offset >> 5);
 	unsigned long result = offset & ~31UL;
@@ -785,7 +785,7 @@ found_middle:
  * Returns the bit-number of the first zero bit, not the number of the byte
  * containing a bit.
  */
-extern int find_first_zero_bit (void *addr, unsigned size);
+static int find_first_zero_bit (void *addr, unsigned size);
 #endif
 
 #define find_first_zero_bit(addr, size) \
@@ -796,7 +796,7 @@ extern int find_first_zero_bit (void *addr, unsigned size);
 /* Now for the ext2 filesystem bit operations and helper routines. */
 
 #ifdef __MIPSEB__
-extern __inline__ int ext2_set_bit(int nr, void * addr)
+static __inline__ int ext2_set_bit(int nr, void * addr)
 {
 	int		mask, retval, flags;
 	unsigned char	*ADDR = (unsigned char *) addr;
@@ -810,7 +810,7 @@ extern __inline__ int ext2_set_bit(int nr, void * addr)
 	return retval;
 }
 
-extern __inline__ int ext2_clear_bit(int nr, void * addr)
+static __inline__ int ext2_clear_bit(int nr, void * addr)
 {
 	int		mask, retval, flags;
 	unsigned char	*ADDR = (unsigned char *) addr;
@@ -824,7 +824,7 @@ extern __inline__ int ext2_clear_bit(int nr, void * addr)
 	return retval;
 }
 
-extern __inline__ int ext2_test_bit(int nr, const void * addr)
+static __inline__ int ext2_test_bit(int nr, const void * addr)
 {
 	int			mask;
 	const unsigned char	*ADDR = (const unsigned char *) addr;
@@ -837,7 +837,7 @@ extern __inline__ int ext2_test_bit(int nr, const void * addr)
 #define ext2_find_first_zero_bit(addr, size) \
 	ext2_find_next_zero_bit((addr), (size), 0)
 
-extern __inline__ unsigned long ext2_find_next_zero_bit(void *addr, unsigned long size, unsigned long offset)
+static __inline__ unsigned long ext2_find_next_zero_bit(void *addr, unsigned long size, unsigned long offset)
 {
 	unsigned long *p = ((unsigned long *) addr) + (offset >> 5);
 	unsigned long result = offset & ~31UL;
diff --git a/lib_mips/board.c b/lib_mips/board.c
index 6fc4845..061901e 100644
--- a/lib_mips/board.c
+++ b/lib_mips/board.c
@@ -323,9 +323,8 @@ void board_init_r (gd_t *id, ulong dest_addr)
 #ifndef CONFIG_ENV_IS_NOWHERE
 	extern char * env_name_spec;
 #endif
-	char *s, *e;
+	char *s;
 	bd_t *bd;
-	int i;
 
 	gd = id;
 	gd->flags |= GD_FLG_RELOC;	/* tell others: relocation done */

^ permalink raw reply related	[flat|nested] 14+ messages in thread
* [U-Boot] [GIT PULL] MIPS updates
@ 2010-01-20 12:23 Shinya Kuribayashi
  2010-01-21 21:03 ` Wolfgang Denk
  0 siblings, 1 reply; 14+ messages in thread
From: Shinya Kuribayashi @ 2010-01-20 12:23 UTC (permalink / raw)
  To: u-boot

Hi,

please pull the following unaligned.h patch required by zlib.c.

Thanks in advance,

  Shinya
---

The following changes since commit 50ef25ef24eccd8e69d2c1ccc97b3f7e30109f51:
  Michal Simek (1):
        microblaze: zlib needs asm/unaligned.h

are available in the git repository at:

  git://git.denx.de/u-boot-mips.git master

Shinya Kuribayashi (1):
      MIPS: qemu_mips: Import asm/unaligned.h from the Linux kernel

 include/asm-mips/unaligned.h |   26 ++++++++++++++++++++++++++
 1 files changed, 26 insertions(+), 0 deletions(-)
 create mode 100644 include/asm-mips/unaligned.h

^ permalink raw reply	[flat|nested] 14+ messages in thread
* [U-Boot] [GIT PULL] MIPS updates
@ 2009-01-27 14:16 Shinya Kuribayashi
  2009-01-27 19:57 ` Wolfgang Denk
  0 siblings, 1 reply; 14+ messages in thread
From: Shinya Kuribayashi @ 2009-01-27 14:16 UTC (permalink / raw)
  To: u-boot

Hi Wolfgang,

please pull U-Boot/MIPS repository to pick up the following changes.

Thanks in advance,

  Shinya

---

The following changes since commit 8f86a3636ef88427f880610638e80991adc41896:
  Wolfgang Denk (1):
        Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

are available in the git repository at:

  git://git.denx.de/u-boot-mips.git master

Stefan Roese (4):
      MIPS: Add flush_dcache_range() and invalidate_dcache_range()
      MIPS: Add VCT board series support (Part 1/3)
      MIPS: Add VCT board series support (Part 2/3)
      MIPS: Add VCT board series support (Part 3/3)

 MAINTAINERS                          |    4 +
 MAKEALL                              |   12 +
 Makefile                             |   35 ++
 board/micronas/vct/Makefile          |   57 +++
 board/micronas/vct/bcu.h             |  170 +++++++++
 board/micronas/vct/config.mk         |   31 ++
 board/micronas/vct/dcgu.c            |  258 +++++++++++++
 board/micronas/vct/dcgu.h            |  179 +++++++++
 board/micronas/vct/ebi.c             |   48 +++
 board/micronas/vct/ebi.h             |   95 +++++
 board/micronas/vct/ebi_nor_flash.c   |  131 +++++++
 board/micronas/vct/ebi_onenand.c     |  198 ++++++++++
 board/micronas/vct/ebi_smc911x.c     |   94 +++++
 board/micronas/vct/ehci.c            |  110 ++++++
 board/micronas/vct/gpio.c            |   88 +++++
 board/micronas/vct/scc.c             |  669 ++++++++++++++++++++++++++++++++++
 board/micronas/vct/scc.h             |  205 +++++++++++
 board/micronas/vct/smc_eeprom.c      |  394 ++++++++++++++++++++
 board/micronas/vct/top.c             |  289 +++++++++++++++
 board/micronas/vct/u-boot.lds        |   71 ++++
 board/micronas/vct/vct.c             |  117 ++++++
 board/micronas/vct/vct.h             |  104 ++++++
 board/micronas/vct/vcth/reg_dcgu.h   |   36 ++
 board/micronas/vct/vcth/reg_ebi.h    |  242 ++++++++++++
 board/micronas/vct/vcth/reg_fwsram.h |   73 ++++
 board/micronas/vct/vcth/reg_gpio.h   |   32 ++
 board/micronas/vct/vcth/reg_scc.h    |  102 +++++
 board/micronas/vct/vcth/reg_usbh.h   |   33 ++
 board/micronas/vct/vcth/reg_wdt.h    |   24 ++
 board/micronas/vct/vcth2/reg_ebi.h   |  290 +++++++++++++++
 board/micronas/vct/vctv/reg_dcgu.h   |   25 ++
 board/micronas/vct/vctv/reg_ebi.h    |  290 +++++++++++++++
 board/micronas/vct/vctv/reg_gpio.h   |   32 ++
 board/micronas/vct/vctv/reg_wdt.h    |   24 ++
 cpu/mips/cpu.c                       |   28 ++
 include/common.h                     |    2 +
 include/configs/vct.h                |  340 +++++++++++++++++
 37 files changed, 4932 insertions(+), 0 deletions(-)
 create mode 100644 board/micronas/vct/Makefile
 create mode 100644 board/micronas/vct/bcu.h
 create mode 100644 board/micronas/vct/config.mk
 create mode 100644 board/micronas/vct/dcgu.c
 create mode 100644 board/micronas/vct/dcgu.h
 create mode 100644 board/micronas/vct/ebi.c
 create mode 100644 board/micronas/vct/ebi.h
 create mode 100644 board/micronas/vct/ebi_nor_flash.c
 create mode 100644 board/micronas/vct/ebi_onenand.c
 create mode 100644 board/micronas/vct/ebi_smc911x.c
 create mode 100644 board/micronas/vct/ehci.c
 create mode 100644 board/micronas/vct/gpio.c
 create mode 100644 board/micronas/vct/scc.c
 create mode 100644 board/micronas/vct/scc.h
 create mode 100644 board/micronas/vct/smc_eeprom.c
 create mode 100644 board/micronas/vct/top.c
 create mode 100644 board/micronas/vct/u-boot.lds
 create mode 100644 board/micronas/vct/vct.c
 create mode 100644 board/micronas/vct/vct.h
 create mode 100644 board/micronas/vct/vcth/reg_dcgu.h
 create mode 100644 board/micronas/vct/vcth/reg_ebi.h
 create mode 100644 board/micronas/vct/vcth/reg_fwsram.h
 create mode 100644 board/micronas/vct/vcth/reg_gpio.h
 create mode 100644 board/micronas/vct/vcth/reg_scc.h
 create mode 100644 board/micronas/vct/vcth/reg_usbh.h
 create mode 100644 board/micronas/vct/vcth/reg_wdt.h
 create mode 100644 board/micronas/vct/vcth2/reg_ebi.h
 create mode 100644 board/micronas/vct/vctv/reg_dcgu.h
 create mode 100644 board/micronas/vct/vctv/reg_ebi.h
 create mode 100644 board/micronas/vct/vctv/reg_gpio.h
 create mode 100644 board/micronas/vct/vctv/reg_wdt.h
 create mode 100644 include/configs/vct.h

^ permalink raw reply	[flat|nested] 14+ messages in thread
* [U-Boot] [GIT PULL] MIPS updates
@ 2008-12-17 13:43 Shinya Kuribayashi
  2008-12-30 22:29 ` Wolfgang Denk
  0 siblings, 1 reply; 14+ messages in thread
From: Shinya Kuribayashi @ 2008-12-17 13:43 UTC (permalink / raw)
  To: u-boot

Hi Wolfgang,

please pull U-Boot/MIPS repository to pick up the following changes.

Thanks in advance,

  Shinya

---

The following changes since commit aced78d852d0b009e8aaa1445af8cb40861ee549:
  Wolfgang Denk (1):
        Prepare 2009.01-rc1

are available in the git repository at:

  git://git.denx.de/u-boot-mips.git master

Jean-Christophe PLAGNIOL-VILLARD (3):
      MIPS: qemu_mips: move env storage just after u-boot
      MIPS: qemu_mips: update doc to use all disk and boot linux kernel
      MIPS: qemu_mips: update doc to generate and to use qemu flash, ide file

 doc/README.qemu_mips        |   88 ++++++++++++++++++++++++++++++++++++++++++-
 include/configs/qemu-mips.h |    2 +-
 2 files changed, 87 insertions(+), 3 deletions(-)


diff --git a/doc/README.qemu_mips b/doc/README.qemu_mips
index 2fdd2b0..3985264 100644
--- a/doc/README.qemu_mips
+++ b/doc/README.qemu_mips
@@ -17,19 +17,103 @@ create image:
 start it:
 # qemu-system-mips -M mips -pflash flash -monitor null -nographic
 
+2) Download kernel + initrd
+
+On ftp://ftp.denx.de/pub/contrib/Jean-Christophe_Plagniol-Villard/qemu_mips/
+you can downland
+
+#config to build the kernel
+qemu_mips_defconfig
+#patch to fix mips interupt init on 2.6.24.y kernel
+qemu_mips_kernel.patch
+initrd.gz
+vmlinux
+vmlinux.bin
+System.map
+
+4) Generate uImage
+
+# tools/mkimage -A mips -O linux -T kernel -C gzip -a 0x80010000 -e 0x80245650 -n "Linux 2.6.24.y" -d vmlinux.bin.gz uImage
+
+5) Copy uImage to Flash
+# dd if=uImage bs=1k conv=notrunc seek=224 of=flash
+
+6) Generate Ide Disk
+
+# dd of=ide bs=1k cout=100k if=/dev/zero
+
+# sfdisk -C 261 -d ide
+# partition table of ide
+unit: sectors
+
+     ide1 : start=       63, size=    32067, Id=83
+     ide2 : start=    32130, size=    32130, Id=83
+     ide3 : start=    64260, size=  4128705, Id=83
+     ide4 : start=        0, size=        0, Id= 0
+
+7) Copy to ide
+
+# dd if=uImage bs=512 conv=notrunc seek=63 of=ide
+
+8) Generate ext2 on part 2 on Copy uImage and initrd.gz
+
+# Attached as loop device ide offset = 32130 * 512
+# losetup -o 16450560 -f ide
+# Format as ext2 ( arg2 : nb blocks)
+# mke2fs /dev/loop0 16065
+# losetup -d /dev/loop0
+# Mount and copy uImage and initrd.gz to it
+# mount -o loop,offset=16450560 -t ext2 ide /mnt
+# mkdir /mnt/boot
+# cp {initrd.gz,uImage} /mnt/boot/
+# Umount it
+# umount /mnt
+
+9) Set Environment
+
+setenv rd_start 0x80800000
+setenv rd_size 2663940
+setenv kernel BFC38000
+setenv oad_addr 80500000
+setenv load_addr2 80F00000
+setenv kernel_flash BFC38000
+setenv load_addr_hello 80200000
+setenv bootargs 'root=/dev/ram0 init=/bin/sh'
+setenv load_rd_ext2 'ide res; ext2load ide 0:2 ${rd_start} /boot/initrd.gz'
+setenv load_rd_tftp 'tftp ${rd_start} /initrd.gz'
+setenv load_kernel_hda 'ide res; diskboot ${load_addr} 0:2'
+setenv load_kernel_ext2 'ide res; ext2load ide 0:2 ${load_addr} /boot/uImage'
+setenv load_kernel_tftp 'tftp ${load_addr} /qemu_mips/uImage'
+setenv boot_ext2_ext2 'run load_rd_ext2; run load_kernel_ext2; run addmisc; bootm ${load_addr}'
+setenv boot_ext2_flash 'run load_rd_ext2; run addmisc; bootm ${kernel_flash}'
+setenv boot_ext2_hda 'run load_rd_ext2; run load_kernel_hda; run addmisc; bootm ${load_addr}'
+setenv boot_ext2_tftp 'run load_rd_ext2; run load_kernel_tftp; run addmisc; bootm ${load_addr}'
+setenv boot_tftp_hda 'run load_rd_tftp; run load_kernel_hda; run addmisc; bootm ${load_addr}'
+setenv boot_tftp_ext2 'run load_rd_tftp; run load_kernel_ext2; run addmisc; bootm ${load_addr}'
+setenv boot_tftp_flash 'run load_rd_tftp; run addmisc; bootm ${kernel_flash}'
+setenv boot_tftp_tftp 'run load_rd_tftp; run load_kernel_tftp; run addmisc; bootm ${load_addr}'
+setenv load_hello_tftp 'tftp ${load_addr_hello} /examples/hello_world.bin'
+setenv go_tftp 'run load_hello_tftp; go ${load_addr_hello}'
+setenv addmisc 'setenv bootargs ${bootargs} console=ttyS0,${baudrate} rd_start=${rd_start} rd_size=${rd_size} ethaddr=${ethaddr}'
+setenv bootcmd 'run boot_tftp_flash'
+
+10) Now you can boot from flash, ide, ide+ext2 and tfp
+
+# qemu-system-mips -M mips -pflash flash -monitor null -nographic -net nic -net user -tftp `pwd` -hda ide
+
 II) How to debug U-Boot
 
 In order to debug U-Boot you need to start qemu with gdb server support (-s)
 and waiting the connection to start the CPU (-S)
 
-# qemu-system-mips -S -s -M mips -pflash flash -monitor null -nographic
+# qemu-system-mips -S -s -M mips -pflash flash -monitor null -nographic -net nic -net user -tftp `pwd` -hda ide
 
 in an other console you start gdb
 
 1) Debugging of U-Boot Before Relocation
 
 Before relocation, the addresses in the ELF file can be used without any problems
-buy connecting to the gdb server localhost:1234
+by connecting to the gdb server localhost:1234
 
 # mipsel-unknown-linux-gnu-gdb u-boot
 GNU gdb 6.6
diff --git a/include/configs/qemu-mips.h b/include/configs/qemu-mips.h
index f028d1a..8444462 100644
--- a/include/configs/qemu-mips.h
+++ b/include/configs/qemu-mips.h
@@ -150,7 +150,7 @@
 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	1
 
 #define CONFIG_ENV_IS_IN_FLASH	1
-#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + 0x40000)
+#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
 
 /* Address and size of Primary Environment Sector */
 #define CONFIG_ENV_SIZE		0x8000

^ permalink raw reply related	[flat|nested] 14+ messages in thread
* [U-Boot] [GIT PULL] MIPS updates
@ 2008-12-10 15:04 Shinya Kuribayashi
  2008-12-12 23:36 ` Wolfgang Denk
  0 siblings, 1 reply; 14+ messages in thread
From: Shinya Kuribayashi @ 2008-12-10 15:04 UTC (permalink / raw)
  To: u-boot

Hi Wolfgang,

please pull U-Boot/MIPS repository to pick up the following changes.

Thanks in advance,

  Shinya

---

The following changes since commit 2145188bea2df8f2b47a87ec3071b55027e8d0ae:
  Ben Warren (1):
        Fix compile error in building MBX860T.

are available in the git repository at:

  git://git.denx.de/u-boot-mips.git master

Stefan Roese (4):
      MIPS: Add onenand_init() to board.c and move nand_init()
      MIPS: Add board_early_init_f() to init_sequence
      MIPS: Add CONFIG_SKIP_LOWLEVEL_INIT
      MIPS: Flush data cache upon relocation

 cpu/mips/start.S |   32 +++++++++++++++++++++++++-------
 lib_mips/board.c |   25 ++++++++++++++++++++-----
 2 files changed, 45 insertions(+), 12 deletions(-)

diff --git a/cpu/mips/start.S b/cpu/mips/start.S
index 6a22302..57db589 100644
--- a/cpu/mips/start.S
+++ b/cpu/mips/start.S
@@ -243,9 +243,11 @@ reset:
 	mtc0	zero, CP0_COUNT
 	mtc0	zero, CP0_COMPARE
 
+#if !defined(CONFIG_SKIP_LOWLEVEL_INIT)
 	/* CONFIG0 register */
 	li	t0, CONF_CM_UNCACHED
 	mtc0	t0, CP0_CONFIG
+#endif /* !CONFIG_SKIP_LOWLEVEL_INIT */
 
 	/* Initialize $gp.
 	 */
@@ -255,6 +257,7 @@ reset:
 1:
 	lw	gp, 0(ra)
 
+#if !defined(CONFIG_SKIP_LOWLEVEL_INIT)
 	/* Initialize any external memory.
 	 */
 	la	t9, lowlevel_init
@@ -271,6 +274,7 @@ reset:
 	 */
 	li	t0, CONF_CM_CACHABLE_NONCOHERENT
 	mtc0	t0, CP0_CONFIG
+#endif /* !CONFIG_SKIP_LOWLEVEL_INIT */
 
 	/* Set up temporary stack.
 	 */
@@ -307,6 +311,7 @@ relocate_code:
 	la	t3, in_ram
 	lw	t2, -12(t3)	/* t2 <-- uboot_end_data	*/
 	move	t1, a2
+	move	s2, a2		/* s2 <-- destination address	*/
 
 	/*
 	 * Fix $gp:
@@ -316,13 +321,21 @@ relocate_code:
 	move	t6, gp
 	sub	gp, CONFIG_SYS_MONITOR_BASE
 	add	gp, a2		/* gp now adjusted		*/
-	sub	t6, gp, t6	/* t6 <-- relocation offset	*/
+	sub	s1, gp, t6	/* s1 <-- relocation offset	*/
 
 	/*
 	 * t0 = source address
 	 * t1 = target address
 	 * t2 = source end address
 	 */
+
+	/*
+	 * Save destination address and size for later usage in flush_cache()
+	 */
+	move	s0, a1		/* save gd in s0		*/
+	move	a0, t1		/* a0 <-- destination addr	*/
+	sub	a1, t2, t0	/* a1 <-- size			*/
+
 	/* On the purple board we copy the code earlier in a special way
 	 * in order to solve flash problems
 	 */
@@ -338,9 +351,14 @@ relocate_code:
 	/* If caches were enabled, we would have to flush them here.
 	 */
 
+	/* a0 & a1 are already set up for flush_cache(start, size) */
+	la	t9, flush_cache
+	jalr	t9
+	nop
+
 	/* Jump to where we've relocated ourselves.
 	 */
-	addi	t0, a2, in_ram - _start
+	addi	t0, s2, in_ram - _start
 	jr	t0
 	nop
 
@@ -367,7 +385,7 @@ in_ram:
 1:
 	lw	t1, 0(t4)
 	beqz	t1, 2f
-	add	t1, t6
+	add	t1, s1
 	sw	t1, 0(t4)
 2:
 	addi	t2, 1
@@ -378,8 +396,8 @@ in_ram:
 	 */
 	lw	t1, -12(t0)	/* t1 <-- uboot_end_data	*/
 	lw	t2, -8(t0)	/* t2 <-- uboot_end		*/
-	add	t1, t6		/* adjust pointers		*/
-	add	t2, t6
+	add	t1, s1		/* adjust pointers		*/
+	add	t2, s1
 
 	sub	t1, 4
 1:
@@ -387,10 +405,10 @@ in_ram:
 	bltl	t1, t2, 1b
 	sw	zero, 0(t1)	/* delay slot			*/
 
-	move	a0, a1
+	move	a0, s0		/* a0 <-- gd			*/
 	la	t9, board_init_r
 	jr	t9
-	move	a1, a2		/* delay slot			*/
+	move	a1, s2		/* delay slot			*/
 
 	.end	relocate_code
 
diff --git a/lib_mips/board.c b/lib_mips/board.c
index 9c997f1..dfe6831 100644
--- a/lib_mips/board.c
+++ b/lib_mips/board.c
@@ -30,6 +30,7 @@
 #include <net.h>
 #include <environment.h>
 #include <nand.h>
+#include <onenand_uboot.h>
 #include <spi.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -71,6 +72,15 @@ static ulong mem_malloc_brk;
  */
 unsigned long mips_io_port_base = -1;
 
+int __board_early_init_f(void)
+{
+	/*
+	 * Nothing to do in this dummy implementation
+	 */
+	return 0;
+}
+int board_early_init_f(void) __attribute__((weak, alias("__board_early_init_f")));
+
 /*
  * The Malloc area is immediately below the monitor copy in DRAM
  */
@@ -168,6 +178,7 @@ static int init_baudrate (void)
 typedef int (init_fnc_t) (void);
 
 init_fnc_t *init_sequence[] = {
+	board_early_init_f,
 	timer_init,
 	env_init,		/* initialize environment */
 #ifdef CONFIG_INCA_IP
@@ -378,6 +389,15 @@ void board_init_r (gd_t *id, ulong dest_addr)
 	mem_malloc_init();
 	malloc_bin_reloc();
 
+#ifdef CONFIG_CMD_NAND
+	puts ("NAND:  ");
+	nand_init ();		/* go init the NAND */
+#endif
+
+#if defined(CONFIG_CMD_ONENAND)
+	onenand_init();
+#endif
+
 	/* relocate environment function pointers etc. */
 	env_relocate();
 
@@ -419,11 +439,6 @@ void board_init_r (gd_t *id, ulong dest_addr)
 	}
 #endif
 
-#ifdef CONFIG_CMD_NAND
-	puts ("NAND:  ");
-	nand_init ();		/* go init the NAND */
-#endif
-
 #ifdef CONFIG_CMD_SPI
 	puts ("SPI:   ");
 	spi_init ();		/* go init the SPI */

^ permalink raw reply related	[flat|nested] 14+ messages in thread
* [U-Boot] [GIT PULL] MIPS updates
@ 2008-09-03 17:06 Shinya Kuribayashi
  2008-09-03 21:00 ` Wolfgang Denk
  0 siblings, 1 reply; 14+ messages in thread
From: Shinya Kuribayashi @ 2008-09-03 17:06 UTC (permalink / raw)
  To: u-boot

Hi Wolfgang,

please pull MIPS repository to pick up the following change:

---

The following changes since commit 628ffd73bcff0c9f3bc5a8eeb2c7455fe9d28a51:
  Jean-Christophe PLAGNIOL-VILLARD (1):
        device: make device_register() clone the device

are available in the git repository at:

  git://git.denx.de/u-boot-mips.git master

Jean-Christophe PLAGNIOL-VILLARD (1):
      doc/qemu_mips: add doc howto debug u-boot with gdb

 doc/README.qemu_mips |   64 +++++++++++++++++++++++++++++++++++++++++++++++++-
 1 files changed, 63 insertions(+), 1 deletions(-)

diff --git a/doc/README.qemu_mips b/doc/README.qemu_mips
index c9ac3f3..472469f 100644
--- a/doc/README.qemu_mips
+++ b/doc/README.qemu_mips
@@ -1,7 +1,7 @@
 
 Notes for the Qemu MIPS port
 
-Example usage:
+I) Example usage:
 
 # ln -s u-boot.bin mips_bios.bin
 start it:
@@ -16,3 +16,65 @@ create image:
 # dd of=flash bs=1k conv=notrunc if=u-boot.bin
 start it:
 # qemu-system-mips -M mips -pflash flash -monitor null -nographic
+
+II) How to debug U-Boot
+
+In order to debug U-Boot you need to start qemu with gdb server support (-s)
+and waiting the connection to start the CPU (-S)
+
+# qemu-system-mips -S -s -M mips -pflash flash -monitor null -nographic
+
+in an other console you start gdb
+
+1) Debugging of U-Boot Before Relocation
+
+Before relocation, the addresses in the ELF file can be used without any problems
+buy connecting to the gdb server localhost:1234
+
+# mipsel-unknown-linux-gnu-gdb u-boot
+GNU gdb 6.6
+Copyright (C) 2006 Free Software Foundation, Inc.
+GDB is free software, covered by the GNU General Public License, and you are
+welcome to change it and/or distribute copies of it under certain conditions.
+Type "show copying" to see the conditions.
+There is absolutely no warranty for GDB.  Type "show warranty" for details.
+This GDB was configured as "--host=i486-linux-gnu --target=mipsel-unknown-linux-gnu"...
+(gdb)  target remote localhost:1234
+Remote debugging using localhost:1234
+_start () at start.S:64
+64              RVECENT(reset,0)        /* U-boot entry point */
+Current language:  auto; currently asm
+(gdb)  b board.c:289
+Breakpoint 1 at 0xbfc00cc8: file board.c, line 289.
+(gdb) c
+Continuing.
+
+Breakpoint 1, board_init_f (bootflag=<value optimized out>) at board.c:290
+290             relocate_code (addr_sp, id, addr);
+Current language:  auto; currently c
+(gdb) p/x addr
+$1 = 0x87fa0000
+
+2) Debugging of U-Boot After Relocation
+
+For debugging U-Boot after relocation we need to know the address to which
+U-Boot relocates itself to 0x87fa0000 by default.
+And replace the symbol table to this offset.
+
+(gdb) symbol-file
+Discard symbol table from `/private/u-boot-arm/u-boot'? (y or n) y
+Error in re-setting breakpoint 1:
+No symbol table is loaded.  Use the "file" command.
+No symbol file now.
+(gdb) add-symbol-file u-boot 0x87fa0000
+add symbol table from file "u-boot" at
+        .text_addr = 0x87fa0000
+(y or n) y
+Reading symbols from /private/u-boot-arm/u-boot...done.
+Breakpoint 1 at 0x87fa0cc8: file board.c, line 289.
+(gdb) c
+Continuing.
+
+Program received signal SIGINT, Interrupt.
+0xffffffff87fa0de4 in udelay (usec=<value optimized out>) at time.c:78
+78              while ((tmo - read_c0_count()) < 0x7fffffff)

^ permalink raw reply related	[flat|nested] 14+ messages in thread
end of thread, other threads:[~2010-01-21 21:03 UTC | newest]

Thread overview: 14+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2009-05-16  0:29 [U-Boot] [GIT PULL] MIPS updates Shinya Kuribayashi
2009-05-16  0:43 ` Shinya Kuribayashi
2009-05-16  7:36   ` Wolfgang Denk
2009-05-16  7:36 ` Wolfgang Denk
  -- strict thread matches above, loose matches on Subject: below --
2010-01-20 12:23 Shinya Kuribayashi
2010-01-21 21:03 ` Wolfgang Denk
2009-01-27 14:16 Shinya Kuribayashi
2009-01-27 19:57 ` Wolfgang Denk
2008-12-17 13:43 Shinya Kuribayashi
2008-12-30 22:29 ` Wolfgang Denk
2008-12-10 15:04 Shinya Kuribayashi
2008-12-12 23:36 ` Wolfgang Denk
2008-09-03 17:06 Shinya Kuribayashi
2008-09-03 21:00 ` Wolfgang Denk

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox