[U-Boot] [PATCH v2 0/3] MX31: NAND boot for phyCORE and PDK boards.

[U-Boot] [PATCH v2 0/3] MX31: NAND boot for phyCORE and PDK boards.

[Magnus Lilja]

Hi all,

I have now updated the i.MX31 NAND boot patches. It applies to the -next
tree (aka v2009.06-rc1) as of now.

I've taken care of most of the comments/questions that were sent to
Maxim Artamonov when he posted his latest (last?) patch. The comments
received on my parts has been taken care of as well.

Some general comments:
* phyCORE support has not been updated. I don't have such a board to
test on.
* The code has been tested on real hardware an boots Linux from 
ethernet.
* There are infinite loops on nand_boot_mx31.c and looking at other
nand_spl boards, they're there as well. If something goes wrong 
that early in the boot process there's really not a lot to do and
remember that the NAND_SPL code has to fit in 2048 bytes.

Regards, Magnus

Magnus Lilja (3):
  MX31: Add NAND SPL for i.MX31.
  MX31: Add basic support for Freescale i.MX31 PDK board.
  MX31: Add NAND SPL boot support to i.MX31 PDK board.

 MAKEALL                                     |    2 +
 Makefile                                    |   12 ++-
 board/freescale/mx31pdk/Makefile            |   53 +++++++
 board/freescale/mx31pdk/config.mk           |    5 +
 board/freescale/mx31pdk/lowlevel_init.S     |  123 +++++++++++++++
 board/freescale/mx31pdk/mx31pdk.c           |   76 +++++++++
 board/freescale/mx31pdk/u-boot-nand.lds     |   33 ++++
 board/freescale/mx31pdk/u-boot.lds          |   59 +++++++
 cpu/arm1136/start.S                         |   29 ++--
 include/asm-arm/arch-mx31/mx31-regs.h       |   92 +++++++++++
 include/configs/mx31pdk.h                   |  175 +++++++++++++++++++++
 nand_spl/board/freescale/mx31pdk/Makefile   |   54 +++++++
 nand_spl/board/freescale/mx31pdk/config.mk  |    5 +
 nand_spl/board/freescale/mx31pdk/u-boot.lds |   36 +++++
 nand_spl/nand_boot_mx31.c                   |  223 +++++++++++++++++++++++++++
 15 files changed, 965 insertions(+), 12 deletions(-)
 create mode 100644 board/freescale/mx31pdk/Makefile
 create mode 100644 board/freescale/mx31pdk/config.mk
 create mode 100644 board/freescale/mx31pdk/lowlevel_init.S
 create mode 100644 board/freescale/mx31pdk/mx31pdk.c
 create mode 100644 board/freescale/mx31pdk/u-boot-nand.lds
 create mode 100644 board/freescale/mx31pdk/u-boot.lds
 create mode 100644 include/configs/mx31pdk.h
 create mode 100644 nand_spl/board/freescale/mx31pdk/Makefile
 create mode 100644 nand_spl/board/freescale/mx31pdk/config.mk
 create mode 100644 nand_spl/board/freescale/mx31pdk/u-boot.lds
 create mode 100644 nand_spl/nand_boot_mx31.c

[U-Boot] [PATCH v2 1/3] MX31: Add NAND SPL for i.MX31.

[Magnus Lilja]

This patch adds the NAND SPL framework needed to boot i.MX31 boards
from NAND.

The patch is based on the work by Maxim Artamonov
<scn1874@yandex.ru > (which was signed-off-by him).

Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
---
 cpu/arm1136/start.S                   |   29 +++--
 include/asm-arm/arch-mx31/mx31-regs.h |   90 +++++++++++++
 nand_spl/nand_boot_mx31.c             |  223 +++++++++++++++++++++++++++++++++
 3 files changed, 331 insertions(+), 11 deletions(-)
 create mode 100644 nand_spl/nand_boot_mx31.c

diff --git a/cpu/arm1136/start.S b/cpu/arm1136/start.S
index e622338..9bbbaf1 100644
--- a/cpu/arm1136/start.S
+++ b/cpu/arm1136/start.S
@@ -1,6 +1,9 @@
 /*
  *  armboot - Startup Code for OMP2420/ARM1136 CPU-core
  *
+ *
+ *  Copyright (c) 2008 Maxim Artamonov, <scn1874@yandex.ru>
+ *
  *  Copyright (c) 2004	Texas Instruments <r-woodruff2@ti.com>
  *
  *  Copyright (c) 2001	Marius Gr?ger <mag@sysgo.de>
@@ -32,7 +35,7 @@
 #include <version.h>
 .globl _start
 _start: b	reset
-#ifdef CONFIG_ONENAND_IPL
+#if defined(CONFIG_ONENAND_IPL) || defined(CONFIG_NAND_SPL)
 	ldr	pc, _hang
 	ldr	pc, _hang
 	ldr	pc, _hang
@@ -156,9 +159,9 @@ relocate:				/* relocate U-Boot to RAM	    */
 	adr	r0, _start		/* r0 <- current position of code   */
 	ldr	r1, _TEXT_BASE		/* test if we run from flash or RAM */
 	cmp	r0, r1			/* don't reloc during debug	    */
-#ifndef CONFIG_ONENAND_IPL
+#if !defined(CONFIG_ONENAND_IPL) && !defined(CONFIG_NAND_SPL)
 	beq	stack_setup
-#endif	/* CONFIG_ONENAND_IPL */
+#endif	/* !CONFIG_ONENAND_IPL && !CONFIG_NAND_SPL*/
 
 	ldr	r2, _armboot_start
 	ldr	r3, _bss_start
@@ -175,7 +178,7 @@ copy_loop:
 	/* Set up the stack						    */
 stack_setup:
 	ldr	r0, _TEXT_BASE		/* upper 128 KiB: relocated uboot   */
-#ifdef CONFIG_ONENAND_IPL
+#if defined(CONFIG_ONENAND_IPL) || defined (CONFIG_NAND_SPL)
 	sub	sp, r0, #128		/* leave 32 words for abort-stack   */
 #else
 	sub	r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area			    */
@@ -184,14 +187,14 @@ stack_setup:
 	sub	r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
 #endif
 	sub	sp, r0, #12		/* leave 3 words for abort-stack    */
-#endif	/* CONFIG_ONENAND_IPL */
+#endif	/* CONFIG_ONENAND_IPL || CONFIG_NAND_SPL*/
 
 clear_bss:
 	ldr	r0, _bss_start		/* find start of bss segment	    */
 	ldr	r1, _bss_end		/* stop here			    */
 	mov	r2, #0x00000000		/* clear			    */
 
-#ifndef CONFIG_ONENAND_IPL
+#if !defined(CONFIG_ONENAND_IPL) && !defined(CONFIG_NAND_SPL)
 clbss_l:str	r2, [r0]		/* clear loop...		    */
 	add	r0, r0, #4
 	cmp	r0, r1
@@ -200,12 +203,15 @@ clbss_l:str	r2, [r0]		/* clear loop...		    */
 
 	ldr	pc, _start_armboot
 
+#ifdef CONFIG_NAND_SPL
+_start_armboot: .word nand_boot
+#else
 #ifdef CONFIG_ONENAND_IPL
 _start_armboot: .word start_oneboot
 #else
 _start_armboot: .word start_armboot
-#endif
-
+#endif /* CONFIG_ONENAND_IPL */
+#endif /* CONFIG_NAND_SPL */
 
 /*
  *************************************************************************
@@ -244,7 +250,7 @@ cpu_init_crit:
 	mov	lr, ip		/* restore link */
 	mov	pc, lr		/* back to my caller */
 
-#ifndef CONFIG_ONENAND_IPL
+#if !defined(CONFIG_ONENAND_IPL) && !defined(CONFIG_NAND_SPL)
 /*
  *************************************************************************
  *
@@ -357,12 +363,12 @@ cpu_init_crit:
 	.macro get_fiq_stack			@ setup FIQ stack
 	ldr	sp, FIQ_STACK_START
 	.endm
-#endif	/* CONFIG_ONENAND_IPL */
+#endif	/* !CONFIG_ONENAND_IPL && !CONFIG_NAND_SPL*/
 
 /*
  * exception handlers
  */
-#ifdef CONFIG_ONENAND_IPL
+#if defined(CONFIG_ONENAND_IPL) || defined(CONFIG_NAND_SPL)
 	.align	5
 do_hang:
 	ldr	sp, _TEXT_BASE			/* use 32 words about stack */
@@ -436,3 +442,4 @@ arm1136_cache_flush:
 		mcr	p15, 0, r1, c7, c5, 0	@ invalidate I cache
 		mov	pc, lr			@ back to caller
 #endif	/* CONFIG_ONENAND_IPL */
+
diff --git a/include/asm-arm/arch-mx31/mx31-regs.h b/include/asm-arm/arch-mx31/mx31-regs.h
index a8a05c8..3d811d7 100644
--- a/include/asm-arm/arch-mx31/mx31-regs.h
+++ b/include/asm-arm/arch-mx31/mx31-regs.h
@@ -194,4 +194,94 @@
 #define CS5_BASE	0xB6000000
 #define PCMCIA_MEM_BASE	0xC0000000
 
+/*
+ * NAND controller
+ */
+#define NFC_BASE_ADDR	0xB8000000
+
+/*
+ * Addresses for NFC registers
+ */
+#define NFC_BUF_SIZE		(NFC_BASE_ADDR + 0xE00)
+#define NFC_BUF_ADDR		(NFC_BASE_ADDR + 0xE04)
+#define NFC_FLASH_ADDR		(NFC_BASE_ADDR + 0xE06)
+#define NFC_FLASH_CMD		(NFC_BASE_ADDR + 0xE08)
+#define NFC_CONFIG		(NFC_BASE_ADDR + 0xE0A)
+#define NFC_ECC_STATUS_RESULT	(NFC_BASE_ADDR + 0xE0C)
+#define NFC_RSLTMAIN_AREA	(NFC_BASE_ADDR + 0xE0E)
+#define NFC_RSLTSPARE_AREA	(NFC_BASE_ADDR + 0xE10)
+#define NFC_WRPROT		(NFC_BASE_ADDR + 0xE12)
+#define NFC_UNLOCKSTART_BLKADDR	(NFC_BASE_ADDR + 0xE14)
+#define NFC_UNLOCKEND_BLKADDR	(NFC_BASE_ADDR + 0xE16)
+#define NFC_NF_WRPRST		(NFC_BASE_ADDR + 0xE18)
+#define NFC_CONFIG1		(NFC_BASE_ADDR + 0xE1A)
+#define NFC_CONFIG2		(NFC_BASE_ADDR + 0xE1C)
+
+/*
+ * Addresses for NFC RAM BUFFER Main area 0
+ */
+#define MAIN_AREA0	(NFC_BASE_ADDR + 0x000)
+#define MAIN_AREA1	(NFC_BASE_ADDR + 0x200)
+#define MAIN_AREA2	(NFC_BASE_ADDR + 0x400)
+#define MAIN_AREA3	(NFC_BASE_ADDR + 0x600)
+
+/*
+ * Addresses for NFC SPARE BUFFER Spare area 0
+ */
+#define SPARE_AREA0	(NFC_BASE_ADDR + 0x800)
+#define SPARE_AREA1	(NFC_BASE_ADDR + 0x810)
+#define SPARE_AREA2	(NFC_BASE_ADDR + 0x820)
+#define SPARE_AREA3	(NFC_BASE_ADDR + 0x830)
+
+/*
+ * Set INT to 0, FCMD to 1, rest to 0 in NFC_CONFIG2 Register for Command
+ * operation
+ */
+#define NFC_CMD		0x1
+
+/*
+ * Set INT to 0, FADD to 1, rest to 0 in NFC_CONFIG2 Register for Address
+ * operation
+ */
+#define NFC_ADDR	0x2
+
+/*
+ * Set INT to 0, FDI to 1, rest to 0 in NFC_CONFIG2 Register for Input
+ * operation
+ */
+#define NFC_INPUT	0x4
+
+/*
+ * Set INT to 0, FDO to 001, rest to 0 in NFC_CONFIG2 Register for Data
+ * Output operation
+ */
+#define NFC_OUTPUT	0x8
+
+/*
+ * Set INT to 0, FD0 to 010, rest to 0 in NFC_CONFIG2 Register for Read ID
+ * operation
+ */
+#define NFC_ID		0x10
+
+/*
+ * Set INT to 0, FDO to 100, rest to 0 in NFC_CONFIG2 Register for Read
+ * Status operation
+ */
+#define NFC_STATUS	0x20
+
+/*
+ * Set INT to 1, rest to 0 in NFC_CONFIG2 Register for Read Status
+ * operation
+ */
+#define NFC_INT		0x8000
+
+#define NFC_SP_EN	(1 << 2)
+#define NFC_ECC_EN	(1 << 3)
+#define NFC_INT_MSK	(1 << 4)
+#define NFC_BIG		(1 << 5)
+#define NFC_RST		(1 << 6)
+#define NFC_CE		(1 << 7)
+#define NFC_ONE_CYCLE	(1 << 8)
+
 #endif /* __ASM_ARCH_MX31_REGS_H */
+
diff --git a/nand_spl/nand_boot_mx31.c b/nand_spl/nand_boot_mx31.c
new file mode 100644
index 0000000..d698d2a
--- /dev/null
+++ b/nand_spl/nand_boot_mx31.c
@@ -0,0 +1,223 @@
+/*
+ * (C) Copyright 2008
+ * Maxim Artamonov, <scn1874@yandex.ru>
+ *
+ * (C) Copyright 2006-2008
+ * Stefan Roese, DENX Software Engineering, sr at denx.de.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include <common.h>
+#include <nand.h>
+#include <asm-arm/arch/mx31-regs.h>
+#include <asm/io.h>
+
+static void mx31_wait_ready(void)
+{
+	while (1) {
+		if (readw(NFC_CONFIG2) & NFC_INT) {
+			uint32_t tmp;
+			/* Reset interrupt flag */
+			tmp = readw(NFC_CONFIG2);
+			tmp &= ~NFC_INT;
+			writew(tmp, NFC_CONFIG2);
+			break;
+		}
+	}
+}
+
+static void mx31_nand_init(void)
+{
+	/* unlocking RAM Buff */
+	writew(0x2, NFC_CONFIG);
+
+	/* hardware ECC checking and correct */
+	writew(NFC_ECC_EN, NFC_CONFIG1);
+}
+
+static void mx31_nand_command(unsigned short command)
+{
+	writew(command, NFC_FLASH_CMD);
+	writew(NFC_CMD, NFC_CONFIG2);
+	mx31_wait_ready();
+}
+
+static void mx31_nand_page_address(unsigned int page_address)
+{
+	unsigned int page_count;
+
+	writew(0x00, NFC_FLASH_ADDR);
+	writew(NFC_ADDR, NFC_CONFIG2);
+	mx31_wait_ready();
+
+	/* code only for 2kb flash */
+	if (CFG_NAND_PAGE_SIZE == 0x800) {
+		writew(0x00, NFC_FLASH_ADDR);
+		writew(NFC_ADDR, NFC_CONFIG2);
+		mx31_wait_ready();
+	}
+
+	page_count = CFG_NAND_CHIP_SIZE / CFG_NAND_PAGE_SIZE;
+
+	if (page_address <= page_count) {
+		page_count--; /* transform 0x01000000 to 0x00ffffff */
+		do {
+			writew(page_address & 0xff, NFC_FLASH_ADDR);
+			writew(NFC_ADDR, NFC_CONFIG2);
+			mx31_wait_ready();
+			page_address = page_address >> 8;
+			page_count = page_count >> 8;
+		} while (page_count);
+	}
+}
+
+static void mx31_nand_data_output(void)
+{
+	int i;
+
+	/*
+	 * The NAND controller requires four output commands for
+	 * large page devices.
+	 */
+	for (i = 0; i < (CFG_NAND_PAGE_SIZE / 512); i++) {
+		writew(NFC_ECC_EN, NFC_CONFIG1);
+		writew(i, NFC_BUF_ADDR); /* read in i:th buffer */
+		writew(NFC_OUTPUT, NFC_CONFIG2);
+		mx31_wait_ready();
+	}
+}
+
+static int mx31_nand_check_ecc(void)
+{
+	unsigned short ecc_status_register;
+
+	ecc_status_register = readw(NFC_ECC_STATUS_RESULT);
+
+	if (ecc_status_register != 0)
+		return 1; /* error */
+	return 0;
+}
+
+static int mx31_read_page(unsigned int page_address, unsigned char *buf)
+{
+	int i;
+	volatile u32 *p1;
+	volatile u32 *p2;
+	u32 a;
+
+	writew(0, NFC_BUF_ADDR); /* read in first 0 buffer */
+	mx31_nand_command(NAND_CMD_READ0);
+	mx31_nand_page_address(page_address);
+
+	if (CFG_NAND_CHIP_SIZE >= 0x08000000)
+		mx31_nand_command(NAND_CMD_READSTART);
+
+	mx31_nand_data_output(); /* fill the main buffer 0 */
+
+	if (mx31_nand_check_ecc())
+		return -1;
+
+	p1 = (u32 *)MAIN_AREA0;
+	p2 = (u32 *)buf;
+
+	/* main copy loop from NAND-buffer to SDRAM memory */
+	for (i = 0; i < (CFG_NAND_PAGE_SIZE / 4); i++) {
+		*p2 = *p1;
+		p1++;
+		p2++;
+	}
+
+	p1 = (u32 *)SPARE_AREA0;
+
+	/* it is hardware specific code for 8-bit 512B NAND-flash spare area */
+	p1++;
+	a = *p1;
+	a = (a & 0x0000ff00) >> 8;
+
+	if (a != 0xff) /* bad block marker verify */
+		return 1; /* potential bad block */
+
+	return 0;
+}
+
+static int nand_load(unsigned int from, unsigned int size, unsigned char *buf)
+{
+	int i, bb;
+
+	mx31_nand_init();
+
+	/* convert from to page number */
+	from = from / CFG_NAND_PAGE_SIZE;
+
+	i = 0;
+
+	while (i < (size/CFG_NAND_PAGE_SIZE)) {
+		if ((from * CFG_NAND_PAGE_SIZE) >= CFG_NAND_CHIP_SIZE)
+			return 2; /* memory segment violation */
+
+		bb = mx31_read_page(from, buf);
+
+		if (bb < 0)
+			return -1;
+
+		/* checking first page of each block */
+		/* if this page has bb marker, then skip whole block */
+		if ((!(from % CFG_NAND_PAGES_PER_BLOCK)) && bb) {
+			from = from + CFG_NAND_PAGES_PER_BLOCK;
+		} else {
+			i++;
+			from++;
+			buf = buf + CFG_NAND_PAGE_SIZE;
+		}
+	}
+
+	return 0;
+}
+
+/*
+ * The main entry for NAND booting. It's necessary that SDRAM is already
+ * configured and available since this code loads the main U-Boot image
+ * from NAND into SDRAM and starts it from there.
+ */
+void nand_boot(void)
+{
+	__attribute__((noreturn)) void (*uboot)(void);
+
+	/* CFG_NAND_U_BOOT_OFFS and CFG_NAND_U_BOOT_SIZE must */
+	/* be aligned to full pages */
+	if (!nand_load(CFG_NAND_U_BOOT_OFFS, CFG_NAND_U_BOOT_SIZE,
+		       (uchar *)CFG_NAND_U_BOOT_DST)) {
+		/* Copy from NAND successful, start U-boot */
+		uboot = (void *)CFG_NAND_U_BOOT_START;
+		uboot();
+	} else {
+		/* Unrecoverable error when copying from NAND */
+		while (1) {
+			/* Loop forever */
+		}
+	}
+}
+
+/*
+ * Called from start.S in case of an exception.
+ */
+void hang(void)
+{
+	while (1) {
+		/* Loop forever */
+	}
+}
+
-- 
1.5.6

[U-Boot] [PATCH v2 2/3] MX31: Add basic support for Freescale i.MX31 PDK board.

[Magnus Lilja]

Add support for Freescale's i.MX31 PDK board (a.k.a. 3 stack board).

This patch assumes that some other program performs the actual
NAND boot.

Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
---
 MAKEALL                                 |    1 +
 Makefile                                |    3 +
 board/freescale/mx31pdk/Makefile        |   53 ++++++++++
 board/freescale/mx31pdk/config.mk       |    1 +
 board/freescale/mx31pdk/lowlevel_init.S |   30 ++++++
 board/freescale/mx31pdk/mx31pdk.c       |   76 ++++++++++++++
 board/freescale/mx31pdk/u-boot.lds      |   59 +++++++++++
 include/asm-arm/arch-mx31/mx31-regs.h   |    2 +
 include/configs/mx31pdk.h               |  162 +++++++++++++++++++++++++++++++
 9 files changed, 387 insertions(+), 0 deletions(-)
 create mode 100644 board/freescale/mx31pdk/Makefile
 create mode 100644 board/freescale/mx31pdk/config.mk
 create mode 100644 board/freescale/mx31pdk/lowlevel_init.S
 create mode 100644 board/freescale/mx31pdk/mx31pdk.c
 create mode 100644 board/freescale/mx31pdk/u-boot.lds
 create mode 100644 include/configs/mx31pdk.h

diff --git a/MAKEALL b/MAKEALL
index f13c81a..aaa6dea 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -548,6 +548,7 @@ LIST_ARM11="			\
 	imx31_phycore		\
 	imx31_phycore_eet	\
 	mx31ads			\
+ 	mx31pdk			\
 	qong			\
 	smdk6400		\
 "
diff --git a/Makefile b/Makefile
index 137c88f..99ebcc5 100644
--- a/Makefile
+++ b/Makefile
@@ -3084,6 +3084,9 @@ imx31_phycore_config	: unconfig
 mx31ads_config		: unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm1136 mx31ads freescale mx31
 
+mx31pdk_config		: unconfig
+	@$(MKCONFIG) $(@:_config=) arm arm1136 mx31pdk freescale mx31
+
 omap2420h4_config	: unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 NULL omap24xx
 
diff --git a/board/freescale/mx31pdk/Makefile b/board/freescale/mx31pdk/Makefile
new file mode 100644
index 0000000..b64cec8
--- /dev/null
+++ b/board/freescale/mx31pdk/Makefile
@@ -0,0 +1,53 @@
+#
+# (C) Copyright 2008 Magnus Lilja <lilja.magnus@gmail.com>
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS	:= mx31pdk.o
+SOBJS	:= lowlevel_init.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/freescale/mx31pdk/config.mk b/board/freescale/mx31pdk/config.mk
new file mode 100644
index 0000000..d34dc02
--- /dev/null
+++ b/board/freescale/mx31pdk/config.mk
@@ -0,0 +1 @@
+TEXT_BASE = 0x87f00000
diff --git a/board/freescale/mx31pdk/lowlevel_init.S b/board/freescale/mx31pdk/lowlevel_init.S
new file mode 100644
index 0000000..ec5eedb
--- /dev/null
+++ b/board/freescale/mx31pdk/lowlevel_init.S
@@ -0,0 +1,30 @@
+/*
+ * (C) Copyright 2008 Magnus Lilja <lilja.magnus@gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * This is just to keep the linker happy.
+ */
+
+.globl lowlevel_init
+
+lowlevel_init:
+	mov	pc, lr
diff --git a/board/freescale/mx31pdk/mx31pdk.c b/board/freescale/mx31pdk/mx31pdk.c
new file mode 100644
index 0000000..9eed979
--- /dev/null
+++ b/board/freescale/mx31pdk/mx31pdk.c
@@ -0,0 +1,76 @@
+/*
+ *
+ * (C) Copyright 2008 Magnus Lilja <lilja.magnus@gmail.com>
+ *
+ * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+#include <common.h>
+#include <asm/arch/mx31.h>
+#include <asm/arch/mx31-regs.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int dram_init(void)
+{
+	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+
+	return 0;
+}
+
+int board_init(void)
+{
+	/* CS5: CPLD incl. network controller */
+	__REG(CSCR_U(5)) = 0x0000d843;
+	__REG(CSCR_L(5)) = 0x22252521;
+	__REG(CSCR_A(5)) = 0x22220a00;
+
+	/* setup pins for UART1 */
+	mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX);
+	mx31_gpio_mux(MUX_TXD1__UART1_TXD_MUX);
+	mx31_gpio_mux(MUX_RTS1__UART1_RTS_B);
+	mx31_gpio_mux(MUX_CTS1__UART1_CTS_B);
+
+	/* SPI2 */
+	mx31_gpio_mux(MUX_CSPI2_SS2__CSPI2_SS2_B);
+	mx31_gpio_mux(MUX_CSPI2_SCLK__CSPI2_CLK);
+	mx31_gpio_mux(MUX_CSPI2_SPI_RDY__CSPI2_DATAREADY_B);
+	mx31_gpio_mux(MUX_CSPI2_MOSI__CSPI2_MOSI);
+	mx31_gpio_mux(MUX_CSPI2_MISO__CSPI2_MISO);
+	mx31_gpio_mux(MUX_CSPI2_SS0__CSPI2_SS0_B);
+	mx31_gpio_mux(MUX_CSPI2_SS1__CSPI2_SS1_B);
+
+	/* start SPI2 clock */
+	__REG(CCM_CGR2) = __REG(CCM_CGR2) | (3 << 4);
+
+	gd->bd->bi_arch_number = MACH_TYPE_MX31_3DS; /* board id for linux */
+	gd->bd->bi_boot_params = 0x80000100; /* adress of boot parameters */
+
+	return 0;
+}
+
+int checkboard(void)
+{
+	printf("Board: i.MX31 MAX PDK (3DS)\n");
+	return 0;
+}
diff --git a/board/freescale/mx31pdk/u-boot.lds b/board/freescale/mx31pdk/u-boot.lds
new file mode 100644
index 0000000..e96509a
--- /dev/null
+++ b/board/freescale/mx31pdk/u-boot.lds
@@ -0,0 +1,59 @@
+/*
+ * January 2004 - Changed to support H4 device
+ * Copyright (c) 2004 Texas Instruments
+ *
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+	. = 0x00000000;
+
+	. = ALIGN(4);
+	.text	   :
+	{
+		cpu/arm1136/start.o	(.text)
+		*(.text)
+	}
+
+	. = ALIGN(4);
+	.rodata : { *(.rodata) }
+
+	. = ALIGN(4);
+	.data : { *(.data) }
+
+	. = ALIGN(4);
+	.got : { *(.got) }
+
+	. = .;
+	__u_boot_cmd_start = .;
+	.u_boot_cmd : { *(.u_boot_cmd) }
+	__u_boot_cmd_end = .;
+
+	. = ALIGN(4);
+	__bss_start = .;
+	.bss : { *(.bss) }
+	_end = .;
+}
diff --git a/include/asm-arm/arch-mx31/mx31-regs.h b/include/asm-arm/arch-mx31/mx31-regs.h
index 3d811d7..b18cc85 100644
--- a/include/asm-arm/arch-mx31/mx31-regs.h
+++ b/include/asm-arm/arch-mx31/mx31-regs.h
@@ -84,6 +84,8 @@
 #define IPU_CONF_IC_EN		(1<<1)
 #define IPU_CONF_SCI_EN		(1<<0)
 
+#define ARM_PPMRR		0x40000015
+
 #define WDOG_BASE		0x53FDC000
 
 /*
diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h
new file mode 100644
index 0000000..deda70d
--- /dev/null
+++ b/include/configs/mx31pdk.h
@@ -0,0 +1,162 @@
+/*
+ * (C) Copyright 2008 Magnus Lilja <lilja.magnus@gmail.com>
+ *
+ * (C) Copyright 2004
+ * Texas Instruments.
+ * Richard Woodruff <r-woodruff2@ti.com>
+ * Kshitij Gupta <kshitij@ti.com>
+ *
+ * Configuration settings for the Freescale i.MX31 PDK board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <asm/arch/mx31-regs.h>
+
+/* High Level Configuration Options */
+#define CONFIG_ARM1136		1    /* This is an arm1136 CPU core */
+#define CONFIG_MX31		1    /* in a mx31 */
+#define CONFIG_MX31_HCLK_FREQ	26000000
+#define CONFIG_MX31_CLK32	32768
+
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DISPLAY_BOARDINFO
+
+#define CONFIG_CMDLINE_TAG		1    /* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS	1
+#define CONFIG_INITRD_TAG		1
+
+/* No support for NAND boot for i.MX31 PDK yet, so we rely on some other
+ * program to initialize the SDRAM.
+ */
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
+/*
+ * Size of malloc() pool
+ */
+#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 128 * 1024)
+/* Bytes reserved for initial data */
+#define CONFIG_SYS_GBL_DATA_SIZE	128
+
+/*
+ * Hardware drivers
+ */
+
+#define CONFIG_MX31_UART	1
+#define CONFIG_SYS_MX31_UART1	1
+
+#define CONFIG_HARD_SPI		1
+#define CONFIG_MXC_SPI		1
+#define CONFIG_DEFAULT_SPI_BUS	1
+#define CONFIG_DEFAULT_SPI_MODE	(SPI_MODE_2 | SPI_CS_HIGH)
+
+#define CONFIG_RTC_MC13783	1
+
+/* MC13783 connected to CSPI2 and SS2 */
+#define CONFIG_MC13783_SPI_BUS	1
+#define CONFIG_MC13783_SPI_CS	2
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_CONS_INDEX		1
+#define CONFIG_BAUDRATE			115200
+#define CONFIG_SYS_BAUDRATE_TABLE	{9600, 19200, 38400, 57600, 115200}
+
+/***********************************************************
+ * Command definition
+ ***********************************************************/
+
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SPI
+#define CONFIG_CMD_DATE
+
+/* Disabled due to compilation errors in cmd_bootm.c (IMLS seems to require
+ * that CFG_NO_FLASH is undefined).
+ */
+#undef CONFIG_CMD_IMLS
+
+#define CONFIG_BOOTDELAY	3
+
+#define	CONFIG_EXTRA_ENV_SETTINGS					\
+	"bootargs_base=setenv bootargs console=ttymxc0,115200\0"	\
+	"bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs "	\
+		"ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0"	\
+	"bootcmd=run bootcmd_net\0"					\
+	"bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs; "	\
+		"tftpboot 0x81000000 uImage-mx31; bootm\0"
+
+#define CONFIG_DRIVER_SMC911X		1
+#define CONFIG_DRIVER_SMC911X_BASE	CS5_BASE
+#define CONFIG_DRIVER_SMC911X_32_BIT	1
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CONFIG_SYS_LONGHELP	/* undef to save memory */
+#define CONFIG_SYS_PROMPT	"uboot> "
+#define CONFIG_SYS_CBSIZE	256  /* Console I/O Buffer Size */
+/* Print Buffer Size */
+#define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE + \
+				sizeof(CONFIG_SYS_PROMPT)+16)
+/* max number of command args */
+#define CONFIG_SYS_MAXARGS	16
+/* Boot Argument Buffer Size */
+#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
+
+#define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM_1  /* memtest works on */
+#define CONFIG_SYS_MEMTEST_END		0x10000
+
+#define CONFIG_SYS_LOAD_ADDR		0x81000000 /* default load address */
+
+#define CONFIG_SYS_HZ			1000
+
+#define CONFIG_CMDLINE_EDITING	1
+
+/*-----------------------------------------------------------------------
+ * Stack sizes
+ *
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE	(128 * 1024) /* regular stack */
+
+/*-----------------------------------------------------------------------
+ * Physical Memory Map
+ */
+#define CONFIG_NR_DRAM_BANKS	1
+#define PHYS_SDRAM_1		CSD0_BASE
+#define PHYS_SDRAM_1_SIZE	(128 * 1024 * 1024)
+
+/*-----------------------------------------------------------------------
+ * FLASH and environment organization
+ */
+/* No NOR flash present */
+#define CONFIG_SYS_NO_FLASH	1
+
+#define CONFIG_ENV_IS_NOWHERE 	1
+
+#define CONFIG_ENV_SIZE		(128 * 1024)
+
+#endif /* __CONFIG_H */
+
-- 
1.5.6

[U-Boot] [PATCH v2 3/3] MX31: Add NAND SPL boot support to i.MX31 PDK board.

[Magnus Lilja]

Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
---
 MAKEALL                                     |    3 +-
 Makefile                                    |    9 ++-
 board/freescale/mx31pdk/config.mk           |    4 +
 board/freescale/mx31pdk/lowlevel_init.S     |   93 +++++++++++++++++++++++++++
 board/freescale/mx31pdk/u-boot-nand.lds     |   33 ++++++++++
 include/configs/mx31pdk.h                   |   19 +++++-
 nand_spl/board/freescale/mx31pdk/Makefile   |   54 +++++++++++++++
 nand_spl/board/freescale/mx31pdk/config.mk  |    5 ++
 nand_spl/board/freescale/mx31pdk/u-boot.lds |   36 ++++++++++
 9 files changed, 251 insertions(+), 5 deletions(-)
 create mode 100644 board/freescale/mx31pdk/u-boot-nand.lds
 create mode 100644 nand_spl/board/freescale/mx31pdk/Makefile
 create mode 100644 nand_spl/board/freescale/mx31pdk/config.mk
 create mode 100644 nand_spl/board/freescale/mx31pdk/u-boot.lds

diff --git a/MAKEALL b/MAKEALL
index aaa6dea..615acbb 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -548,7 +548,8 @@ LIST_ARM11="			\
 	imx31_phycore		\
 	imx31_phycore_eet	\
 	mx31ads			\
- 	mx31pdk			\
+	mx31pdk			\
+	mx31pdk_nand		\
 	qong			\
 	smdk6400		\
 "
diff --git a/Makefile b/Makefile
index 99ebcc5..c377313 100644
--- a/Makefile
+++ b/Makefile
@@ -369,7 +369,7 @@ $(LDSCRIPT):	depend
 $(NAND_SPL):	$(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk
 		$(MAKE) -C nand_spl/board/$(BOARDDIR) all
 
-$(U_BOOT_NAND):	$(NAND_SPL) $(obj)u-boot.bin
+$(U_BOOT_NAND):	$(NAND_SPL) $(obj)u-boot.bin $(obj)include/autoconf.mk
 		cat $(obj)nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin
 
 $(ONENAND_IPL):	$(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk
@@ -3087,6 +3087,13 @@ mx31ads_config		: unconfig
 mx31pdk_config		: unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm1136 mx31pdk freescale mx31
 
+mx31pdk_nand_config	: unconfig
+	@mkdir -p $(obj)include $(obj)board/freescale/mx31pdk
+	@mkdir -p $(obj)nand_spl/board/freescale/mx31pdk
+	@echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
+	@$(MKCONFIG) -n $@ -a mx31pdk arm arm1136 mx31pdk freescale mx31
+	@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
+
 omap2420h4_config	: unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 NULL omap24xx
 
diff --git a/board/freescale/mx31pdk/config.mk b/board/freescale/mx31pdk/config.mk
index d34dc02..dcaa09f 100644
--- a/board/freescale/mx31pdk/config.mk
+++ b/board/freescale/mx31pdk/config.mk
@@ -1 +1,5 @@
+ifdef CONFIG_NAND_SPL
+TEXT_BASE = 0x87ec0000
+else
 TEXT_BASE = 0x87f00000
+endif
diff --git a/board/freescale/mx31pdk/lowlevel_init.S b/board/freescale/mx31pdk/lowlevel_init.S
index ec5eedb..602eb53 100644
--- a/board/freescale/mx31pdk/lowlevel_init.S
+++ b/board/freescale/mx31pdk/lowlevel_init.S
@@ -26,5 +26,98 @@
 
 .globl lowlevel_init
 
+#ifdef CONFIG_NAND_SPL
+#include <asm/arch/mx31-regs.h>
+
+.macro REG reg, val
+	ldr	r2, =\reg
+	ldr	r3, =\val
+	str	r3, [r2]
+.endm
+
+.macro REG8 reg, val
+	ldr	r2, =\reg
+	ldr	r3, =\val
+	strb	r3, [r2]
+.endm
+
+.macro DELAY loops
+	ldr	r2, =\loops
+1:
+	subs	r2, r2, #1
+	nop
+	bcs	1b
+.endm
+
+.globl lowlevel_init
+lowlevel_init:
+	/* Also setup the Peripheral Port Remap register inside the core */
+	ldr	r0, =ARM_PPMRR      /* start from AIPS 2GB region */
+	mcr	p15, 0, r0, c15, c2, 4
+
+	REG	IPU_CONF, IPU_CONF_DI_EN
+	REG	CCM_CCMR, 0x074B0BF5
+
+	DELAY	0x40000
+
+	REG	CCM_CCMR, 0x074B0BF5 | CCMR_MPE
+	REG	CCM_CCMR, (0x074B0BF5 | CCMR_MPE) & ~CCMR_MDS
+
+	/* Set up clock to 532MHz */
+	REG	CCM_PDR0, 0xFF871D58
+	REG	CCM_MPCTL, 0x0033280C
+
+	REG	CCM_SPCTL, PLL_PD(1) | PLL_MFD(4) | PLL_MFI(12) | PLL_MFN(1)
+
+	/* Set up CPLD on CS5 */
+	REG	CSCR_U(5), 0x0000D843
+	REG	CSCR_L(5), 0x22252521
+	REG	CSCR_A(5), 0x22220A00
+
+	/* Set up MX31 DDR Memory Controller */
+	REG	0x43FAC26C, 0 /* SDCLK */
+	REG	0x43FAC270, 0 /* CAS */
+	REG	0x43FAC274, 0 /* RAS */
+	REG	0x43FAC27C, 0x1000 /* CS2       CSD0) */
+	REG	0x43FAC284, 0 /* DQM3 */
+	REG	0x43FAC288, 0 /* DQM2, DQM1, DQM0, SD31-SD0, A25-A0, MA10       0x288..0x2DC) */
+	REG	0x43FAC28C, 0
+	REG	0x43FAC290, 0
+	REG	0x43FAC294, 0
+	REG	0x43FAC298, 0
+	REG	0x43FAC29C, 0
+	REG	0x43FAC2A0, 0
+	REG	0x43FAC2A4, 0
+	REG	0x43FAC2A8, 0
+	REG	0x43FAC2AC, 0
+	REG	0x43FAC2B0, 0
+	REG	0x43FAC2B4, 0
+	REG	0x43FAC2B8, 0
+	REG	0x43FAC2BC, 0
+	REG	0x43FAC2C0, 0
+	REG	0x43FAC2C4, 0
+	REG	0x43FAC2C8, 0
+	REG	0x43FAC2CC, 0
+	REG	0x43FAC2D0, 0
+	REG	0x43FAC2D4, 0
+	REG	0x43FAC2D8, 0
+	REG	0x43FAC2DC, 0
+	REG	0xB8001010, 0x00000004
+	REG	0xB8001004, 0x006ac73a
+	REG	0xB8001000, 0x92100000
+	REG	0x80000f00, 0x12344321
+	REG	0xB8001000, 0xa2100000
+	REG	0x80000000, 0x12344321
+	REG	0x80000000, 0x12344321
+	REG	0xB8001000, 0xb2100000
+	REG8	0x80000033, 0xda
+	REG8	0x81000000, 0xff
+	REG	0xB8001000, 0x82226080
+	REG	0x80000000, 0xDEADBEEF
+	REG	0xB8001010, 0x0000000c
+
+	mov	pc, lr
+#else
 lowlevel_init:
 	mov	pc, lr
+#endif
diff --git a/board/freescale/mx31pdk/u-boot-nand.lds b/board/freescale/mx31pdk/u-boot-nand.lds
new file mode 100644
index 0000000..b604480
--- /dev/null
+++ b/board/freescale/mx31pdk/u-boot-nand.lds
@@ -0,0 +1,33 @@
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+	. = 0x00000000;
+
+	. = ALIGN(4);
+	.text	   :
+	{
+	  cpu/arm1136/start.o	(.text)
+	  *(.text)
+	}
+
+	. = ALIGN(4);
+	.rodata : { *(.rodata) }
+
+	. = ALIGN(4);
+	.data : { *(.data) }
+
+	. = ALIGN(4);
+	.got : { *(.got) }
+
+	. = .;
+	__u_boot_cmd_start = .;
+	.u_boot_cmd : { *(.u_boot_cmd) }
+	__u_boot_cmd_end = .;
+
+	. = ALIGN(4);
+	__bss_start = .;
+	.bss : { *(.bss) }
+	_end = .;
+}
diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h
index deda70d..5f293ba 100644
--- a/include/configs/mx31pdk.h
+++ b/include/configs/mx31pdk.h
@@ -45,10 +45,10 @@
 #define CONFIG_SETUP_MEMORY_TAGS	1
 #define CONFIG_INITRD_TAG		1
 
-/* No support for NAND boot for i.MX31 PDK yet, so we rely on some other
- * program to initialize the SDRAM.
- */
+#if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
 #define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SKIP_RELOCATE_UBOOT
+#endif
 
 /*
  * Size of malloc() pool
@@ -158,5 +158,18 @@
 
 #define CONFIG_ENV_SIZE		(128 * 1024)
 
+#define CFG_NAND_U_BOOT_OFFS	0x800
+#define CFG_NAND_U_BOOT_SIZE	0x30000
+#define CFG_NAND_U_BOOT_DST	0x87f00000 /* Load U-Boot to this address */
+#define CFG_NAND_U_BOOT_START	CFG_NAND_U_BOOT_DST
+#define CFG_NAND_SPL_DST	(CFG_NAND_U_BOOT_DST - 0x40000)
+
+#define CFG_NAND_PAGE_SIZE	0x800
+#define CFG_NAND_BLOCK_SIZE	(128 * 1024)
+#define CFG_NAND_PAGE_COUNT	64
+/* for NAND_SPL */
+#define CFG_NAND_CHIP_SIZE	(256 * 1024 * 1024)
+#define CFG_NAND_PAGES_PER_BLOCK CFG_NAND_PAGE_COUNT
+
 #endif /* __CONFIG_H */
 
diff --git a/nand_spl/board/freescale/mx31pdk/Makefile b/nand_spl/board/freescale/mx31pdk/Makefile
new file mode 100644
index 0000000..866b35e
--- /dev/null
+++ b/nand_spl/board/freescale/mx31pdk/Makefile
@@ -0,0 +1,54 @@
+CONFIG_NAND_SPL	= y
+
+include $(TOPDIR)/config.mk
+include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk
+
+LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
+LDFLAGS	= -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
+AFLAGS	+= -DCONFIG_NAND_SPL
+CFLAGS	+= -DCONFIG_NAND_SPL
+
+SOBJS	= start.o lowlevel_init.o
+COBJS	= nand_boot_mx31.o
+
+SRCS	:= $(SRCTREE)/nand_spl/nand_boot_mx31.c
+SRCS	+= $(SRCTREE)/cpu/arm1136/start.S
+SRCS	+= $(SRCTREE)/board/freescale/mx31pdk/lowlevel_init.S
+OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
+__OBJS	:= $(SOBJS) $(COBJS)
+LNDIR	:= $(OBJTREE)/nand_spl/board/$(BOARDDIR)
+
+nandobj	:= $(OBJTREE)/nand_spl/
+
+ALL	= $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
+
+all:	$(obj).depend $(ALL)
+
+$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
+	$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
+
+$(nandobj)u-boot-spl.bin:	$(nandobj)u-boot-spl
+	$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
+
+$(nandobj)u-boot-spl:	$(OBJS)
+	cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) \
+		-Map $(nandobj)u-boot-spl.map \
+		-o $(nandobj)u-boot-spl
+
+#########################################################################
+
+$(obj)%.o:	$(SRCTREE)/cpu/arm1136/%.S
+	$(CC) $(AFLAGS) -c -o $@ $<
+
+$(obj)%.o:	$(SRCTREE)/board/freescale/mx31pdk/%.S
+	$(CC) $(AFLAGS) -c -o $@ $<
+
+$(obj)%.o:	$(SRCTREE)/nand_spl/%.c
+	$(CC) $(CFLAGS) -c -o $@ $<
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/nand_spl/board/freescale/mx31pdk/config.mk b/nand_spl/board/freescale/mx31pdk/config.mk
new file mode 100644
index 0000000..119934b
--- /dev/null
+++ b/nand_spl/board/freescale/mx31pdk/config.mk
@@ -0,0 +1,5 @@
+PAD_TO	:= $(shell expr $$[$(TEXT_BASE) + 2048])
+
+ifeq ($(debug),1)
+PLATFORM_CPPFLAGS += -DDEBUG
+endif
diff --git a/nand_spl/board/freescale/mx31pdk/u-boot.lds b/nand_spl/board/freescale/mx31pdk/u-boot.lds
new file mode 100644
index 0000000..2780e11
--- /dev/null
+++ b/nand_spl/board/freescale/mx31pdk/u-boot.lds
@@ -0,0 +1,36 @@
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+	. = 0x00000000;
+
+	. = ALIGN(4);
+	.text	   :
+	{
+	  start.o	(.text)
+	  lowlevel_init.o	(.text)
+	  nand_boot_mx31.o	(.text)
+	  *(.text)
+	  . = 2K;
+	}
+
+	. = ALIGN(4);
+	.rodata : { *(.rodata) }
+
+	. = ALIGN(4);
+	.data : { *(.data) }
+
+	. = ALIGN(4);
+	.got : { *(.got) }
+
+	. = .;
+	__u_boot_cmd_start = .;
+	.u_boot_cmd : { *(.u_boot_cmd) }
+	__u_boot_cmd_end = .;
+
+	. = ALIGN(4);
+	__bss_start = .;
+	.bss : { *(.bss) }
+	_end = .;
+}
-- 
1.5.6

[U-Boot] [PATCH v2 1/3] MX31: Add NAND SPL for i.MX31.

[Jean-Christophe PLAGNIOL-VILLARD]

On 21:56 Sun 03 May     , Magnus Lilja wrote:
> This patch adds the NAND SPL framework needed to boot i.MX31 boards
> from NAND.
> 
> The patch is based on the work by Maxim Artamonov
> <scn1874@yandex.ru > (which was signed-off-by him).
so please add it too
and please fix the @
> 
> Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
> ---
>  cpu/arm1136/start.S                   |   29 +++--
>  include/asm-arm/arch-mx31/mx31-regs.h |   90 +++++++++++++
>  nand_spl/nand_boot_mx31.c             |  223 +++++++++++++++++++++++++++++++++
>  3 files changed, 331 insertions(+), 11 deletions(-)
>  create mode 100644 nand_spl/nand_boot_mx31.c
> 
> diff --git a/cpu/arm1136/start.S b/cpu/arm1136/start.S
> index e622338..9bbbaf1 100644
> --- a/cpu/arm1136/start.S
> +++ b/cpu/arm1136/start.S
> @@ -1,6 +1,9 @@
>  /*
>   *  armboot - Startup Code for OMP2420/ARM1136 CPU-core
>   *
> + *
> + *  Copyright (c) 2008 Maxim Artamonov, <scn1874@yandex.ru>
> + *
please remove
>   *  Copyright (c) 2004	Texas Instruments <r-woodruff2@ti.com>
>   *
>   *  Copyright (c) 2001	Marius Gr?ger <mag@sysgo.de>
> @@ -32,7 +35,7 @@
>  #include <version.h>
>  .globl _start
>  _start: b	reset
> -#ifdef CONFIG_ONENAND_IPL
> +#if defined(CONFIG_ONENAND_IPL) || defined(CONFIG_NAND_SPL)
create a better CONFIG_
because we could need for other boot mode
>  	ldr	pc, _hang
>  	ldr	pc, _hang
>  	ldr	pc, _hang
> @@ -156,9 +159,9 @@ relocate:				/* relocate U-Boot to RAM	    */
>  	adr	r0, _start		/* r0 <- current position of code   */
>  	ldr	r1, _TEXT_BASE		/* test if we run from flash or RAM */
>  	cmp	r0, r1			/* don't reloc during debug	    */
> -#ifndef CONFIG_ONENAND_IPL
> +#if !defined(CONFIG_ONENAND_IPL) && !defined(CONFIG_NAND_SPL)
>  	beq	stack_setup
> -#endif	/* CONFIG_ONENAND_IPL */
> +#endif	/* !CONFIG_ONENAND_IPL && !CONFIG_NAND_SPL*/
>  
>  #endif	/* CONFIG_ONENAND_IPL */
> +
<snip>
> diff --git a/nand_spl/nand_boot_mx31.c b/nand_spl/nand_boot_mx31.c
> new file mode 100644
> index 0000000..d698d2a
> --- /dev/null
> +++ b/nand_spl/nand_boot_mx31.c
> @@ -0,0 +1,223 @@
<snip>
> +static void mx31_nand_page_address(unsigned int page_address)
> +{
> +	unsigned int page_count;
> +
> +	writew(0x00, NFC_FLASH_ADDR);
> +	writew(NFC_ADDR, NFC_CONFIG2);
> +	mx31_wait_ready();
> +
> +	/* code only for 2kb flash */
> +	if (CFG_NAND_PAGE_SIZE == 0x800) {
> +		writew(0x00, NFC_FLASH_ADDR);
> +		writew(NFC_ADDR, NFC_CONFIG2);
> +		mx31_wait_ready();
> +	}
> +
> +	page_count = CFG_NAND_CHIP_SIZE / CFG_NAND_PAGE_SIZE;
please use CONFIG_SYS_ or CONFIG_
and why not detect it?
> +
> +	if (page_address <= page_count) {
> +		page_count--; /* transform 0x01000000 to 0x00ffffff */
> +		do {
> +			writew(page_address & 0xff, NFC_FLASH_ADDR);
> +			writew(NFC_ADDR, NFC_CONFIG2);
> +			mx31_wait_ready();
> +			page_address = page_address >> 8;
> +			page_count = page_count >> 8;
> +		} while (page_count);
> +	}
> +}
> +
<snip>
> +
> +static int nand_load(unsigned int from, unsigned int size, unsigned char *buf)
> +{
> +	int i, bb;
> +
> +	mx31_nand_init();
> +
> +	/* convert from to page number */
> +	from = from / CFG_NAND_PAGE_SIZE;
> +
> +	i = 0;
> +
> +	while (i < (size/CFG_NAND_PAGE_SIZE)) {
> +		if ((from * CFG_NAND_PAGE_SIZE) >= CFG_NAND_CHIP_SIZE)
> +			return 2; /* memory segment violation */
> +
> +		bb = mx31_read_page(from, buf);
> +
> +		if (bb < 0)
> +			return -1;
> +
> +		/* checking first page of each block */
> +		/* if this page has bb marker, then skip whole block */
> +		if ((!(from % CFG_NAND_PAGES_PER_BLOCK)) && bb) {
please use CONFIG_SYS_ or CONFIG_
and why not detect it?
> +			from = from + CFG_NAND_PAGES_PER_BLOCK;
> +		} else {
> +			i++;
> +			from++;
> +			buf = buf + CFG_NAND_PAGE_SIZE;
please use CONFIG_SYS_ or CONFIG_
and why not detect it?
> +		}
> +	}
> +
> +	return 0;
> +}
> +
> +/*
> + * The main entry for NAND booting. It's necessary that SDRAM is already
> + * configured and available since this code loads the main U-Boot image
> + * from NAND into SDRAM and starts it from there.
> + */
> +void nand_boot(void)
> +{
> +	__attribute__((noreturn)) void (*uboot)(void);
> +
> +	/* CFG_NAND_U_BOOT_OFFS and CFG_NAND_U_BOOT_SIZE must */
please use CONFIG_SYS_ or CONFIG_
and so on
> +	/* be aligned to full pages */
please use this style of multiple ligne comment
/*
 *
 */

Best Regards,
J.

[U-Boot] [PATCH v2 2/3] MX31: Add basic support for Freescale i.MX31 PDK board.

[Jean-Christophe PLAGNIOL-VILLARD]

> +++ b/board/freescale/mx31pdk/lowlevel_init.S
> @@ -0,0 +1,30 @@
> +/*
> + * (C) Copyright 2008 Magnus Lilja <lilja.magnus@gmail.com>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +/*
> + * This is just to keep the linker happy.
> + */
> +
> +.globl lowlevel_init
> +
> +lowlevel_init:
> +	mov	pc, lr
why do you need it?
> diff --git a/board/freescale/mx31pdk/mx31pdk.c b/board/freescale/mx31pdk/mx31pdk.c
> new file mode 100644
> index 0000000..9eed979
> --- /dev/null
> +++ b/board/freescale/mx31pdk/mx31pdk.c
> @@ -0,0 +1,76 @@
> +/*
> + *
> + * (C) Copyright 2008 Magnus Lilja <lilja.magnus@gmail.com>
> + *
> + * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +
> +#include <common.h>
> +#include <asm/arch/mx31.h>
> +#include <asm/arch/mx31-regs.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +int dram_init(void)
> +{
> +	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
> +	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
> +
> +	return 0;
> +}
> +
> +int board_init(void)
> +{
> +	/* CS5: CPLD incl. network controller */
> +	__REG(CSCR_U(5)) = 0x0000d843;
> +	__REG(CSCR_L(5)) = 0x22252521;
> +	__REG(CSCR_A(5)) = 0x22220a00;
> +
> +	/* setup pins for UART1 */
> +	mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX);
> +	mx31_gpio_mux(MUX_TXD1__UART1_TXD_MUX);
> +	mx31_gpio_mux(MUX_RTS1__UART1_RTS_B);
> +	mx31_gpio_mux(MUX_CTS1__UART1_CTS_B);
I think it's time to create common device init functions
as done for davinci or at91
> +
> +	/* SPI2 */
> +	mx31_gpio_mux(MUX_CSPI2_SS2__CSPI2_SS2_B);
> +	mx31_gpio_mux(MUX_CSPI2_SCLK__CSPI2_CLK);
> +	mx31_gpio_mux(MUX_CSPI2_SPI_RDY__CSPI2_DATAREADY_B);
> +	mx31_gpio_mux(MUX_CSPI2_MOSI__CSPI2_MOSI);
> +	mx31_gpio_mux(MUX_CSPI2_MISO__CSPI2_MISO);
> +	mx31_gpio_mux(MUX_CSPI2_SS0__CSPI2_SS0_B);
> +	mx31_gpio_mux(MUX_CSPI2_SS1__CSPI2_SS1_B);
ditto
> +
> +	/* start SPI2 clock */
> +	__REG(CCM_CGR2) = __REG(CCM_CGR2) | (3 << 4);
> +
> +	gd->bd->bi_arch_number = MACH_TYPE_MX31_3DS; /* board id for linux */
> +	gd->bd->bi_boot_params = 0x80000100; /* adress of boot parameters */
please use this style

RAM_BASE + 0x100
as other arm board
> +
> +	return 0;
> +}
> +
> diff --git a/board/freescale/mx31pdk/u-boot.lds b/board/freescale/mx31pdk/u-boot.lds
> new file mode 100644
> index 0000000..e96509a
> --- /dev/null
> +++ b/board/freescale/mx31pdk/u-boot.lds
I've send a patch that unify all arm lds so this one is not anymore needed
> @@ -0,0 +1,59 @@
> +/*
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#ifndef __CONFIG_H
> +#define __CONFIG_H
> +
> +#include <asm/arch/mx31-regs.h>
why?
> +
> +/* High Level Configuration Options */
> +#define CONFIG_ARM1136		1    /* This is an arm1136 CPU core */
					 ^^^^
whitespate please remove
> +#define CONFIG_MX31		1    /* in a mx31 */
				 ^^^^
whitespate please remove
> +#define CONFIG_MX31_HCLK_FREQ	26000000
> +#define CONFIG_MX31_CLK32	32768
> +
> +#define CONFIG_DISPLAY_CPUINFO
> +#define CONFIG_DISPLAY_BOARDINFO
> +
> +#define CONFIG_CMDLINE_TAG		1    /* enable passing of ATAGs */
					 ^^^^
whitespate please remove
> +#define CONFIG_SETUP_MEMORY_TAGS	1
> +#define CONFIG_INITRD_TAG		1
> +
> +/* No support for NAND boot for i.MX31 PDK yet, so we rely on some other
> + * program to initialize the SDRAM.
> + */
> +#define CONFIG_SKIP_LOWLEVEL_INIT
> +
> +/*
> + * Size of malloc() pool
> + */
> +#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 128 * 1024)
> +/* Bytes reserved for initial data */
> +#define CONFIG_SYS_GBL_DATA_SIZE	128
> +
> +/*
> + * Hardware drivers
> + */
> +
> +#define CONFIG_MX31_UART	1
> +#define CONFIG_SYS_MX31_UART1	1
> +
> +#define CONFIG_HARD_SPI		1
> +#define CONFIG_MXC_SPI		1
> +#define CONFIG_DEFAULT_SPI_BUS	1
> +#define CONFIG_DEFAULT_SPI_MODE	(SPI_MODE_2 | SPI_CS_HIGH)
> +
> +#define CONFIG_RTC_MC13783	1
> +
> +/* MC13783 connected to CSPI2 and SS2 */
> +#define CONFIG_MC13783_SPI_BUS	1
> +#define CONFIG_MC13783_SPI_CS	2
> +
> +/* allow to overwrite serial and ethaddr */
> +#define CONFIG_ENV_OVERWRITE
> +#define CONFIG_CONS_INDEX		1
> +#define CONFIG_BAUDRATE			115200
> +#define CONFIG_SYS_BAUDRATE_TABLE	{9600, 19200, 38400, 57600, 115200}
> +
> +/***********************************************************
> + * Command definition
> + ***********************************************************/
> +
> +#include <config_cmd_default.h>
> +
> +#define CONFIG_CMD_MII
> +#define CONFIG_CMD_PING
> +#define CONFIG_CMD_SPI
> +#define CONFIG_CMD_DATE
> +
> +/* Disabled due to compilation errors in cmd_bootm.c (IMLS seems to require
> + * that CFG_NO_FLASH is undefined).
> + */
please remove the comment
> +#undef CONFIG_CMD_IMLS
> +
> +#define CONFIG_BOOTDELAY	3
> +
> +#define	CONFIG_EXTRA_ENV_SETTINGS					\
> +	"bootargs_base=setenv bootargs console=ttymxc0,115200\0"	\
> +	"bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs "	\
> +		"ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0"	\
> +	"bootcmd=run bootcmd_net\0"					\
> +	"bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs; "	\
> +		"tftpboot 0x81000000 uImage-mx31; bootm\0"
> +
> +#define CONFIG_DRIVER_SMC911X		1
> +#define CONFIG_DRIVER_SMC911X_BASE	CS5_BASE
> +#define CONFIG_DRIVER_SMC911X_32_BIT	1
> +
> +/*
> + * Miscellaneous configurable options
> + */
> +#define CONFIG_SYS_LONGHELP	/* undef to save memory */
> +#define CONFIG_SYS_PROMPT	"uboot> "
> +#define CONFIG_SYS_CBSIZE	256  /* Console I/O Buffer Size */
				   ^^
whitespate please remove
> +/* Print Buffer Size */
> +#define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE + \
> +				sizeof(CONFIG_SYS_PROMPT)+16)
> +/* max number of command args */
> +#define CONFIG_SYS_MAXARGS	16
> +/* Boot Argument Buffer Size */
> +#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
> +
> +#define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM_1  /* memtest works on */
						    ^^
whitespate please remove
> +#define CONFIG_SYS_MEMTEST_END		0x10000
> +
> +#define CONFIG_SYS_LOAD_ADDR		0x81000000 /* default load address */
> +
> +#define CONFIG_SYS_HZ			1000
> +
> +#define CONFIG_CMDLINE_EDITING	1
> +
> +/*-----------------------------------------------------------------------
> + * Stack sizes
> + *
> + * The stack sizes are set up in start.S using the settings below
> + */
> +#define CONFIG_STACKSIZE	(128 * 1024) /* regular stack */
> +
> +/*-----------------------------------------------------------------------
> + * Physical Memory Map
> + */
> +#define CONFIG_NR_DRAM_BANKS	1
> +#define PHYS_SDRAM_1		CSD0_BASE
> +#define PHYS_SDRAM_1_SIZE	(128 * 1024 * 1024)
> +
> +/*-----------------------------------------------------------------------
> + * FLASH and environment organization
> + */
> +/* No NOR flash present */
> +#define CONFIG_SYS_NO_FLASH	1
> +
> +#define CONFIG_ENV_IS_NOWHERE 	1
				^
whitespate please remove

Best Regards,
J.

[U-Boot] [PATCH v2 3/3] MX31: Add NAND SPL boot support to i.MX31 PDK board.

[Jean-Christophe PLAGNIOL-VILLARD]

On 21:56 Sun 03 May     , Magnus Lilja wrote:
> Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
> ---
>  MAKEALL                                     |    3 +-
>  Makefile                                    |    9 ++-
>  board/freescale/mx31pdk/config.mk           |    4 +
>  board/freescale/mx31pdk/lowlevel_init.S     |   93 +++++++++++++++++++++++++++
>  board/freescale/mx31pdk/u-boot-nand.lds     |   33 ++++++++++
>  include/configs/mx31pdk.h                   |   19 +++++-
>  nand_spl/board/freescale/mx31pdk/Makefile   |   54 +++++++++++++++
>  nand_spl/board/freescale/mx31pdk/config.mk  |    5 ++
>  nand_spl/board/freescale/mx31pdk/u-boot.lds |   36 ++++++++++
>  9 files changed, 251 insertions(+), 5 deletions(-)
>  create mode 100644 board/freescale/mx31pdk/u-boot-nand.lds
>  create mode 100644 nand_spl/board/freescale/mx31pdk/Makefile
>  create mode 100644 nand_spl/board/freescale/mx31pdk/config.mk
>  create mode 100644 nand_spl/board/freescale/mx31pdk/u-boot.lds
> 
> diff --git a/MAKEALL b/MAKEALL
> index aaa6dea..615acbb 100755
> --- a/MAKEALL
> +++ b/MAKEALL
> @@ -548,7 +548,8 @@ LIST_ARM11="			\
>  	imx31_phycore		\
>  	imx31_phycore_eet	\
>  	mx31ads			\
> - 	mx31pdk			\
> +	mx31pdk			\
> +	mx31pdk_nand		\
>  	qong			\
>  	smdk6400		\
>  "
> diff --git a/Makefile b/Makefile
> index 99ebcc5..c377313 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -369,7 +369,7 @@ $(LDSCRIPT):	depend
>  $(NAND_SPL):	$(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk
>  		$(MAKE) -C nand_spl/board/$(BOARDDIR) all
>  
> -$(U_BOOT_NAND):	$(NAND_SPL) $(obj)u-boot.bin
> +$(U_BOOT_NAND):	$(NAND_SPL) $(obj)u-boot.bin $(obj)include/autoconf.mk
why?
>  		cat $(obj)nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin
>  
>  $(ONENAND_IPL):	$(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk
> @@ -3087,6 +3087,13 @@ mx31ads_config		: unconfig
>  mx31pdk_config		: unconfig
>  	@$(MKCONFIG) $(@:_config=) arm arm1136 mx31pdk freescale mx31
>  
> +mx31pdk_nand_config	: unconfig
> +	@mkdir -p $(obj)include $(obj)board/freescale/mx31pdk
> +	@mkdir -p $(obj)nand_spl/board/freescale/mx31pdk
> +	@echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
> +	@$(MKCONFIG) -n $@ -a mx31pdk arm arm1136 mx31pdk freescale mx31
> +	@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
IIRC no need it will generate from the config.h
> +
>  omap2420h4_config	: unconfig
>  	@$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 NULL omap24xx
>  
> diff --git a/board/freescale/mx31pdk/config.mk b/board/freescale/mx31pdk/config.mk
> index d34dc02..dcaa09f 100644
> --- a/board/freescale/mx31pdk/config.mk
> +++ b/board/freescale/mx31pdk/config.mk
> @@ -1 +1,5 @@
> +ifdef CONFIG_NAND_SPL
> +TEXT_BASE = 0x87ec0000
> +else
>  TEXT_BASE = 0x87f00000
> +endif
> diff --git a/board/freescale/mx31pdk/lowlevel_init.S b/board/freescale/mx31pdk/lowlevel_init.S
> index ec5eedb..602eb53 100644
> --- a/board/freescale/mx31pdk/lowlevel_init.S
> +++ b/board/freescale/mx31pdk/lowlevel_init.S
> @@ -26,5 +26,98 @@
>  
>  .globl lowlevel_init
>  
> +#ifdef CONFIG_NAND_SPL
> +#include <asm/arch/mx31-regs.h>
> +
> +.macro REG reg, val
> +	ldr	r2, =\reg
> +	ldr	r3, =\val
> +	str	r3, [r2]
> +.endm
> +
> +.macro REG8 reg, val
> +	ldr	r2, =\reg
> +	ldr	r3, =\val
> +	strb	r3, [r2]
> +.endm
> +
> +.macro DELAY loops
> +	ldr	r2, =\loops
> +1:
> +	subs	r2, r2, #1
> +	nop
> +	bcs	1b
> +.endm
NACK
as already reply to the kirwood patch we must have common macro
please use the attached file as based work
> +
> +.globl lowlevel_init
> +lowlevel_init:
> +	/* Also setup the Peripheral Port Remap register inside the core */
> +	ldr	r0, =ARM_PPMRR      /* start from AIPS 2GB region */
> +	mcr	p15, 0, r0, c15, c2, 4
> +
for all hard code value please use macro
and if possible macro to generate them
> +	REG	IPU_CONF, IPU_CONF_DI_EN
> +	REG	CCM_CCMR, 0x074B0BF5
> +
> +	REG	0xB8001010, 0x0000000c
> +
<snip>
> +	mov	pc, lr
> +#else
>  lowlevel_init:
>  	mov	pc, lr
why?
> +#endif
> diff --git a/board/freescale/mx31pdk/u-boot-nand.lds b/board/freescale/mx31pdk/u-boot-nand.lds
> new file mode 100644
> index 0000000..b604480
> --- /dev/null
> +++ b/board/freescale/mx31pdk/u-boot-nand.lds
no need anymore
>  
>  /*
>   * Size of malloc() pool
> @@ -158,5 +158,18 @@
>  
>  #define CONFIG_ENV_SIZE		(128 * 1024)
>  
> +#define CFG_NAND_U_BOOT_OFFS	0x800
please use CONFIG_ or CONFIG_SYS_
> +#define CFG_NAND_U_BOOT_SIZE	0x30000
<snip>
> +
> +SRCS	:= $(SRCTREE)/nand_spl/nand_boot_mx31.c
> +SRCS	+= $(SRCTREE)/cpu/arm1136/start.S
> +SRCS	+= $(SRCTREE)/board/freescale/mx31pdk/lowlevel_init.S
> +OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
> +__OBJS	:= $(SOBJS) $(COBJS)
> +LNDIR	:= $(OBJTREE)/nand_spl/board/$(BOARDDIR)
> +
> +nandobj	:= $(OBJTREE)/nand_spl/
> +
> +ALL	= $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
> +
> +all:	$(obj).depend $(ALL)
> +
> +$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
> +	$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
> +
> +$(nandobj)u-boot-spl.bin:	$(nandobj)u-boot-spl
> +	$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
> +
> +$(nandobj)u-boot-spl:	$(OBJS)
> +	cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) \
> +		-Map $(nandobj)u-boot-spl.map \
> +		-o $(nandobj)u-boot-spl
please use $@ and $<
> +
> +#########################################################################
> +
> +$(obj)%.o:	$(SRCTREE)/cpu/arm1136/%.S
> +	$(CC) $(AFLAGS) -c -o $@ $<
> +
> new file mode 100644
> index 0000000..2780e11
> --- /dev/null
> +++ b/nand_spl/board/freescale/mx31pdk/u-boot.lds
> @@ -0,0 +1,36 @@
> +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
> +OUTPUT_ARCH(arm)
> +ENTRY(_start)
> +SECTIONS
> +{
> +	. = 0x00000000;
> +
> +	. = ALIGN(4);
> +	.text	   :
		^^^
whitespace please fix
and so on

Best Regards,
J.

[U-Boot] [PATCH v2 1/3] MX31: Add NAND SPL for i.MX31.

[Magnus Lilja]

2009/5/9 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>:
> On 21:56 Sun 03 May ? ? , Magnus Lilja wrote:
>> @@ -32,7 +35,7 @@
>> ?#include <version.h>
>> ?.globl _start
>> ?_start: b ? ?reset
>> -#ifdef CONFIG_ONENAND_IPL
>> +#if defined(CONFIG_ONENAND_IPL) || defined(CONFIG_NAND_SPL)
> create a better CONFIG_
> because we could need for other boot mode

A better CONFIG_ than what? CONFIG_NAND_SPL is already used elsewhere
in U-boot when booting from NAND.

>> ? ? ? ldr ? ? pc, _hang
>> ? ? ? ldr ? ? pc, _hang
>> ? ? ? ldr ? ? pc, _hang
>> @@ -156,9 +159,9 @@ relocate: ? ? ? ? ? ? ? ? ? ? ? ? /* relocate U-Boot to RAM ? ? ? ? ? */
>> ? ? ? adr ? ? r0, _start ? ? ? ? ? ? ?/* r0 <- current position of code ? */
>> ? ? ? ldr ? ? r1, _TEXT_BASE ? ? ? ? ?/* test if we run from flash or RAM */
>> ? ? ? cmp ? ? r0, r1 ? ? ? ? ? ? ? ? ?/* don't reloc during debug ? ? ? ? */
>> -#ifndef CONFIG_ONENAND_IPL
>> +#if !defined(CONFIG_ONENAND_IPL) && !defined(CONFIG_NAND_SPL)
>> ? ? ? beq ? ? stack_setup
>> -#endif ? ? ? /* CONFIG_ONENAND_IPL */
>> +#endif ? ? ? /* !CONFIG_ONENAND_IPL && !CONFIG_NAND_SPL*/
>>
>> ?#endif ? ? ? /* CONFIG_ONENAND_IPL */
>> +
> <snip>
>> diff --git a/nand_spl/nand_boot_mx31.c b/nand_spl/nand_boot_mx31.c
>> new file mode 100644
>> index 0000000..d698d2a
>> --- /dev/null
>> +++ b/nand_spl/nand_boot_mx31.c
>> @@ -0,0 +1,223 @@
> <snip>
>> +static void mx31_nand_page_address(unsigned int page_address)
>> +{
>> + ? ? unsigned int page_count;
>> +
>> + ? ? writew(0x00, NFC_FLASH_ADDR);
>> + ? ? writew(NFC_ADDR, NFC_CONFIG2);
>> + ? ? mx31_wait_ready();
>> +
>> + ? ? /* code only for 2kb flash */
>> + ? ? if (CFG_NAND_PAGE_SIZE == 0x800) {
>> + ? ? ? ? ? ? writew(0x00, NFC_FLASH_ADDR);
>> + ? ? ? ? ? ? writew(NFC_ADDR, NFC_CONFIG2);
>> + ? ? ? ? ? ? mx31_wait_ready();
>> + ? ? }
>> +
>> + ? ? page_count = CFG_NAND_CHIP_SIZE / CFG_NAND_PAGE_SIZE;
> please use CONFIG_SYS_ or CONFIG_

Will do.

> and why not detect it?

Might be possible, I'll look into it to see if it's doable.


Thanks; Magnus

[U-Boot] [PATCH v2 2/3] MX31: Add basic support for Freescale i.MX31 PDK board.

[Magnus Lilja]

2009/5/9 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>:
>> +++ b/board/freescale/mx31pdk/lowlevel_init.S
>> @@ -0,0 +1,30 @@
>> +/*
>> + * (C) Copyright 2008 Magnus Lilja <lilja.magnus@gmail.com>
>> + *
>> + * See file CREDITS for list of people who contributed to this
>> + * project.
>> + *
>> + * This program is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License as
>> + * published by the Free Software Foundation; either version 2 of
>> + * the License, or (at your option) any later version.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. ?See the
>> + * GNU General Public License for more details.
>> + *
>> + * You should have received a copy of the GNU General Public License
>> + * along with this program; if not, write to the Free Software
>> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
>> + * MA 02111-1307 USA
>> + */
>> +
>> +/*
>> + * This is just to keep the linker happy.
>> + */
>> +
>> +.globl lowlevel_init
>> +
>> +lowlevel_init:
>> + ? ? mov ? ? pc, lr
> why do you need it?

start.S:cpu_init_crit needs it and I haven't defined SKIP_LOWLEVEL.
Might be possible to define SKIP_LOWLEVEL_INIT and get rid of the
above line.

>> diff --git a/board/freescale/mx31pdk/mx31pdk.c b/board/freescale/mx31pdk/mx31pdk.c
>> new file mode 100644
>> index 0000000..9eed979
>> --- /dev/null
>> +++ b/board/freescale/mx31pdk/mx31pdk.c
>> @@ -0,0 +1,76 @@
>> +/*
>> + *
>> + * (C) Copyright 2008 Magnus Lilja <lilja.magnus@gmail.com>
>> + *
>> + * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
>> + *
>> + * See file CREDITS for list of people who contributed to this
>> + * project.
>> + *
>> + * This program is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License as
>> + * published by the Free Software Foundation; either version 2 of
>> + * the License, or (at your option) any later version.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. ?See the
>> + * GNU General Public License for more details.
>> + *
>> + * You should have received a copy of the GNU General Public License
>> + * along with this program; if not, write to the Free Software
>> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
>> + * MA 02111-1307 USA
>> + */
>> +
>> +
>> +#include <common.h>
>> +#include <asm/arch/mx31.h>
>> +#include <asm/arch/mx31-regs.h>
>> +
>> +DECLARE_GLOBAL_DATA_PTR;
>> +
>> +int dram_init(void)
>> +{
>> + ? ? gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
>> + ? ? gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
>> +
>> + ? ? return 0;
>> +}
>> +
>> +int board_init(void)
>> +{
>> + ? ? /* CS5: CPLD incl. network controller */
>> + ? ? __REG(CSCR_U(5)) = 0x0000d843;
>> + ? ? __REG(CSCR_L(5)) = 0x22252521;
>> + ? ? __REG(CSCR_A(5)) = 0x22220a00;
>> +
>> + ? ? /* setup pins for UART1 */
>> + ? ? mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX);
>> + ? ? mx31_gpio_mux(MUX_TXD1__UART1_TXD_MUX);
>> + ? ? mx31_gpio_mux(MUX_RTS1__UART1_RTS_B);
>> + ? ? mx31_gpio_mux(MUX_CTS1__UART1_CTS_B);
> I think it's time to create common device init functions
> as done for davinci or at91

I think I prefer the at91 way of doing this, I can create
cpu/arm1136/mx31/serial.c and spi.c.

>> +
>> + ? ? /* SPI2 */
>> + ? ? mx31_gpio_mux(MUX_CSPI2_SS2__CSPI2_SS2_B);
>> + ? ? mx31_gpio_mux(MUX_CSPI2_SCLK__CSPI2_CLK);
>> + ? ? mx31_gpio_mux(MUX_CSPI2_SPI_RDY__CSPI2_DATAREADY_B);
>> + ? ? mx31_gpio_mux(MUX_CSPI2_MOSI__CSPI2_MOSI);
>> + ? ? mx31_gpio_mux(MUX_CSPI2_MISO__CSPI2_MISO);
>> + ? ? mx31_gpio_mux(MUX_CSPI2_SS0__CSPI2_SS0_B);
>> + ? ? mx31_gpio_mux(MUX_CSPI2_SS1__CSPI2_SS1_B);
> ditto
>> +
>> + ? ? /* start SPI2 clock */
>> + ? ? __REG(CCM_CGR2) = __REG(CCM_CGR2) | (3 << 4);
>> +
>> + ? ? gd->bd->bi_arch_number = MACH_TYPE_MX31_3DS; /* board id for linux */
>> + ? ? gd->bd->bi_boot_params = 0x80000100; /* adress of boot parameters */
> please use this style
>
> RAM_BASE + 0x100
> as other arm board
>> +
>> + ? ? return 0;
>> +}
>> +
>> diff --git a/board/freescale/mx31pdk/u-boot.lds b/board/freescale/mx31pdk/u-boot.lds
>> new file mode 100644
>> index 0000000..e96509a
>> --- /dev/null
>> +++ b/board/freescale/mx31pdk/u-boot.lds
> I've send a patch that unify all arm lds so this one is not anymore needed

I'll try it. Are you planning other major changes that will affect
these patches in the near future?

>> @@ -0,0 +1,59 @@
>> +/*
>> + * You should have received a copy of the GNU General Public License
>> + * along with this program; if not, write to the Free Software
>> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
>> + * MA 02111-1307 USA
>> + */
>> +
>> +#ifndef __CONFIG_H
>> +#define __CONFIG_H
>> +
>> +#include <asm/arch/mx31-regs.h>
> why?

So we can use symbolic names for Ethernet base address, SDRAM base
address. I.e. instead of writing e.g. 0xB6000000 we can write
CS5_BASE. I can switch to hard coded numerical values and get rid of
the #include if requested.

>> +/***********************************************************
>> + * Command definition
>> + ***********************************************************/
>> +
>> +#include <config_cmd_default.h>
>> +
>> +#define CONFIG_CMD_MII
>> +#define CONFIG_CMD_PING
>> +#define CONFIG_CMD_SPI
>> +#define CONFIG_CMD_DATE
>> +
>> +/* Disabled due to compilation errors in cmd_bootm.c (IMLS seems to require
>> + * that CFG_NO_FLASH is undefined).
>> + */
> please remove the comment

The comment was added since Wolfgang asked why IMLS was disabled when
I posted a similar set of patches last year, so I'm going to keep the
comment.

>> +#undef CONFIG_CMD_IMLS

Thanks, Magnus

[U-Boot] [PATCH v2 3/3] MX31: Add NAND SPL boot support to i.MX31 PDK board.

[Magnus Lilja]

2009/5/9 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>:
> On 21:56 Sun 03 May ? ? , Magnus Lilja wrote:
>> Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
>> ---
>> ?MAKEALL ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? | ? ?3 +-
>> ?Makefile ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?| ? ?9 ++-
>> ?board/freescale/mx31pdk/config.mk ? ? ? ? ? | ? ?4 +
>> ?board/freescale/mx31pdk/lowlevel_init.S ? ? | ? 93 +++++++++++++++++++++++++++
>> ?board/freescale/mx31pdk/u-boot-nand.lds ? ? | ? 33 ++++++++++
>> ?include/configs/mx31pdk.h ? ? ? ? ? ? ? ? ? | ? 19 +++++-
>> ?nand_spl/board/freescale/mx31pdk/Makefile ? | ? 54 +++++++++++++++
>> ?nand_spl/board/freescale/mx31pdk/config.mk ?| ? ?5 ++
>> ?nand_spl/board/freescale/mx31pdk/u-boot.lds | ? 36 ++++++++++
>> ?9 files changed, 251 insertions(+), 5 deletions(-)
>> ?create mode 100644 board/freescale/mx31pdk/u-boot-nand.lds
>> ?create mode 100644 nand_spl/board/freescale/mx31pdk/Makefile
>> ?create mode 100644 nand_spl/board/freescale/mx31pdk/config.mk
>> ?create mode 100644 nand_spl/board/freescale/mx31pdk/u-boot.lds
>>
>> diff --git a/MAKEALL b/MAKEALL
>> index aaa6dea..615acbb 100755
>> --- a/MAKEALL
>> +++ b/MAKEALL
>> @@ -548,7 +548,8 @@ LIST_ARM11=" ? ? ? ? ? ? ? ? ? ? ?\
>> ? ? ? imx31_phycore ? ? ? ? ? \
>> ? ? ? imx31_phycore_eet ? ? ? \
>> ? ? ? mx31ads ? ? ? ? ? ? ? ? \
>> - ? ? mx31pdk ? ? ? ? ? ? ? ? \
>> + ? ? mx31pdk ? ? ? ? ? ? ? ? \
>> + ? ? mx31pdk_nand ? ? ? ? ? ?\
>> ? ? ? qong ? ? ? ? ? ? ? ? ? ?\
>> ? ? ? smdk6400 ? ? ? ? ? ? ? ?\
>> ?"
>> diff --git a/Makefile b/Makefile
>> index 99ebcc5..c377313 100644
>> --- a/Makefile
>> +++ b/Makefile
>> @@ -369,7 +369,7 @@ $(LDSCRIPT): ? ? ?depend
>> ?$(NAND_SPL): $(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk
>> ? ? ? ? ? ? ? $(MAKE) -C nand_spl/board/$(BOARDDIR) all
>>
>> -$(U_BOOT_NAND): ? ? ?$(NAND_SPL) $(obj)u-boot.bin
>> +$(U_BOOT_NAND): ? ? ?$(NAND_SPL) $(obj)u-boot.bin $(obj)include/autoconf.mk
> why?

Maxim added this, I haven't investigated if the dependency is needed or not.

>> ? ? ? ? ? ? ? cat $(obj)nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin
>>
>> ?$(ONENAND_IPL): ? ? ?$(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk
>> @@ -3087,6 +3087,13 @@ mx31ads_config ? ? ? ? : unconfig
>> ?mx31pdk_config ? ? ? ? ? ? ? : unconfig
>> ? ? ? @$(MKCONFIG) $(@:_config=) arm arm1136 mx31pdk freescale mx31
>>
>> +mx31pdk_nand_config ?: unconfig
>> + ? ? @mkdir -p $(obj)include $(obj)board/freescale/mx31pdk
>> + ? ? @mkdir -p $(obj)nand_spl/board/freescale/mx31pdk
>> + ? ? @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
>> + ? ? @$(MKCONFIG) -n $@ -a mx31pdk arm arm1136 mx31pdk freescale mx31
>> + ? ? @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
> IIRC no need it will generate from the config.h

I don't understand the comment. What will generate what from config.h?

>> +
>> ?omap2420h4_config ? ?: unconfig
>> ? ? ? @$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 NULL omap24xx
>>
>> diff --git a/board/freescale/mx31pdk/config.mk b/board/freescale/mx31pdk/config.mk
>> index d34dc02..dcaa09f 100644
>> --- a/board/freescale/mx31pdk/config.mk
>> +++ b/board/freescale/mx31pdk/config.mk
>> @@ -1 +1,5 @@
>> +ifdef CONFIG_NAND_SPL
>> +TEXT_BASE = 0x87ec0000
>> +else
>> ?TEXT_BASE = 0x87f00000
>> +endif
>> diff --git a/board/freescale/mx31pdk/lowlevel_init.S b/board/freescale/mx31pdk/lowlevel_init.S
>> index ec5eedb..602eb53 100644
>> --- a/board/freescale/mx31pdk/lowlevel_init.S
>> +++ b/board/freescale/mx31pdk/lowlevel_init.S
>> @@ -26,5 +26,98 @@
>>
>> ?.globl lowlevel_init
>>
>> +#ifdef CONFIG_NAND_SPL
>> +#include <asm/arch/mx31-regs.h>
>> +
>> +.macro REG reg, val
>> + ? ? ldr ? ? r2, =\reg
>> + ? ? ldr ? ? r3, =\val
>> + ? ? str ? ? r3, [r2]
>> +.endm
>> +
>> +.macro REG8 reg, val
>> + ? ? ldr ? ? r2, =\reg
>> + ? ? ldr ? ? r3, =\val
>> + ? ? strb ? ?r3, [r2]
>> +.endm
>> +
>> +.macro DELAY loops
>> + ? ? ldr ? ? r2, =\loops
>> +1:
>> + ? ? subs ? ?r2, r2, #1
>> + ? ? nop
>> + ? ? bcs ? ? 1b
>> +.endm
> NACK
> as already reply to the kirwood patch we must have common macro
> please use the attached file as based work

I don't see any file attached to you e-mail, so which attached file?
Can you point to the relevant kirkwood patch? Is the patch in some
git-tree?

>> +
>> +.globl lowlevel_init
>> +lowlevel_init:
>> + ? ? /* Also setup the Peripheral Port Remap register inside the core */
>> + ? ? ldr ? ? r0, =ARM_PPMRR ? ? ?/* start from AIPS 2GB region */
>> + ? ? mcr ? ? p15, 0, r0, c15, c2, 4
>> +
> for all hard code value please use macro
> and if possible macro to generate them

Hmm. You want me to create a macro that expands to the above code?

>> + ? ? REG ? ? IPU_CONF, IPU_CONF_DI_EN
>> + ? ? REG ? ? CCM_CCMR, 0x074B0BF5
>> +
>> + ? ? REG ? ? 0xB8001010, 0x0000000c
>> +
> <snip>
>> + ? ? mov ? ? pc, lr
>> +#else
>> ?lowlevel_init:
>> ? ? ? mov ? ? pc, lr
> why?

See my answer in patch 2.

>> +#endif
>> diff --git a/board/freescale/mx31pdk/u-boot-nand.lds b/board/freescale/mx31pdk/u-boot-nand.lds
>> new file mode 100644
>> index 0000000..b604480
>> --- /dev/null
>> +++ b/board/freescale/mx31pdk/u-boot-nand.lds
> no need anymore

I'll try with your lds cleanup patch.

Thanks, Magnus

[U-Boot] [PATCH v2 2/3] MX31: Add basic support for Freescale i.MX31 PDK board.

[Jean-Christophe PLAGNIOL-VILLARD]

> >> +
> >> +/*
> >> + * This is just to keep the linker happy.
> >> + */
> >> +
> >> +.globl lowlevel_init
> >> +
> >> +lowlevel_init:
> >> + ? ? mov ? ? pc, lr
> > why do you need it?
> 
> start.S:cpu_init_crit needs it and I haven't defined SKIP_LOWLEVEL.
> Might be possible to define SKIP_LOWLEVEL_INIT and get rid of the
> above line.
if you do not need to do any lowlevel_init
yes please
> 
> >> diff --git a/board/freescale/mx31pdk/mx31pdk.c b/board/freescale/mx31pdk/mx31pdk.c
> >> new file mode 100644
> >> index 0000000..9eed979
> >> --- /dev/null
> >> +++ b/board/freescale/mx31pdk/mx31pdk.c
> >> @@ -0,0 +1,76 @@
> >> +/*
> >> + *

> >> +
> >> +int board_init(void)
> >> +{
> >> + ? ? /* CS5: CPLD incl. network controller */
> >> + ? ? __REG(CSCR_U(5)) = 0x0000d843;
> >> + ? ? __REG(CSCR_L(5)) = 0x22252521;
> >> + ? ? __REG(CSCR_A(5)) = 0x22220a00;
> >> +
> >> + ? ? /* setup pins for UART1 */
> >> + ? ? mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX);
> >> + ? ? mx31_gpio_mux(MUX_TXD1__UART1_TXD_MUX);
> >> + ? ? mx31_gpio_mux(MUX_RTS1__UART1_RTS_B);
> >> + ? ? mx31_gpio_mux(MUX_CTS1__UART1_CTS_B);
> > I think it's time to create common device init functions
> > as done for davinci or at91
> 
> I think I prefer the at91 way of doing this, I can create
> cpu/arm1136/mx31/serial.c and spi.c.
as I
tks
please note I'll regroup all devices init fuctions
in one file per cpu
maybe you can create a devices.c
> 
> >> +
> >> + ? ? /* SPI2 */
> >> + ? ? mx31_gpio_mux(MUX_CSPI2_SS2__CSPI2_SS2_B);
> >> + ? ? mx31_gpio_mux(MUX_CSPI2_SCLK__CSPI2_CLK);
> >> + ? ? mx31_gpio_mux(MUX_CSPI2_SPI_RDY__CSPI2_DATAREADY_B);
> >> + ? ? mx31_gpio_mux(MUX_CSPI2_MOSI__CSPI2_MOSI);
> >> + ? ? mx31_gpio_mux(MUX_CSPI2_MISO__CSPI2_MISO);
> >> + ? ? mx31_gpio_mux(MUX_CSPI2_SS0__CSPI2_SS0_B);
> >> + ? ? mx31_gpio_mux(MUX_CSPI2_SS1__CSPI2_SS1_B);
> >> diff --git a/board/freescale/mx31pdk/u-boot.lds b/board/freescale/mx31pdk/u-boot.lds
> >> new file mode 100644
> >> index 0000000..e96509a
> >> --- /dev/null
> >> +++ b/board/freescale/mx31pdk/u-boot.lds
> > I've send a patch that unify all arm lds so this one is not anymore needed
> 
> I'll try it. Are you planning other major changes that will affect
> these patches in the near future?
no
> 
> >> @@ -0,0 +1,59 @@
> >> +/*
> >> + * You should have received a copy of the GNU General Public License
> >> + * along with this program; if not, write to the Free Software
> >> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> >> + * MA 02111-1307 USA
> >> + */
> >> +
> >> +#ifndef __CONFIG_H
> >> +#define __CONFIG_H
> >> +
> >> +#include <asm/arch/mx31-regs.h>
> > why?
> 
> So we can use symbolic names for Ethernet base address, SDRAM base
> address. I.e. instead of writing e.g. 0xB6000000 we can write
> CS5_BASE. I can switch to hard coded numerical values and get rid of
> the #include if requested.
if you include it in the final c files
you do not need to include mx31-regs.h always
> 
> >> +/***********************************************************
> >> + * Command definition
> >> + ***********************************************************/
> >> +
> >> +#include <config_cmd_default.h>
> >> +
> >> +#define CONFIG_CMD_MII
> >> +#define CONFIG_CMD_PING
> >> +#define CONFIG_CMD_SPI
> >> +#define CONFIG_CMD_DATE
> >> +
> >> +/* Disabled due to compilation errors in cmd_bootm.c (IMLS seems to require
> >> + * that CFG_NO_FLASH is undefined).
> >> + */
> > please remove the comment
> 
> The comment was added since Wolfgang asked why IMLS was disabled when
> I posted a similar set of patches last year, so I'm going to keep the
> comment.
ok

Best Regards,
J.

[U-Boot] [PATCH v2 1/3] MX31: Add NAND SPL for i.MX31.

[Jean-Christophe PLAGNIOL-VILLARD]

On 21:31 Sun 10 May     , Magnus Lilja wrote:
> 2009/5/9 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>:
> > On 21:56 Sun 03 May ? ? , Magnus Lilja wrote:
> >> @@ -32,7 +35,7 @@
> >> ?#include <version.h>
> >> ?.globl _start
> >> ?_start: b ? ?reset
> >> -#ifdef CONFIG_ONENAND_IPL
> >> +#if defined(CONFIG_ONENAND_IPL) || defined(CONFIG_NAND_SPL)
> > create a better CONFIG_
> > because we could need for other boot mode
> 
> A better CONFIG_ than what? CONFIG_NAND_SPL is already used elsewhere
> in U-boot when booting from NAND.
IIRC in this case the purpose is to reduce the size of the start.S to allow more
code in the ipl & spl
> 
> >> ? ? ? ldr ? ? pc, _hang
> >> ? ? ? ldr ? ? pc, _hang
> >> ? ? ? ldr ? ? pc, _hang
> >> @@ -156,9 +159,9 @@ relocate: ? ? ? ? ? ? ? ? ? ? ? ? /* relocate U-Boot to RAM ? ? ? ? ? */
> >> ? ? ? adr ? ? r0, _start ? ? ? ? ? ? ?/* r0 <- current position of code ? */
> >> ? ? ? ldr ? ? r1, _TEXT_BASE ? ? ? ? ?/* test if we run from flash or RAM */
> >> ? ? ? cmp ? ? r0, r1 ? ? ? ? ? ? ? ? ?/* don't reloc during debug ? ? ? ? */
> >> -#ifndef CONFIG_ONENAND_IPL
> >> +#if !defined(CONFIG_ONENAND_IPL) && !defined(CONFIG_NAND_SPL)
> >> ? ? ? beq ? ? stack_setup
> >> -#endif ? ? ? /* CONFIG_ONENAND_IPL */
> >> +#endif ? ? ? /* !CONFIG_ONENAND_IPL && !CONFIG_NAND_SPL*/
> >>
> >> ?#endif ? ? ? /* CONFIG_ONENAND_IPL */
> >> +
> >> + ? ? }
> >> +
> >> + ? ? page_count = CFG_NAND_CHIP_SIZE / CFG_NAND_PAGE_SIZE;
> > please use CONFIG_SYS_ or CONFIG_
> 
> Will do.
> 
> > and why not detect it?
> 
> Might be possible, I'll look into it to see if it's doable.
tks

Best Regards,
J.

[U-Boot] [PATCH v2 3/3] MX31: Add NAND SPL boot support to i.MX31 PDK board.

[Jean-Christophe PLAGNIOL-VILLARD]

> >>
> >> +mx31pdk_nand_config ?: unconfig
> >> + ? ? @mkdir -p $(obj)include $(obj)board/freescale/mx31pdk
> >> + ? ? @mkdir -p $(obj)nand_spl/board/freescale/mx31pdk
> >> + ? ? @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
> >> + ? ? @$(MKCONFIG) -n $@ -a mx31pdk arm arm1136 mx31pdk freescale mx31
> >> + ? ? @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
> > IIRC no need it will generate from the config.h
> 
> I don't understand the comment. What will generate what from config.h?
the automake.mk
> 
> >> +
> >> ?omap2420h4_config ? ?: unconfig
> >> ? ? ? @$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 NULL omap24xx
> >>
> >> diff --git a/board/freescale/mx31pdk/config.mk b/board/freescale/mx31pdk/config.mk
> >> index d34dc02..dcaa09f 100644
> >> --- a/board/freescale/mx31pdk/config.mk
> >> +++ b/board/freescale/mx31pdk/config.mk
> >> @@ -1 +1,5 @@
> >> +ifdef CONFIG_NAND_SPL
> >> +TEXT_BASE = 0x87ec0000
> >> +else
> >> ?TEXT_BASE = 0x87f00000
> >> +endif
> >> +
> >> +.macro DELAY loops
> >> + ? ? ldr ? ? r2, =\loops
> >> +1:
> >> + ? ? subs ? ?r2, r2, #1
> >> + ? ? nop
> >> + ? ? bcs ? ? 1b
> >> +.endm
> > NACK
> > as already reply to the kirwood patch we must have common macro
> > please use the attached file as based work
> 
> I don't see any file attached to you e-mail, so which attached file?
> Can you point to the relevant kirkwood patch? Is the patch in some
> git-tree?
no not yet
so I've forget to re-attached it
> 
> >> +
> >> +.globl lowlevel_init
> >> +lowlevel_init:
> >> + ? ? /* Also setup the Peripheral Port Remap register inside the core */
> >> + ? ? ldr ? ? r0, =ARM_PPMRR ? ? ?/* start from AIPS 2GB region */
> >> + ? ? mcr ? ? p15, 0, r0, c15, c2, 4
> >> +
> > for all hard code value please use macro
> > and if possible macro to generate them
> 
> Hmm. You want me to create a macro that expands to the above code?
no I mean macro for 0xB8001010, 0x0000000c, etc...
and if possible macro to generate these value
> 
> >> + ? ? REG ? ? IPU_CONF, IPU_CONF_DI_EN
> >> + ? ? REG ? ? CCM_CCMR, 0x074B0BF5
> >> +
> >> + ? ? REG ? ? 0xB8001010, 0x0000000c
> >> +
Best Regards,
J.
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[U-Boot] [PATCH v2 3/3] MX31: Add NAND SPL boot support to i.MX31 PDK board.

[Wolfgang Denk]

Dear Jean-Christophe PLAGNIOL-VILLARD,

In message <20090510203941.GH21079@game.jcrosoft.org> you wrote:
> 
> > >> +mx31pdk_nand_config ?: unconfig
> > >> +   @mkdir -p $(obj)include $(obj)board/freescale/mx31pdk
> > >> +   @mkdir -p $(obj)nand_spl/board/freescale/mx31pdk
> > >> +   @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
> > >> +   @$(MKCONFIG) -n $@ -a mx31pdk arm arm1136 mx31pdk freescale mx31
> > >> +   @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
> > > IIRC no need it will generate from the config.h
> > 
> > I don't understand the comment. What will generate what from config.h?
> the automake.mk

automake.mk ? What's that?


Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Q:  How do you play religious roulette?
A:  You stand around in a circle  and  blaspheme  and  see  who  gets
    struck by lightning first.

[U-Boot] [PATCH v2 3/3] MX31: Add NAND SPL boot support to i.MX31 PDK board.

[Jean-Christophe PLAGNIOL-VILLARD]

On 23:33 Sun 10 May     , Wolfgang Denk wrote:
> Dear Jean-Christophe PLAGNIOL-VILLARD,
> 
> In message <20090510203941.GH21079@game.jcrosoft.org> you wrote:
> > 
> > > >> +mx31pdk_nand_config ?: unconfig
> > > >> +   @mkdir -p $(obj)include $(obj)board/freescale/mx31pdk
> > > >> +   @mkdir -p $(obj)nand_spl/board/freescale/mx31pdk
> > > >> +   @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
> > > >> +   @$(MKCONFIG) -n $@ -a mx31pdk arm arm1136 mx31pdk freescale mx31
> > > >> +   @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
> > > > IIRC no need it will generate from the config.h
> > > 
> > > I don't understand the comment. What will generate what from config.h?
> > the automake.mk
> 
> automake.mk ? What's that?
autoconf.mk I mean

Best Regards,
J.

[U-Boot] [PATCH v2 2/3] MX31: Add basic support for Freescale i.MX31 PDK board.

[Magnus Lilja]

2009/5/10 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>:
>> >> @@ -0,0 +1,59 @@
>> >> +/*
>> >> + * You should have received a copy of the GNU General Public License
>> >> + * along with this program; if not, write to the Free Software
>> >> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
>> >> + * MA 02111-1307 USA
>> >> + */
>> >> +
>> >> +#ifndef __CONFIG_H
>> >> +#define __CONFIG_H
>> >> +
>> >> +#include <asm/arch/mx31-regs.h>
>> > why?
>>
>> So we can use symbolic names for Ethernet base address, SDRAM base
>> address. I.e. instead of writing e.g. 0xB6000000 we can write
>> CS5_BASE. I can switch to hard coded numerical values and get rid of
>> the #include if requested.
> if you include it in the final c files
> you do not need to include mx31-regs.h always

That works for SoC files, but not for the Ethernet-driver. I don't
think the idea is to add #include mx31-regs.h to drivers/net/sms911x.c
so I think I have to write the 0xB6.... there.


Regards, Magnus

[U-Boot] [PATCH v2 3/3] MX31: Add NAND SPL boot support to i.MX31 PDK board.

[Wolfgang Denk]

Dear Jean-Christophe PLAGNIOL-VILLARD,

In message <20090510221846.GJ21079@game.jcrosoft.org> you wrote:
>
> > > > >> +mx31pdk_nand_config ?: unconfig
> > > > >> +   @mkdir -p $(obj)include $(obj)board/freescale/mx31pdk
> > > > >> +   @mkdir -p $(obj)nand_spl/board/freescale/mx31pdk
> > > > >> +   @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
> > > > >> +   @$(MKCONFIG) -n $@ -a mx31pdk arm arm1136 mx31pdk freescale mx31
> > > > >> +   @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
> > > > > IIRC no need it will generate from the config.h
> > > > 
> > > > I don't understand the comment. What will generate what from config.h?
> > > the automake.mk
> > 
> > automake.mk ? What's that?
> autoconf.mk I mean

I still don't understand what your terse comment is supposed to mean.
Could ypou please try to answer in a complete sentence, and explain
your thoughts in a little detail? 

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
This restaurant was advertising breakfast  any  time.  So  I  ordered
french toast in the renaissance.            - Steven Wright, comedian

[U-Boot] [PATCH v2 3/3] MX31: Add NAND SPL boot support to i.MX31 PDK board.

[Magnus Lilja]

2009/5/10 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>:
>> >> +.macro DELAY loops
>> >> + ? ? ldr ? ? r2, =\loops
>> >> +1:
>> >> + ? ? subs ? ?r2, r2, #1
>> >> + ? ? nop
>> >> + ? ? bcs ? ? 1b
>> >> +.endm
>> > NACK
>> > as already reply to the kirwood patch we must have common macro
>> > please use the attached file as based work
>>
>> I don't see any file attached to you e-mail, so which attached file?
>> Can you point to the relevant kirkwood patch? Is the patch in some
>> git-tree?
> no not yet
> so I've forget to re-attached it

Ok.

>>
>> >> +
>> >> +.globl lowlevel_init
>> >> +lowlevel_init:
>> >> + ? ? /* Also setup the Peripheral Port Remap register inside the core */
>> >> + ? ? ldr ? ? r0, =ARM_PPMRR ? ? ?/* start from AIPS 2GB region */
>> >> + ? ? mcr ? ? p15, 0, r0, c15, c2, 4
>> >> +
>> > for all hard code value please use macro
>> > and if possible macro to generate them
>>
>> Hmm. You want me to create a macro that expands to the above code?
> no I mean macro for 0xB8001010, 0x0000000c, etc...
> and if possible macro to generate these value

I'm no .macro expert so I can't promise anything.

Regards, Magnus

[U-Boot] [PATCH v2 1/3] MX31: Add NAND SPL for i.MX31.

[Magnus Lilja]

2009/5/10 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>:
> On 21:31 Sun 10 May ? ? , Magnus Lilja wrote:
>> 2009/5/9 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>:
>> > On 21:56 Sun 03 May ? ? , Magnus Lilja wrote:
>> >> @@ -32,7 +35,7 @@
>> >> ?#include <version.h>
>> >> ?.globl _start
>> >> ?_start: b ? ?reset
>> >> -#ifdef CONFIG_ONENAND_IPL
>> >> +#if defined(CONFIG_ONENAND_IPL) || defined(CONFIG_NAND_SPL)
>> > create a better CONFIG_
>> > because we could need for other boot mode
>>
>> A better CONFIG_ than what? CONFIG_NAND_SPL is already used elsewhere
>> in U-boot when booting from NAND.
> IIRC in this case the purpose is to reduce the size of the start.S to allow more
> code in the ipl & spl

The main purpose of CONFIG_ONENAND_IPL and NAND_SPL in start.S is to
change the behaviour a bit, not so much to save some space.

Regards, Magnus

[U-Boot] [PATCH v2 1/3] MX31: Add NAND SPL for i.MX31.

[Magnus Lilja]

2009/5/10 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>:
>> >> +
>> >> + ? ? }
>> >> +
>> >> + ? ? page_count = CFG_NAND_CHIP_SIZE / CFG_NAND_PAGE_SIZE;
>> > please use CONFIG_SYS_ or CONFIG_
>>
>> Will do.
>>
>> > and why not detect it?
>>
>> Might be possible, I'll look into it to see if it's doable.
> tks

It's not really doable. In order for this to be worthwhile the
nand_flash_ids array from drivers/mtd/nand/nand_ids.c would have to
fit into the available space (2048 byte in total) and it didn't even
though I removed the text-strings.
So it's going to be controlled from the board config file.with CONFIG_something.

Regards, Magnus

[U-Boot] [PATCH v2 1/3] MX31: Add NAND SPL for i.MX31.

[Jean-Christophe PLAGNIOL-VILLARD]

On 21:03 Mon 11 May     , Magnus Lilja wrote:
> 2009/5/10 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>:
> >> >> +
> >> >> + ? ? }
> >> >> +
> >> >> + ? ? page_count = CFG_NAND_CHIP_SIZE / CFG_NAND_PAGE_SIZE;
> >> > please use CONFIG_SYS_ or CONFIG_
> >>
> >> Will do.
> >>
> >> > and why not detect it?
> >>
> >> Might be possible, I'll look into it to see if it's doable.
> > tks
> 
> It's not really doable. In order for this to be worthwhile the
> nand_flash_ids array from drivers/mtd/nand/nand_ids.c would have to
> fit into the available space (2048 byte in total) and it didn't even
> though I removed the text-strings.
as you mention here there is only 2K
so the start.S was reduced to allow more code
so CONFIG_xxx_IPL/SPL do not describe this
so please chance it to a better one

Best Regards,
J.

[U-Boot] [PATCH v2 3/3] MX31: Add NAND SPL boot support to i.MX31 PDK board.

[Jean-Christophe PLAGNIOL-VILLARD]

> 
> >>
> >> >> +
> >> >> +.globl lowlevel_init
> >> >> +lowlevel_init:
> >> >> + ? ? /* Also setup the Peripheral Port Remap register inside the core */
> >> >> + ? ? ldr ? ? r0, =ARM_PPMRR ? ? ?/* start from AIPS 2GB region */
> >> >> + ? ? mcr ? ? p15, 0, r0, c15, c2, 4
> >> >> +
> >> > for all hard code value please use macro
> >> > and if possible macro to generate them
> >>
> >> Hmm. You want me to create a macro that expands to the above code?
> > no I mean macro for 0xB8001010, 0x0000000c, etc...
> > and if possible macro to generate these value
> 
> I'm no .macro expert so I can't promise anything.
there nothing to do with .macro
it's somthing like this

#define TOTO1
#define TOTO2
#define TOTO3

	and use TOTOx to generate 0x0000000c

please take a look in drivers/net/smc911x.h
as example

Best Regards,
J.

[U-Boot] [PATCH v2 3/3] MX31: Add NAND SPL boot support to i.MX31 PDK board.

[Jean-Christophe PLAGNIOL-VILLARD]

On 08:52 Mon 11 May     , Wolfgang Denk wrote:
> Dear Jean-Christophe PLAGNIOL-VILLARD,
> 
> In message <20090510221846.GJ21079@game.jcrosoft.org> you wrote:
> >
> > > > > >> +mx31pdk_nand_config ?: unconfig
> > > > > >> +   @mkdir -p $(obj)include $(obj)board/freescale/mx31pdk
> > > > > >> +   @mkdir -p $(obj)nand_spl/board/freescale/mx31pdk
> > > > > >> +   @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
> > > > > >> +   @$(MKCONFIG) -n $@ -a mx31pdk arm arm1136 mx31pdk freescale mx31
> > > > > >> +   @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
> > > > > > IIRC no need it will generate from the config.h
> > > > > 
> > > > > I don't understand the comment. What will generate what from config.h?
> > > > the automake.mk
> > > 
> > > automake.mk ? What's that?
> > autoconf.mk I mean
> 
> I still don't understand what your terse comment is supposed to mean.
> Could ypou please try to answer in a complete sentence, and explain
> your thoughts in a little detail? 
simple
CONFIG_NAND_U_BOOT = y
will already be generated from config.h in autoconf.mk

Best Regards,
J.

[U-Boot] [PATCH v2 1/3] MX31: Add NAND SPL for i.MX31.

[Magnus Lilja]

2009/5/12 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>:
> On 21:03 Mon 11 May ? ? , Magnus Lilja wrote:
>> 2009/5/10 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>:
>> >> >> +
>> >> >> + ? ? }
>> >> >> +
>> >> >> + ? ? page_count = CFG_NAND_CHIP_SIZE / CFG_NAND_PAGE_SIZE;
>> >> > please use CONFIG_SYS_ or CONFIG_
>> >>
>> >> Will do.
>> >>
>> >> > and why not detect it?
>> >>
>> >> Might be possible, I'll look into it to see if it's doable.
>> > tks
>>
>> It's not really doable. In order for this to be worthwhile the
>> nand_flash_ids array from drivers/mtd/nand/nand_ids.c would have to
>> fit into the available space (2048 byte in total) and it didn't even
>> though I removed the text-strings.
> as you mention here there is only 2K
> so the start.S was reduced to allow more code
> so CONFIG_xxx_IPL/SPL do not describe this
> so please chance it to a better one

As I said in another email:
"The main purpose of CONFIG_ONENAND_IPL and NAND_SPL in start.S is to
change the behaviour a bit, not so much to save some space."
Given that those CONFIG_s are used in other places as well to indicate
the type of boot I don't think it's good to create a new CONFIG_ that
one has to specify in addition to one of the above.

Regards, Magnus
>
> Best Regards,
> J.
>

[U-Boot] [PATCH v2 1/3] MX31: Add NAND SPL for i.MX31.

[Scott Wood]

On Tue, May 12, 2009 at 06:03:29AM +0200, Magnus Lilja wrote:
> As I said in another email:
> "The main purpose of CONFIG_ONENAND_IPL and NAND_SPL in start.S is to
> change the behaviour a bit, not so much to save some space."
> Given that those CONFIG_s are used in other places as well to indicate
> the type of boot I don't think it's good to create a new CONFIG_ that
> one has to specify in addition to one of the above.

Better to define one more in order to test only one...  and use the new
one for things that are generally applicable to pre-loaders regardless of
type.

-Scott

[U-Boot] [PATCH v2 3/3] MX31: Add NAND SPL boot support to i.MX31 PDK board.

[Magnus Lilja]

>> >> diff --git a/board/freescale/mx31pdk/config.mk b/board/freescale/mx31pdk/config.mk
>> >> index d34dc02..dcaa09f 100644
>> >> --- a/board/freescale/mx31pdk/config.mk
>> >> +++ b/board/freescale/mx31pdk/config.mk
>> >> @@ -1 +1,5 @@
>> >> +ifdef CONFIG_NAND_SPL
>> >> +TEXT_BASE = 0x87ec0000
>> >> +else
>> >> ?TEXT_BASE = 0x87f00000
>> >> +endif
>> >> +
>> >> +.macro DELAY loops
>> >> + ? ? ldr ? ? r2, =\loops
>> >> +1:
>> >> + ? ? subs ? ?r2, r2, #1
>> >> + ? ? nop
>> >> + ? ? bcs ? ? 1b
>> >> +.endm
>> > NACK
>> > as already reply to the kirwood patch we must have common macro
>> > please use the attached file as based work
>>
>> I don't see any file attached to you e-mail, so which attached file?
>> Can you point to the relevant kirkwood patch? Is the patch in some
>> git-tree?
> no not yet
> so I've forget to re-attached it

There's a minor problem in the timer macro, fixed by replacing "sub"
with "subs".

Are you OK with me posting the file as a separate patch with your
From+signed-off as part of my patch series or will you add the file to
arm-next yourself?

Regards, Magnus

[U-Boot] [PATCH v2 3/3] MX31: Add NAND SPL boot support to i.MX31 PDK board.

[Jean-Christophe PLAGNIOL-VILLARD]

On 22:49 Tue 12 May     , Magnus Lilja wrote:
> >> >> diff --git a/board/freescale/mx31pdk/config.mk b/board/freescale/mx31pdk/config.mk
> >> >> index d34dc02..dcaa09f 100644
> >> >> --- a/board/freescale/mx31pdk/config.mk
> >> >> +++ b/board/freescale/mx31pdk/config.mk
> >> >> @@ -1 +1,5 @@
> >> >> +ifdef CONFIG_NAND_SPL
> >> >> +TEXT_BASE = 0x87ec0000
> >> >> +else
> >> >> ?TEXT_BASE = 0x87f00000
> >> >> +endif
> >> >> +
> >> >> +.macro DELAY loops
> >> >> + ? ? ldr ? ? r2, =\loops
> >> >> +1:
> >> >> + ? ? subs ? ?r2, r2, #1
> >> >> + ? ? nop
> >> >> + ? ? bcs ? ? 1b
> >> >> +.endm
> >> > NACK
> >> > as already reply to the kirwood patch we must have common macro
> >> > please use the attached file as based work
> >>
> >> I don't see any file attached to you e-mail, so which attached file?
> >> Can you point to the relevant kirkwood patch? Is the patch in some
> >> git-tree?
> > no not yet
> > so I've forget to re-attached it
> 
> There's a minor problem in the timer macro, fixed by replacing "sub"
> with "subs".
> 
> Are you OK with me posting the file as a separate patch with your
> From+signed-off as part of my patch series or will you add the file to
> arm-next yourself?
ok please do tks

Best Regards,
J.

[U-Boot] [PATCH v2 1/3] MX31: Add NAND SPL for i.MX31.

[Scott Wood]

On Sun, May 03, 2009 at 09:56:57PM +0200, Magnus Lilja wrote:
> This patch adds the NAND SPL framework needed to boot i.MX31 boards
> from NAND.

Sorry for the delay...

> diff --git a/include/asm-arm/arch-mx31/mx31-regs.h b/include/asm-arm/arch-mx31/mx31-regs.h
> index a8a05c8..3d811d7 100644
> --- a/include/asm-arm/arch-mx31/mx31-regs.h
> +++ b/include/asm-arm/arch-mx31/mx31-regs.h
> @@ -194,4 +194,94 @@
>  #define CS5_BASE	0xB6000000
>  #define PCMCIA_MEM_BASE	0xC0000000
>  
> +/*
> + * NAND controller
> + */
> +#define NFC_BASE_ADDR	0xB8000000
> +
> +/*
> + * Addresses for NFC registers
> + */
> +#define NFC_BUF_SIZE		(NFC_BASE_ADDR + 0xE00)
> +#define NFC_BUF_ADDR		(NFC_BASE_ADDR + 0xE04)
> +#define NFC_FLASH_ADDR		(NFC_BASE_ADDR + 0xE06)
> +#define NFC_FLASH_CMD		(NFC_BASE_ADDR + 0xE08)

The NFC register info should go in its own header, as it exists on more
than just MX31 (e.g. mpc5xxx).  Should probably use register structs
rather than #defines.

> +/*
> + * Addresses for NFC RAM BUFFER Main area 0
> + */
> +#define MAIN_AREA0	(NFC_BASE_ADDR + 0x000)
> +#define MAIN_AREA1	(NFC_BASE_ADDR + 0x200)
> +#define MAIN_AREA2	(NFC_BASE_ADDR + 0x400)
> +#define MAIN_AREA3	(NFC_BASE_ADDR + 0x600)
> +
> +/*
> + * Addresses for NFC SPARE BUFFER Spare area 0
> + */
> +#define SPARE_AREA0	(NFC_BASE_ADDR + 0x800)
> +#define SPARE_AREA1	(NFC_BASE_ADDR + 0x810)
> +#define SPARE_AREA2	(NFC_BASE_ADDR + 0x820)
> +#define SPARE_AREA3	(NFC_BASE_ADDR + 0x830)

NFC_MAIN_AREA0, etc.

> diff --git a/nand_spl/nand_boot_mx31.c b/nand_spl/nand_boot_mx31.c
> new file mode 100644
> index 0000000..d698d2a
> --- /dev/null
> +++ b/nand_spl/nand_boot_mx31.c

What in this file is MX31-specific?  Even if you don't have other chips
to test on, please try to provide a framework for generic NFC support so
the next chip only needs to tweak the details.  That may be as simple as
s/mx31/nfc/.

> +static void mx31_wait_ready(void)
> +{
> +	while (1) {
> +		if (readw(NFC_CONFIG2) & NFC_INT) {
> +			uint32_t tmp;
> +			/* Reset interrupt flag */
> +			tmp = readw(NFC_CONFIG2);
> +			tmp &= ~NFC_INT;
> +			writew(tmp, NFC_CONFIG2);
> +			break;
> +		}
> +	}
> +}

while (!(readw(NFC_CONFIG2) & NFC_INT))
	;

tmp = readw(NFC_CONFIG2);
...

> +static void mx31_nand_page_address(unsigned int page_address)
> +{
> +	unsigned int page_count;
> +
> +	writew(0x00, NFC_FLASH_ADDR);
> +	writew(NFC_ADDR, NFC_CONFIG2);
> +	mx31_wait_ready();
> +
> +	/* code only for 2kb flash */
> +	if (CFG_NAND_PAGE_SIZE == 0x800) {
> +		writew(0x00, NFC_FLASH_ADDR);
> +		writew(NFC_ADDR, NFC_CONFIG2);
> +		mx31_wait_ready();
> +	}
> +
> +	page_count = CFG_NAND_CHIP_SIZE / CFG_NAND_PAGE_SIZE;
> +
> +	if (page_address <= page_count) {
> +		page_count--; /* transform 0x01000000 to 0x00ffffff */
> +		do {
> +			writew(page_address & 0xff, NFC_FLASH_ADDR);
> +			writew(NFC_ADDR, NFC_CONFIG2);
> +			mx31_wait_ready();
> +			page_address = page_address >> 8;
> +			page_count = page_count >> 8;
> +		} while (page_count);
> +	}

Does the number of address bytes really need to depend on the size of the
flash chip, or can you base it on the number of non-zero bytes in
page_address (the chip will know when the address phase is over because
ALE drops)?

> +static int mx31_nand_check_ecc(void)
> +{
> +	unsigned short ecc_status_register;
> +
> +	ecc_status_register = readw(NFC_ECC_STATUS_RESULT);
> +
> +	if (ecc_status_register != 0)
> +		return 1; /* error */
> +	return 0;
> +}

How about just "return readw(NFC_ECC_STATUS_RESULT);"?

> +static int mx31_read_page(unsigned int page_address, unsigned char *buf)
> +{
> +	int i;
> +	volatile u32 *p1;
> +	volatile u32 *p2;
> +	u32 a;

s/p1/src/
s/p2/dest/

s/a/something (just a little) more descriptive/ -- my first guess was
"address", but that doesn't seem right...

No volatile; use I/O accessors.

> +	writew(0, NFC_BUF_ADDR); /* read in first 0 buffer */
> +	mx31_nand_command(NAND_CMD_READ0);
> +	mx31_nand_page_address(page_address);
> +
> +	if (CFG_NAND_CHIP_SIZE >= 0x08000000)
> +		mx31_nand_command(NAND_CMD_READSTART);

Is it guaranteed that all NAND chips above that size will be large page
and all chips below that size will be small page?

> +	/* it is hardware specific code for 8-bit 512B NAND-flash spare area */
> +	p1++;
> +	a = *p1;
> +	a = (a & 0x0000ff00) >> 8;
> +
> +	if (a != 0xff) /* bad block marker verify */
> +		return 1; /* potential bad block */
> +
> +	return 0;

The bad block location is typically different (offset 0 rather than 5)
with large page flash.

> +		/* checking first page of each block */

I believe some NAND chips may mark a block bad in its second page...

-Scott

[U-Boot] [PATCH v2 1/3] MX31: Add NAND SPL for i.MX31.

[Magnus Lilja]

2009/5/29 Scott Wood <scottwood@freescale.com>:
> On Sun, May 03, 2009 at 09:56:57PM +0200, Magnus Lilja wrote:
>> This patch adds the NAND SPL framework needed to boot i.MX31 boards
>> from NAND.
>
> Sorry for the delay...

Well, better now than the next time I post these patches.

>> diff --git a/include/asm-arm/arch-mx31/mx31-regs.h b/include/asm-arm/arch-mx31/mx31-regs.h
>> index a8a05c8..3d811d7 100644
>> --- a/include/asm-arm/arch-mx31/mx31-regs.h
>> +++ b/include/asm-arm/arch-mx31/mx31-regs.h
>> @@ -194,4 +194,94 @@
>> ?#define CS5_BASE ? ? 0xB6000000
>> ?#define PCMCIA_MEM_BASE ? ? ?0xC0000000
>>
>> +/*
>> + * NAND controller
>> + */
>> +#define NFC_BASE_ADDR ? ? ? ?0xB8000000
>> +
>> +/*
>> + * Addresses for NFC registers
>> + */
>> +#define NFC_BUF_SIZE ? ? ? ? (NFC_BASE_ADDR + 0xE00)
>> +#define NFC_BUF_ADDR ? ? ? ? (NFC_BASE_ADDR + 0xE04)
>> +#define NFC_FLASH_ADDR ? ? ? ? ? ? ? (NFC_BASE_ADDR + 0xE06)
>> +#define NFC_FLASH_CMD ? ? ? ? ? ? ? ?(NFC_BASE_ADDR + 0xE08)
>
> The NFC register info should go in its own header, as it exists on more
> than just MX31 (e.g. mpc5xxx). ?Should probably use register structs
> rather than #defines.

Yes, will do that. I'm converting the #define's to struct {} and all
accesses will be in the readl/writel(&nfc->flash_cmd) format.

>> diff --git a/nand_spl/nand_boot_mx31.c b/nand_spl/nand_boot_mx31.c
>> new file mode 100644
>> index 0000000..d698d2a
>> --- /dev/null
>> +++ b/nand_spl/nand_boot_mx31.c
>
> What in this file is MX31-specific? ?Even if you don't have other chips
> to test on, please try to provide a framework for generic NFC support so
> the next chip only needs to tweak the details. ?That may be as simple as
> s/mx31/nfc/.

I'll look into that.

>> +static void mx31_wait_ready(void)
>> +{
>> + ? ? while (1) {
>> + ? ? ? ? ? ? if (readw(NFC_CONFIG2) & NFC_INT) {
>> + ? ? ? ? ? ? ? ? ? ? uint32_t tmp;
>> + ? ? ? ? ? ? ? ? ? ? /* Reset interrupt flag */
>> + ? ? ? ? ? ? ? ? ? ? tmp = readw(NFC_CONFIG2);
>> + ? ? ? ? ? ? ? ? ? ? tmp &= ~NFC_INT;
>> + ? ? ? ? ? ? ? ? ? ? writew(tmp, NFC_CONFIG2);
>> + ? ? ? ? ? ? ? ? ? ? break;
>> + ? ? ? ? ? ? }
>> + ? ? }
>> +}
>
> while (!(readw(NFC_CONFIG2) & NFC_INT))
> ? ? ? ?;
>
> tmp = readw(NFC_CONFIG2);
> ...
>

Ok.

>> +static void mx31_nand_page_address(unsigned int page_address)
>> +{
>> + ? ? unsigned int page_count;
>> +
>> + ? ? writew(0x00, NFC_FLASH_ADDR);
>> + ? ? writew(NFC_ADDR, NFC_CONFIG2);
>> + ? ? mx31_wait_ready();
>> +
>> + ? ? /* code only for 2kb flash */
>> + ? ? if (CFG_NAND_PAGE_SIZE == 0x800) {
>> + ? ? ? ? ? ? writew(0x00, NFC_FLASH_ADDR);
>> + ? ? ? ? ? ? writew(NFC_ADDR, NFC_CONFIG2);
>> + ? ? ? ? ? ? mx31_wait_ready();
>> + ? ? }
>> +
>> + ? ? page_count = CFG_NAND_CHIP_SIZE / CFG_NAND_PAGE_SIZE;
>> +
>> + ? ? if (page_address <= page_count) {
>> + ? ? ? ? ? ? page_count--; /* transform 0x01000000 to 0x00ffffff */
>> + ? ? ? ? ? ? do {
>> + ? ? ? ? ? ? ? ? ? ? writew(page_address & 0xff, NFC_FLASH_ADDR);
>> + ? ? ? ? ? ? ? ? ? ? writew(NFC_ADDR, NFC_CONFIG2);
>> + ? ? ? ? ? ? ? ? ? ? mx31_wait_ready();
>> + ? ? ? ? ? ? ? ? ? ? page_address = page_address >> 8;
>> + ? ? ? ? ? ? ? ? ? ? page_count = page_count >> 8;
>> + ? ? ? ? ? ? } while (page_count);
>> + ? ? }
>
> Does the number of address bytes really need to depend on the size of the
> flash chip, or can you base it on the number of non-zero bytes in
> page_address (the chip will know when the address phase is over because
> ALE drops)?

Ok, will try to look into it.

>> +static int mx31_nand_check_ecc(void)
>> +{
>> + ? ? unsigned short ecc_status_register;
>> +
>> + ? ? ecc_status_register = readw(NFC_ECC_STATUS_RESULT);
>> +
>> + ? ? if (ecc_status_register != 0)
>> + ? ? ? ? ? ? return 1; /* error */
>> + ? ? return 0;
>> +}
>
> How about just "return readw(NFC_ECC_STATUS_RESULT);"?

ok

>> +static int mx31_read_page(unsigned int page_address, unsigned char *buf)
>> +{
>> + ? ? int i;
>> + ? ? volatile u32 *p1;
>> + ? ? volatile u32 *p2;
>> + ? ? u32 a;
>
> s/p1/src/
> s/p2/dest/
>
> s/a/something (just a little) more descriptive/ -- my first guess was
> "address", but that doesn't seem right...

Ok

> No volatile; use I/O accessors.

Yes, already on todo-list.

>> + ? ? writew(0, NFC_BUF_ADDR); /* read in first 0 buffer */
>> + ? ? mx31_nand_command(NAND_CMD_READ0);
>> + ? ? mx31_nand_page_address(page_address);
>> +
>> + ? ? if (CFG_NAND_CHIP_SIZE >= 0x08000000)
>> + ? ? ? ? ? ? mx31_nand_command(NAND_CMD_READSTART);
>
> Is it guaranteed that all NAND chips above that size will be large page
> and all chips below that size will be small page?

No, I'll change to use the CONFIG_SYS_NAND_PAGE_SIZE to do different
stuff depending on the page size.

>> + ? ? /* it is hardware specific code for 8-bit 512B NAND-flash spare area */
>> + ? ? p1++;
>> + ? ? a = *p1;
>> + ? ? a = (a & 0x0000ff00) >> 8;
>> +
>> + ? ? if (a != 0xff) /* bad block marker verify */
>> + ? ? ? ? ? ? return 1; /* potential bad block */
>> +
>> + ? ? return 0;
>
> The bad block location is typically different (offset 0 rather than 5)
> with large page flash.

I think that's because of the non-standard imlementation of large page
support in the i.MX31 NFC.

>> + ? ? ? ? ? ? /* checking first page of each block */
>
> I believe some NAND chips may mark a block bad in its second page...

I'll see what I can do.

/Magnus

[U-Boot] [PATCH v2 1/3] MX31: Add NAND SPL for i.MX31.

[Scott Wood]

On Sat, May 30, 2009 at 09:54:56AM +0200, Magnus Lilja wrote:
> 2009/5/29 Scott Wood <scottwood@freescale.com>:
> > The bad block location is typically different (offset 0 rather than 5)
> > with large page flash.
> 
> I think that's because of the non-standard imlementation of large page
> support in the i.MX31 NFC.

We should have comments in the code explaining what's going on in such
cases.

-Scott

[U-Boot] [PATCH v2 1/3] MX31: Add NAND SPL for i.MX31.

[Magnus Lilja]

Hi

2009/6/1 Scott Wood <scottwood@freescale.com>:
> On Sat, May 30, 2009 at 09:54:56AM +0200, Magnus Lilja wrote:
>> 2009/5/29 Scott Wood <scottwood@freescale.com>:
>> > The bad block location is typically different (offset 0 rather than 5)
>> > with large page flash.
>>
>> I think that's because of the non-standard imlementation of large page
>> support in the i.MX31 NFC.
>
> We should have comments in the code explaining what's going on in such
> cases.

Yes, I'll add that.

/Magnus

[U-Boot] [PATCH v2 1/3] MX31: Add NAND SPL for i.MX31.

[Magnus Lilja]

Hi

2009/5/30 Magnus Lilja <lilja.magnus@gmail.com>:
> 2009/5/29 Scott Wood <scottwood@freescale.com>:
>> On Sun, May 03, 2009 at 09:56:57PM +0200, Magnus Lilja wrote:
>>> +static void mx31_nand_page_address(unsigned int page_address)
>>> +{
>>> + ? ? unsigned int page_count;
>>> +
>>> + ? ? writew(0x00, NFC_FLASH_ADDR);
>>> + ? ? writew(NFC_ADDR, NFC_CONFIG2);
>>> + ? ? mx31_wait_ready();
>>> +
>>> + ? ? /* code only for 2kb flash */
>>> + ? ? if (CFG_NAND_PAGE_SIZE == 0x800) {
>>> + ? ? ? ? ? ? writew(0x00, NFC_FLASH_ADDR);
>>> + ? ? ? ? ? ? writew(NFC_ADDR, NFC_CONFIG2);
>>> + ? ? ? ? ? ? mx31_wait_ready();
>>> + ? ? }
>>> +
>>> + ? ? page_count = CFG_NAND_CHIP_SIZE / CFG_NAND_PAGE_SIZE;
>>> +
>>> + ? ? if (page_address <= page_count) {
>>> + ? ? ? ? ? ? page_count--; /* transform 0x01000000 to 0x00ffffff */
>>> + ? ? ? ? ? ? do {
>>> + ? ? ? ? ? ? ? ? ? ? writew(page_address & 0xff, NFC_FLASH_ADDR);
>>> + ? ? ? ? ? ? ? ? ? ? writew(NFC_ADDR, NFC_CONFIG2);
>>> + ? ? ? ? ? ? ? ? ? ? mx31_wait_ready();
>>> + ? ? ? ? ? ? ? ? ? ? page_address = page_address >> 8;
>>> + ? ? ? ? ? ? ? ? ? ? page_count = page_count >> 8;
>>> + ? ? ? ? ? ? } while (page_count);
>>> + ? ? }
>>
>> Does the number of address bytes really need to depend on the size of the
>> flash chip, or can you base it on the number of non-zero bytes in
>> page_address (the chip will know when the address phase is over because
>> ALE drops)?
>
> Ok, will try to look into it.

I did try to output only the non-zero bytes in the page_address but
that didn't work at all, u-boot didn't boot Don't know why though.

/Magnus

[U-Boot] [PATCH v2 1/3] MX31: Add NAND SPL for i.MX31.

[Scott Wood]

Magnus Lilja wrote:
> 2009/5/30 Magnus Lilja <lilja.magnus@gmail.com>:
>> 2009/5/29 Scott Wood <scottwood@freescale.com>:
>>> Does the number of address bytes really need to depend on the size of the
>>> flash chip, or can you base it on the number of non-zero bytes in
>>> page_address (the chip will know when the address phase is over because
>>> ALE drops)?
>> Ok, will try to look into it.
> 
> I did try to output only the non-zero bytes in the page_address but
> that didn't work at all, u-boot didn't boot Don't know why though.

Yes, I was a bit confused -- it looks like we can't omit high-order zero 
bytes, but I don't think it'll hurt (at least one chip manual explicitly 
says it won't) to have extra bytes.  So we could still keep the number 
of bytes fixed at the number for the largest supported chip.

Or, we could leave it the way it is, if you're not having any problems 
with the extra code fitting in the boot page, and if you don't need to 
dynamically support multiple chip sizes.

-Scott

[U-Boot] [PATCH v2 1/3] MX31: Add NAND SPL for i.MX31.

[Magnus Lilja]

2009/6/1 Scott Wood <scottwood@freescale.com>:
> Magnus Lilja wrote:
>>
>> 2009/5/30 Magnus Lilja <lilja.magnus@gmail.com>:
>>>
>>> 2009/5/29 Scott Wood <scottwood@freescale.com>:
>>>>
>>>> Does the number of address bytes really need to depend on the size of
>>>> the
>>>> flash chip, or can you base it on the number of non-zero bytes in
>>>> page_address (the chip will know when the address phase is over because
>>>> ALE drops)?
>>>
>>> Ok, will try to look into it.
>>
>> I did try to output only the non-zero bytes in the page_address but
>> that didn't work at all, u-boot didn't boot Don't know why though.
>
> Yes, I was a bit confused -- it looks like we can't omit high-order zero
> bytes, but I don't think it'll hurt (at least one chip manual explicitly
> says it won't) to have extra bytes. ?So we could still keep the number of
> bytes fixed at the number for the largest supported chip.
>
> Or, we could leave it the way it is, if you're not having any problems with
> the extra code fitting in the boot page, and if you don't need to
> dynamically support multiple chip sizes.

I think I'll leave it as is. There is no need to support multiple chip
sizes dynamically, in order to do that we have to detect the chip type
during boot and I couldn't fit that code into the boot page.

/Magnus