From mboxrd@z Thu Jan 1 00:00:00 1970 From: Dirk Behme Date: Sun, 07 Jun 2009 14:24:27 +0200 Subject: [U-Boot] [PATCH] move L2 cache enable/disable function to cache.c in the omap3 SoC directory In-Reply-To: <20090607120847.GG25032@game.jcrosoft.org> References: <20090607120847.GG25032@game.jcrosoft.org> Message-ID: <4A2BB17B.8050406@googlemail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Dear Jean-Christophe, Jean-Christophe PLAGNIOL-VILLARD wrote: > On 21:16 Tue 02 Jun , Kim, Heung Jun wrote: >> CC: Dirk Behme >> Signed-off-by: HeungJun, Kim >> >> --- >> >> The omap3 L2 cache enable/disable function in the cpu/arm_cortexa8/cpu.c moved >> to cpu/arm_cortexa8/omap3/cache.c. Because, it must be CortexA8 ARCH generic >> code below the cpu/arm_cortexa8. >> >> This patches fixes the First issue in the following >> >> http://lists.denx.de/pipermail/u-boot/2009-May/053433.html >> >> The Second issue is fixed by >> >> http://lists.denx.de/pipermail/u-boot/2009-May/053490.html >> >> cpu/arm_cortexa8/cpu.c | 70 ++--------------------------- >> cpu/arm_cortexa8/omap3/Makefile | 2 +- >> cpu/arm_cortexa8/omap3/board.c | 5 +- >> cpu/arm_cortexa8/omap3/cache.c | 96 +++++++++++++++++++++++++++++++++++++++ >> include/asm-arm/cache.h | 31 +++++++++++++ >> 5 files changed, 135 insertions(+), 69 deletions(-) >> create mode 100644 cpu/arm_cortexa8/omap3/cache.c >> create mode 100644 include/asm-arm/cache.h > applied to arm/next with manual merge > > for your next please do base your code on the arm/next Yes, I noticed this, too. Thanks for manual merge, Dirk