[U-Boot] U-Boot][PATCH] ARM Clean-up of ARM920T S3C24x0 drivers code

kevin.morfitt at fearnside-systems.co.uk
2009-06-05T19:02:56Z

This re-formats the S3C24x0 drivers code to meet the coding style requirements
and to make it always use the proper I/O accessor functions when accessing
registers. It was done using 'Lindent -kr -i8 -l80' followed by manual
inspection of the output. checkpatch.pl reports no problems with the patch
and I've run MAKEALL for all ARM9 boards with no problems.

This has been done to create a good starting point for me to add support for
a new board, the Embest SBC2440-II. Another patch does the same for the
ARM920 S3C24x0 CPU and headers code.

Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
---
drivers/i2c/s3c24x0_i2c.c | 269 ++++++++++++++++++++-------------------
drivers/mtd/nand/s3c2410_nand.c | 97 +++++++--------
drivers/rtc/s3c24x0_rtc.c | 126 +++++++++---------
drivers/serial/serial_s3c24x0.c | 143 ++++++++++++---------
4 files changed, 324 insertions(+), 311 deletions(-)

diff --git a/drivers/i2c/s3c24x0_i2c.c b/drivers/i2c/s3c24x0_i2c.c
index f0c1aa3..33cd3d4 100644
--- a/drivers/i2c/s3c24x0_i2c.c
+++ b/drivers/i2c/s3c24x0_i2c.c
@@ -32,6 +32,8 @@
#elif defined(CONFIG_S3C2410)
#include <s3c2410.h>
#endif
+
+#include <asm/io.h>
#include <i2c.h>

#ifdef CONFIG_HARD_I2C
@@ -42,36 +44,35 @@
#define I2C_OK 0
#define I2C_NOK 1
#define I2C_NACK 2
-#define I2C_NOK_LA 3 /* Lost arbitration */
-#define I2C_NOK_TOUT 4 /* time out */
-
-#define I2CSTAT_BSY 0x20 /* Busy bit */
-#define I2CSTAT_NACK 0x01 /* Nack bit */
-#define I2CCON_IRPND 0x10 /* Interrupt pending bit */
-#define I2C_MODE_MT 0xC0 /* Master Transmit Mode */
-#define I2C_MODE_MR 0x80 /* Master Receive Mode */
-#define I2C_START_STOP 0x20 /* START / STOP */
-#define I2C_TXRX_ENA 0x10 /* I2C Tx/Rx enable */
+#define I2C_NOK_LA 3 /* Lost arbitration */
+#define I2C_NOK_TOUT 4 /* time out */

-#define I2C_TIMEOUT 1 /* 1 second */
+#define I2CSTAT_BSY 0x20 /* Busy bit */
+#define I2CSTAT_NACK 0x01 /* Nack bit */
+#define I2CCON_IRPND 0x10 /* Interrupt pending bit */
+#define I2C_MODE_MT 0xC0 /* Master Transmit Mode */
+#define I2C_MODE_MR 0x80 /* Master Receive Mode */
+#define I2C_START_STOP 0x20 /* START / STOP */
+#define I2C_TXRX_ENA 0x10 /* I2C Tx/Rx enable */

+#define I2C_TIMEOUT 1 /* 1 second */

static int GetI2CSDA(void)
{
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();

#ifdef CONFIG_S3C2410
- return (gpio->GPEDAT & 0x8000) >> 15;
+ return (readl(&gpio->GPEDAT) & 0x8000) >> 15;
#endif
#ifdef CONFIG_S3C2400
- return (gpio->PGDAT & 0x0020) >> 5;
+ return (readl(&gpio->PGDAT) & 0x0020) >> 5;
#endif
}

#if 0
static void SetI2CSDA(int x)
{
- rGPEDAT = (rGPEDAT & ~0x8000) | (x&1) << 15;
+ rGPEDAT = (rGPEDAT & ~0x8000) | (x & 1) << 15;
}
#endif

@@ -80,104 +81,102 @@ static void SetI2CSCL(int x)
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();

#ifdef CONFIG_S3C2410
- gpio->GPEDAT = (gpio->GPEDAT & ~0x4000) | (x&1) << 14;
+ writel((readl(&gpio->GPEDAT) & ~0x4000) | (x & 1) << 14, &gpio->GPEDAT);
#endif
#ifdef CONFIG_S3C2400
- gpio->PGDAT = (gpio->PGDAT & ~0x0040) | (x&1) << 6;
+ writel((readl(&gpio->PGDAT) & ~0x0040) | (x & 1) << 6, &gpio->PGDAT);
#endif
}

-
-static int WaitForXfer (void)
+static int WaitForXfer(void)
{
- S3C24X0_I2C *const i2c = S3C24X0_GetBase_I2C ();
- int i, status;
+ S3C24X0_I2C * const i2c = S3C24X0_GetBase_I2C();
+ int i;

i = I2C_TIMEOUT * 10000;
- status = i2c->IICCON;
- while ((i > 0) && !(status & I2CCON_IRPND)) {
- udelay (100);
- status = i2c->IICCON;
+ while (!(readl(&i2c->IICCON) & I2CCON_IRPND) && (i > 0)) {
+ udelay(100);
i--;
}

- return (status & I2CCON_IRPND) ? I2C_OK : I2C_NOK_TOUT;
+ return (readl(&i2c->IICCON) & I2CCON_IRPND) ? I2C_OK : I2C_NOK_TOUT;
}

-static int IsACK (void)
+static int IsACK(void)
{
- S3C24X0_I2C *const i2c = S3C24X0_GetBase_I2C ();
+ S3C24X0_I2C * const i2c = S3C24X0_GetBase_I2C();

- return (!(i2c->IICSTAT & I2CSTAT_NACK));
+ return !(readl(&i2c->IICSTAT) & I2CSTAT_NACK);
}

-static void ReadWriteByte (void)
+static void ReadWriteByte(void)
{
- S3C24X0_I2C *const i2c = S3C24X0_GetBase_I2C ();
+ S3C24X0_I2C * const i2c = S3C24X0_GetBase_I2C();

- i2c->IICCON &= ~I2CCON_IRPND;
+ writel(readl(&i2c->IICCON) & ~I2CCON_IRPND, &i2c->IICCON);
}

-void i2c_init (int speed, int slaveadd)
+void i2c_init(int speed, int slaveadd)
{
- S3C24X0_I2C *const i2c = S3C24X0_GetBase_I2C ();
- S3C24X0_GPIO *const gpio = S3C24X0_GetBase_GPIO ();
+ S3C24X0_I2C * const i2c = S3C24X0_GetBase_I2C();
+ S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
ulong freq, pres = 16, div;
- int i, status;
+ int i;

/* wait for some time to give previous transfer a chance to finish */

i = I2C_TIMEOUT * 1000;
- status = i2c->IICSTAT;
- while ((i > 0) && (status & I2CSTAT_BSY)) {
- udelay (1000);
- status = i2c->IICSTAT;
+ while ((readl(&i2c->IICSTAT) && I2CSTAT_BSY) && (i > 0)) {
+ udelay(1000);
i--;
}

- if ((status & I2CSTAT_BSY) || GetI2CSDA () == 0) {
+ if ((readl(&i2c->IICSTAT) & I2CSTAT_BSY) || GetI2CSDA() == 0) {
#ifdef CONFIG_S3C2410
- ulong old_gpecon = gpio->GPECON;
+ ulong old_gpecon = readl(&gpio->GPECON);
#endif
#ifdef CONFIG_S3C2400
- ulong old_gpecon = gpio->PGCON;
+ ulong old_gpecon = readl(&gpio->PGCON);
#endif
- /* bus still busy probably by (most) previously interrupted transfer */
+ /* bus still busy probably by (most) previously interrupted
+ transfer */

#ifdef CONFIG_S3C2410
/* set I2CSDA and I2CSCL (GPE15, GPE14) to GPIO */
- gpio->GPECON = (gpio->GPECON & ~0xF0000000) | 0x10000000;
+ writel((readl(&gpio->GPECON) & ~0xF0000000) | 0x10000000,
+ &gpio->GPECON);
#endif
#ifdef CONFIG_S3C2400
/* set I2CSDA and I2CSCL (PG5, PG6) to GPIO */
- gpio->PGCON = (gpio->PGCON & ~0x00003c00) | 0x00001000;
+ writel((readl(&gpio->PGCON) & ~0x00003c00) | 0x00001000,
+ &gpio->PGCON);
#endif

/* toggle I2CSCL until bus idle */
- SetI2CSCL (0);
- udelay (1000);
+ SetI2CSCL(0);
+ udelay(1000);
i = 10;
- while ((i > 0) && (GetI2CSDA () != 1)) {
- SetI2CSCL (1);
- udelay (1000);
- SetI2CSCL (0);
- udelay (1000);
+ while ((i > 0) && (GetI2CSDA() != 1)) {
+ SetI2CSCL(1);
+ udelay(1000);
+ SetI2CSCL(0);
+ udelay(1000);
i--;
}
- SetI2CSCL (1);
- udelay (1000);
+ SetI2CSCL(1);
+ udelay(1000);

/* restore pin functions */
#ifdef CONFIG_S3C2410
- gpio->GPECON = old_gpecon;
+ writel(old_gpecon, &gpio->GPECON);
#endif
#ifdef CONFIG_S3C2400
- gpio->PGCON = old_gpecon;
+ writel(old_gpecon, &gpio->PGCON);
#endif
}

/* calculate prescaler and divisor values */
- freq = get_PCLK ();
+ freq = get_PCLK();
if ((freq / pres / (16 + 1)) > speed)
/* set prescaler to 512 */
pres = 512;
@@ -188,13 +187,13 @@ void i2c_init (int speed, int slaveadd)

/* set prescaler, divisor according to freq, also set
* ACKGEN, IRQ */
- i2c->IICCON = (div & 0x0F) | 0xA0 | ((pres == 512) ? 0x40 : 0);
+ writel((div & 0x0F) | 0xA0 | ((pres == 512) ? 0x40 : 0), &i2c->IICCON);

/* init to SLAVE REVEIVE and set slaveaddr */
- i2c->IICSTAT = 0;
- i2c->IICADD = slaveadd;
+ writel(0, &i2c->IICSTAT);
+ writel(slaveadd, &i2c->IICADD);
/* program Master Transmit (and implicit STOP) */
- i2c->IICSTAT = I2C_MODE_MT | I2C_TXRX_ENA;
+ writel(I2C_MODE_MT | I2C_TXRX_ENA, &i2c->IICSTAT);

}

@@ -206,107 +205,109 @@ void i2c_init (int speed, int slaveadd)
* 0 we skip the address write cycle.
*/
static
-int i2c_transfer (unsigned char cmd_type,
- unsigned char chip,
- unsigned char addr[],
- unsigned char addr_len,
- unsigned char data[], unsigned short data_len)
+int i2c_transfer(unsigned char cmd_type,
+ unsigned char chip,
+ unsigned char addr[],
+ unsigned char addr_len,
+ unsigned char data[], unsigned short data_len)
{
- S3C24X0_I2C *const i2c = S3C24X0_GetBase_I2C ();
- int i, status, result;
+ S3C24X0_I2C * const i2c = S3C24X0_GetBase_I2C();
+ int i, result;

if (data == 0 || data_len == 0) {
/*Don't support data transfer of no length or to address 0 */
- printf ("i2c_transfer: bad call\n");
+ printf("i2c_transfer: bad call\n");
return I2C_NOK;
}

/* Check I2C bus idle */
i = I2C_TIMEOUT * 1000;
- status = i2c->IICSTAT;
- while ((i > 0) && (status & I2CSTAT_BSY)) {
- udelay (1000);
- status = i2c->IICSTAT;
+ while ((readl(&i2c->IICSTAT) & I2CSTAT_BSY) && (i > 0)) {
+ udelay(1000);
i--;
}

- if (status & I2CSTAT_BSY)
+ if (readl(&i2c->IICSTAT) & I2CSTAT_BSY)
return I2C_NOK_TOUT;

- i2c->IICCON |= 0x80;
+ writel(readl(&i2c->IICCON) | 0x80, &i2c->IICCON);
result = I2C_OK;

switch (cmd_type) {
case I2C_WRITE:
if (addr && addr_len) {
- i2c->IICDS = chip;
+ writel(chip, &i2c->IICDS);
/* send START */
- i2c->IICSTAT = I2C_MODE_MT | I2C_TXRX_ENA | I2C_START_STOP;
+ writel(I2C_MODE_MT | I2C_TXRX_ENA | I2C_START_STOP,
+ &i2c->IICSTAT);
i = 0;
while ((i < addr_len) && (result == I2C_OK)) {
- result = WaitForXfer ();
- i2c->IICDS = addr[i];
- ReadWriteByte ();
+ result = WaitForXfer();
+ writel(addr[i], &i2c->IICDS);
+ ReadWriteByte();
i++;
}
i = 0;
while ((i < data_len) && (result == I2C_OK)) {
- result = WaitForXfer ();
- i2c->IICDS = data[i];
- ReadWriteByte ();
+ result = WaitForXfer();
+ writel(data[i], &i2c->IICDS);
+ ReadWriteByte();
i++;
}
} else {
- i2c->IICDS = chip;
+ writel(chip, &i2c->IICDS);
/* send START */
- i2c->IICSTAT = I2C_MODE_MT | I2C_TXRX_ENA | I2C_START_STOP;
+ writel(I2C_MODE_MT | I2C_TXRX_ENA | I2C_START_STOP,
+ &i2c->IICSTAT);
i = 0;
while ((i < data_len) && (result = I2C_OK)) {
- result = WaitForXfer ();
- i2c->IICDS = data[i];
- ReadWriteByte ();
+ result = WaitForXfer();
+ writel(data[i], &i2c->IICDS);
+ ReadWriteByte();
i++;
}
}

if (result == I2C_OK)
- result = WaitForXfer ();
+ result = WaitForXfer();

/* send STOP */
- i2c->IICSTAT = I2C_MODE_MR | I2C_TXRX_ENA;
- ReadWriteByte ();
+ writel(I2C_MODE_MR | I2C_TXRX_ENA, &i2c->IICSTAT);
+ ReadWriteByte();
break;

case I2C_READ:
if (addr && addr_len) {
- i2c->IICSTAT = I2C_MODE_MT | I2C_TXRX_ENA;
- i2c->IICDS = chip;
+ writel(I2C_MODE_MT | I2C_TXRX_ENA, &i2c->IICSTAT);
+ writel(chip, &i2c->IICDS);
/* send START */
- i2c->IICSTAT |= I2C_START_STOP;
- result = WaitForXfer ();
- if (IsACK ()) {
+ writel(readl(&i2c->IICSTAT) | I2C_START_STOP,
+ &i2c->IICSTAT);
+ result = WaitForXfer();
+ if (IsACK()) {
i = 0;
while ((i < addr_len) && (result == I2C_OK)) {
- i2c->IICDS = addr[i];
- ReadWriteByte ();
- result = WaitForXfer ();
+ writel(addr[i], &i2c->IICDS);
+ ReadWriteByte();
+ result = WaitForXfer();
i++;
}

- i2c->IICDS = chip;
+ writel(chip, &i2c->IICDS);
/* resend START */
- i2c->IICSTAT = I2C_MODE_MR | I2C_TXRX_ENA |
- I2C_START_STOP;
- ReadWriteByte ();
- result = WaitForXfer ();
+ writel(I2C_MODE_MR | I2C_TXRX_ENA |
+ I2C_START_STOP, &i2c->IICSTAT);
+ ReadWriteByte();
+ result = WaitForXfer();
i = 0;
while ((i < data_len) && (result == I2C_OK)) {
/* disable ACK for final READ */
if (i == data_len - 1)
- i2c->IICCON &= ~0x80;
- ReadWriteByte ();
- result = WaitForXfer ();
- data[i] = i2c->IICDS;
+ writel(readl(&i2c->IICCON)
+ & ~0x80, &i2c->IICCON);
+ ReadWriteByte();
+ result = WaitForXfer();
+ data[i] = readl(&i2c->IICDS);
i++;
}
} else {
@@ -314,21 +315,23 @@ int i2c_transfer (unsigned char cmd_type,
}

} else {
- i2c->IICSTAT = I2C_MODE_MR | I2C_TXRX_ENA;
- i2c->IICDS = chip;
+ writel(I2C_MODE_MR | I2C_TXRX_ENA, &i2c->IICSTAT);
+ writel(chip, &i2c->IICDS);
/* send START */
- i2c->IICSTAT |= I2C_START_STOP;
- result = WaitForXfer ();
+ writel(readl(&i2c->IICSTAT) | I2C_START_STOP,
+ &i2c->IICSTAT);
+ result = WaitForXfer();

- if (IsACK ()) {
+ if (IsACK()) {
i = 0;
while ((i < data_len) && (result == I2C_OK)) {
/* disable ACK for final READ */
if (i == data_len - 1)
- i2c->IICCON &= ~0x80;
- ReadWriteByte ();
- result = WaitForXfer ();
- data[i] = i2c->IICDS;
+ writel(readl(&i2c->IICCON) &
+ ~0x80, &i2c->IICCON);
+ ReadWriteByte();
+ result = WaitForXfer();
+ data[i] = readl(&i2c->IICDS);
i++;
}
} else {
@@ -337,12 +340,12 @@ int i2c_transfer (unsigned char cmd_type,
}

/* send STOP */
- i2c->IICSTAT = I2C_MODE_MR | I2C_TXRX_ENA;
- ReadWriteByte ();
+ writel(I2C_MODE_MR | I2C_TXRX_ENA, &i2c->IICSTAT);
+ ReadWriteByte();
break;

default:
- printf ("i2c_transfer: bad call\n");
+ printf("i2c_transfer: bad call\n");
result = I2C_NOK;
break;
}
@@ -350,7 +353,7 @@ int i2c_transfer (unsigned char cmd_type,
return (result);
}

-int i2c_probe (uchar chip)
+int i2c_probe(uchar chip)
{
uchar buf[1];

@@ -361,16 +364,16 @@ int i2c_probe (uchar chip)
* address was <ACK>ed (i.e. there was a chip at that address which
* drove the data line low).
*/
- return (i2c_transfer (I2C_READ, chip << 1, 0, 0, buf, 1) != I2C_OK);
+ return i2c_transfer(I2C_READ, chip << 1, 0, 0, buf, 1) != I2C_OK;
}

-int i2c_read (uchar chip, uint addr, int alen, uchar * buffer, int len)
+int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
{
uchar xaddr[4];
int ret;

if (alen > 4) {
- printf ("I2C read: addr len %d not supported\n", alen);
+ printf("I2C read: addr len %d not supported\n", alen);
return 1;
}

@@ -394,23 +397,24 @@ int i2c_read (uchar chip, uint addr, int alen, uchar * buffer, int len)
* hidden in the chip address.
*/
if (alen > 0)
- chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
+ chip |= ((addr >> (alen * 8)) &
+ CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
#endif
if ((ret =
- i2c_transfer (I2C_READ, chip << 1, &xaddr[4 - alen], alen,
- buffer, len)) != 0) {
- printf ("I2c read: failed %d\n", ret);
+ i2c_transfer(I2C_READ, chip << 1, &xaddr[4 - alen], alen,
+ buffer, len)) != 0) {
+ printf("I2c read: failed %d\n", ret);
return 1;
}
return 0;
}

-int i2c_write (uchar chip, uint addr, int alen, uchar * buffer, int len)
+int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
{
uchar xaddr[4];

if (alen > 4) {
- printf ("I2C write: addr len %d not supported\n", alen);
+ printf("I2C write: addr len %d not supported\n", alen);
return 1;
}

@@ -433,10 +437,11 @@ int i2c_write (uchar chip, uint addr, int alen, uchar * buffer, int len)
* hidden in the chip address.
*/
if (alen > 0)
- chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
+ chip |= ((addr >> (alen * 8)) &
+ CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
#endif
return (i2c_transfer
(I2C_WRITE, chip << 1, &xaddr[4 - alen], alen, buffer,
len) != 0);
}
-#endif /* CONFIG_HARD_I2C */
+#endif /* CONFIG_HARD_I2C */
diff --git a/drivers/mtd/nand/s3c2410_nand.c b/drivers/mtd/nand/s3c2410_nand.c
index d27a625..60bfd10 100644
--- a/drivers/mtd/nand/s3c2410_nand.c
+++ b/drivers/mtd/nand/s3c2410_nand.c
@@ -20,61 +20,42 @@

#include <common.h>

-#if 0
-#define DEBUGN printf
-#else
-#define DEBUGN(x, args ...) {}
-#endif
-
#include <nand.h>
#include <s3c2410.h>
#include <asm/io.h>

-#define __REGb(x) (*(volatile unsigned char *)(x))
-#define __REGi(x) (*(volatile unsigned int *)(x))
-
-#define NF_BASE 0x4e000000
-#define NFCONF __REGi(NF_BASE + 0x0)
-#define NFCMD __REGb(NF_BASE + 0x4)
-#define NFADDR __REGb(NF_BASE + 0x8)
-#define NFDATA __REGb(NF_BASE + 0xc)
-#define NFSTAT __REGb(NF_BASE + 0x10)
-#define NFECC0 __REGb(NF_BASE + 0x14)
-#define NFECC1 __REGb(NF_BASE + 0x15)
-#define NFECC2 __REGb(NF_BASE + 0x16)
-
-#define S3C2410_NFCONF_EN (1<<15)
-#define S3C2410_NFCONF_512BYTE (1<<14)
-#define S3C2410_NFCONF_4STEP (1<<13)
-#define S3C2410_NFCONF_INITECC (1<<12)
-#define S3C2410_NFCONF_nFCE (1<<11)
-#define S3C2410_NFCONF_TACLS(x) ((x)<<8)
-#define S3C2410_NFCONF_TWRPH0(x) ((x)<<4)
-#define S3C2410_NFCONF_TWRPH1(x) ((x)<<0)
-
-#define S3C2410_ADDR_NALE 4
-#define S3C2410_ADDR_NCLE 8
+#define S3C2410_NFCONF_EN (1<<15)
+#define S3C2410_NFCONF_512BYTE (1<<14)
+#define S3C2410_NFCONF_4STEP (1<<13)
+#define S3C2410_NFCONF_INITECC (1<<12)
+#define S3C2410_NFCONF_nFCE (1<<11)
+#define S3C2410_NFCONF_TACLS(x) ((x)<<8)
+#define S3C2410_NFCONF_TWRPH0(x) ((x)<<4)
+#define S3C2410_NFCONF_TWRPH1(x) ((x)<<0)

static void s3c2410_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
{
struct nand_chip *chip = mtd->priv;
+ S3C24X0_NAND * const nand = S3C24X0_GetBase_NAND();

- DEBUGN("hwcontrol(): 0x%02x 0x%02x\n", cmd, ctrl);
+ debugX(1, "hwcontrol(): 0x%02x 0x%02x\n", cmd, ctrl);

if (ctrl & NAND_CTRL_CHANGE) {
- ulong IO_ADDR_W = NF_BASE;
+ void *IO_ADDR_W = &nand->NFCONF;

if (!(ctrl & NAND_CLE))
- IO_ADDR_W |= S3C2410_ADDR_NCLE;
+ IO_ADDR_W = &nand->NFADDR;
if (!(ctrl & NAND_ALE))
- IO_ADDR_W |= S3C2410_ADDR_NALE;
+ IO_ADDR_W = &nand->NFCMD;

- chip->IO_ADDR_W = (void *)IO_ADDR_W;
+ chip->IO_ADDR_W = IO_ADDR_W;

if (ctrl & NAND_NCE)
- NFCONF &= ~S3C2410_NFCONF_nFCE;
+ writel(readl(&nand->NFCONF) & ~S3C2410_NFCONF_nFCE,
+ &nand->NFCONF)
else
- NFCONF |= S3C2410_NFCONF_nFCE;
+ writel(readl(&nand->NFCONF) | S3C2410_NFCONF_nFCE,
+ &nand->NFCONF)
}

if (cmd != NAND_CMD_NONE)
@@ -83,25 +64,32 @@ static void s3c2410_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)

static int s3c2410_dev_ready(struct mtd_info *mtd)
{
- DEBUGN("dev_ready\n");
- return (NFSTAT & 0x01);
+ S3C24X0_NAND * const nand = S3C24X0_GetBase_NAND();
+
+ debugX(1, "dev_ready\n");
+ return readl(&nand->NFSTAT) & 0x01;
}

#ifdef CONFIG_S3C2410_NAND_HWECC
void s3c2410_nand_enable_hwecc(struct mtd_info *mtd, int mode)
{
- DEBUGN("s3c2410_nand_enable_hwecc(%p, %d)\n", mtd, mode);
- NFCONF |= S3C2410_NFCONF_INITECC;
+ S3C24X0_UART * const nand = S3C24X0_GetBase_NAND();
+
+ debugX(1, "s3c2410_nand_enable_hwecc(%p, %d)\n", mtd, mode);
+ writel(readl(&nand->NFCONF) | S3C2410_NFCONF_INITECC, &nand->NFCONF);
}

static int s3c2410_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
u_char *ecc_code)
{
- ecc_code[0] = NFECC0;
- ecc_code[1] = NFECC1;
- ecc_code[2] = NFECC2;
- DEBUGN("s3c2410_nand_calculate_hwecc(%p,): 0x%02x 0x%02x 0x%02x\n",
- mtd , ecc_code[0], ecc_code[1], ecc_code[2]);
+ S3C24X0_NAND * const nand = S3C24X0_GetBase_NAND();
+ unsigned long ecc = readl(&nand->NFECC);
+
+ ecc_code[0] = ecc;
+ ecc_code[1] = ecc >> 8;
+ ecc_code[2] = ecc >> 16;
+ debugX(1, "s3c2410_nand_calculate_hwecc(%p,): 0x%02x 0x%02x 0x%02x\n",
+ mtd, ecc_code[0], ecc_code[1], ecc_code[2]);

return 0;
}
@@ -114,7 +102,7 @@ static int s3c2410_nand_correct_data(struct mtd_info *mtd, u_char *dat,
read_ecc[2] == calc_ecc[2])
return 0;

- printf("s3c2410_nand_correct_data: not implemented\n");
+ debugX(1, "s3c2410_nand_correct_data: not implemented\n");
return -1;
}
#endif
@@ -124,23 +112,26 @@ int board_nand_init(struct nand_chip *nand)
u_int32_t cfg;
u_int8_t tacls, twrph0, twrph1;
S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
+ S3C24X0_NAND * const nand_reg = S3C24X0_GetBase_NAND();

- DEBUGN("board_nand_init()\n");
+ debugX(1, "board_nand_init()\n");

- clk_power->CLKCON |= (1 << 4);
+ writel(readl(&clk_power->CLKCON) | (1 << 4), &clk_power->CLKCON);

/* initialize hardware */
- twrph0 = 3; twrph1 = 0; tacls = 0;
+ twrph0 = 3;
+ twrph1 = 0;
+ tacls = 0;

cfg = S3C2410_NFCONF_EN;
cfg |= S3C2410_NFCONF_TACLS(tacls - 1);
cfg |= S3C2410_NFCONF_TWRPH0(twrph0 - 1);
cfg |= S3C2410_NFCONF_TWRPH1(twrph1 - 1);

- NFCONF = cfg;
+ writel(cfg, &nand_reg->NFCONF);

/* initialize nand_chip data structure */
- nand->IO_ADDR_R = nand->IO_ADDR_W = (void *)0x4e00000c;
+ nand->IO_ADDR_R = nand->IO_ADDR_W = (void *)&nand_reg->NFDATA;

/* read_buf and write_buf are default */
/* read_byte and write_byte are default */
@@ -165,7 +156,7 @@ int board_nand_init(struct nand_chip *nand)
nand->options = 0;
#endif

- DEBUGN("end of nand_init\n");
+ debugX(1, "end of nand_init\n");

return 0;
}
diff --git a/drivers/rtc/s3c24x0_rtc.c b/drivers/rtc/s3c24x0_rtc.c
index 0d3372f..f8e1111 100644
--- a/drivers/rtc/s3c24x0_rtc.c
+++ b/drivers/rtc/s3c24x0_rtc.c
@@ -37,6 +37,7 @@
#endif

#include <rtc.h>
+#include <asm/io.h>

/*#define DEBUG*/

@@ -49,121 +50,122 @@ typedef enum {
static inline void SetRTC_Access(RTC_ACCESS a)
{
S3C24X0_RTC * const rtc = S3C24X0_GetBase_RTC();
+
switch (a) {
- case RTC_ENABLE:
- rtc->RTCCON |= 0x01; break;
+ case RTC_ENABLE:
+ writeb(readb(&rtc->RTCCON) | 0x01, &rtc->RTCCON);
+ break;

- case RTC_DISABLE:
- rtc->RTCCON &= ~0x01; break;
+ case RTC_DISABLE:
+ writeb(readb(&rtc->RTCCON) & ~0x01, &rtc->RTCCON);
+ break;
}
}

-static unsigned bcd2bin (uchar n)
+static unsigned bcd2bin(uchar n)
{
return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
}

-static unsigned char bin2bcd (unsigned int n)
+static unsigned char bin2bcd(unsigned int n)
{
return (((n / 10) << 4) | (n % 10));
}

/* ------------------------------------------------------------------------- */

-int rtc_get (struct rtc_time *tmp)
+int rtc_get(struct rtc_time *tmp)
{
S3C24X0_RTC * const rtc = S3C24X0_GetBase_RTC();
uchar sec, min, hour, mday, wday, mon, year;
- uchar a_sec,a_min, a_hour, a_date, a_mon, a_year, a_armed;
+ uchar a_sec, a_min, a_hour, a_date, a_mon, a_year, a_armed;

/* enable access to RTC registers */
SetRTC_Access(RTC_ENABLE);

/* read RTC registers */
do {
- sec = rtc->BCDSEC;
- min = rtc->BCDMIN;
- hour = rtc->BCDHOUR;
- mday = rtc->BCDDATE;
- wday = rtc->BCDDAY;
- mon = rtc->BCDMON;
- year = rtc->BCDYEAR;
- } while (sec != rtc->BCDSEC);
+ sec = readb(&rtc->BCDSEC);
+ min = readb(&rtc->BCDMIN);
+ hour = readb(&rtc->BCDHOUR);
+ mday = readb(&rtc->BCDDATE);
+ wday = readb(&rtc->BCDDAY);
+ mon = readb(&rtc->BCDMON);
+ year = readb(&rtc->BCDYEAR);
+ } while (sec != readb(&rtc->BCDSEC));

/* read ALARM registers */
- a_sec = rtc->ALMSEC;
- a_min = rtc->ALMMIN;
- a_hour = rtc->ALMHOUR;
- a_date = rtc->ALMDATE;
- a_mon = rtc->ALMMON;
- a_year = rtc->ALMYEAR;
- a_armed = rtc->RTCALM;
+ a_sec = readb(&rtc->ALMSEC);
+ a_min = readb(&rtc->ALMMIN);
+ a_hour = readb(&rtc->ALMHOUR);
+ a_date = readb(&rtc->ALMDATE);
+ a_mon = readb(&rtc->ALMMON);
+ a_year = readb(&rtc->ALMYEAR);
+ a_armed = readb(&rtc->RTCALM);

/* disable access to RTC registers */
SetRTC_Access(RTC_DISABLE);

#ifdef RTC_DEBUG
- printf ( "Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x "
- "hr: %02x min: %02x sec: %02x\n",
- year, mon, mday, wday,
- hour, min, sec);
- printf ( "Alarms: %02x: year: %02x month: %02x date: %02x hour: %02x min: %02x sec: %02x\n",
- a_armed,
- a_year, a_mon, a_date,
- a_hour, a_min, a_sec);
+ printf("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x "
+ "hr: %02x min: %02x sec: %02x\n",
+ year, mon, mday, wday, hour, min, sec);
+ printf("Alarms: %02x: year: %02x month: %02x date: %02x hour: "
+ "%02x min: %02x sec: %02x\n",
+ a_armed, a_year, a_mon, a_date, a_hour, a_min, a_sec);
#endif

- tmp->tm_sec = bcd2bin(sec & 0x7F);
- tmp->tm_min = bcd2bin(min & 0x7F);
+ tmp->tm_sec = bcd2bin(sec & 0x7F);
+ tmp->tm_min = bcd2bin(min & 0x7F);
tmp->tm_hour = bcd2bin(hour & 0x3F);
tmp->tm_mday = bcd2bin(mday & 0x3F);
- tmp->tm_mon = bcd2bin(mon & 0x1F);
+ tmp->tm_mon = bcd2bin(mon & 0x1F);
tmp->tm_year = bcd2bin(year);
tmp->tm_wday = bcd2bin(wday & 0x07);
- if(tmp->tm_year<70)
- tmp->tm_year+=2000;
+ if (tmp->tm_year < 70)
+ tmp->tm_year += 2000;
else
- tmp->tm_year+=1900;
+ tmp->tm_year += 1900;
tmp->tm_yday = 0;
- tmp->tm_isdst= 0;
+ tmp->tm_isdst = 0;
#ifdef RTC_DEBUG
- printf ( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
- tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
- tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
+ printf("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
+ tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
+ tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
#endif

return 0;
}

-int rtc_set (struct rtc_time *tmp)
+int rtc_set(struct rtc_time *tmp)
{
S3C24X0_RTC * const rtc = S3C24X0_GetBase_RTC();
uchar sec, min, hour, mday, wday, mon, year;

#ifdef RTC_DEBUG
- printf ( "Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
- tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
- tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
+ printf("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
+ tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
+ tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
#endif
- year = bin2bcd(tmp->tm_year % 100);
- mon = bin2bcd(tmp->tm_mon);
- wday = bin2bcd(tmp->tm_wday);
- mday = bin2bcd(tmp->tm_mday);
- hour = bin2bcd(tmp->tm_hour);
- min = bin2bcd(tmp->tm_min);
- sec = bin2bcd(tmp->tm_sec);
+ year = bin2bcd(tmp->tm_year % 100);
+ mon = bin2bcd(tmp->tm_mon);
+ wday = bin2bcd(tmp->tm_wday);
+ mday = bin2bcd(tmp->tm_mday);
+ hour = bin2bcd(tmp->tm_hour);
+ min = bin2bcd(tmp->tm_min);
+ sec = bin2bcd(tmp->tm_sec);

/* enable access to RTC registers */
SetRTC_Access(RTC_ENABLE);

/* write RTC registers */
- rtc->BCDSEC = sec;
- rtc->BCDMIN = min;
- rtc->BCDHOUR = hour;
- rtc->BCDDATE = mday;
- rtc->BCDDAY = wday;
- rtc->BCDMON = mon;
- rtc->BCDYEAR = year;
+ writeb(sec, &rtc->BCDSEC);
+ writeb(min, &rtc->BCDMIN);
+ writeb(hour, &rtc->BCDHOUR);
+ writeb(mday, &rtc->BCDDATE);
+ writeb(wday, &rtc->BCDDAY);
+ writeb(mon, &rtc->BCDMON);
+ writeb(year, &rtc->BCDYEAR);

/* disable access to RTC registers */
SetRTC_Access(RTC_DISABLE);
@@ -171,12 +173,12 @@ int rtc_set (struct rtc_time *tmp)
return 0;
}

-void rtc_reset (void)
+void rtc_reset(void)
{
S3C24X0_RTC * const rtc = S3C24X0_GetBase_RTC();

- rtc->RTCCON = (rtc->RTCCON & ~0x06) | 0x08;
- rtc->RTCCON &= ~(0x08|0x01);
+ writeb((readb(&rtc->RTCCON) & ~0x06) | 0x08, &rtc->RTCCON);
+ writeb(readb(&rtc->RTCCON) & ~(0x08 | 0x01), &rtc->RTCCON);
}

#endif
diff --git a/drivers/serial/serial_s3c24x0.c b/drivers/serial/serial_s3c24x0.c
index 6d69c43..af77db8 100644
--- a/drivers/serial/serial_s3c24x0.c
+++ b/drivers/serial/serial_s3c24x0.c
@@ -38,7 +38,7 @@ DECLARE_GLOBAL_DATA_PTR;

#elif defined(CONFIG_SERIAL3)
# if defined(CONFIG_TRAB)
-# #error "TRAB supports only CONFIG_SERIAL1"
+# error "TRAB supports only CONFIG_SERIAL1"
# endif
#define UART_NR S3C24X0_UART2

@@ -46,33 +46,48 @@ DECLARE_GLOBAL_DATA_PTR;
#error "Bad: you didn't configure serial ..."
#endif

+#include <asm/io.h>
+
#if defined(CONFIG_SERIAL_MULTI)
#include <serial.h>

/* Multi serial device functions */
#define DECLARE_S3C_SERIAL_FUNCTIONS(port) \
- int s3serial##port##_init (void) {\
- return serial_init_dev(port);}\
- void s3serial##port##_setbrg (void) {\
- serial_setbrg_dev(port);}\
- int s3serial##port##_getc (void) {\
- return serial_getc_dev(port);}\
- int s3serial##port##_tstc (void) {\
- return serial_tstc_dev(port);}\
- void s3serial##port##_putc (const char c) {\
- serial_putc_dev(port, c);}\
- void s3serial##port##_puts (const char *s) {\
- serial_puts_dev(port, s);}
-
-#define INIT_S3C_SERIAL_STRUCTURE(port,name,bus) {\
- name,\
- bus,\
- s3serial##port##_init,\
- s3serial##port##_setbrg,\
- s3serial##port##_getc,\
- s3serial##port##_tstc,\
- s3serial##port##_putc,\
- s3serial##port##_puts, }
+ int s3serial##port##_init(void) \
+ { \
+ return serial_init_dev(port); \
+ } \
+ void s3serial##port##_setbrg(void) \
+ { \
+ serial_setbrg_dev(port); \
+ } \
+ int s3serial##port##_getc(void) \
+ { \
+ return serial_getc_dev(port); \
+ } \
+ int s3serial##port##_tstc(void) \
+ { \
+ return serial_tstc_dev(port); \
+ } \
+ void s3serial##port##_putc(const char c) \
+ { \
+ serial_putc_dev(port, c); \
+ } \
+ void s3serial##port##_puts(const char *s) \
+ { \
+ serial_puts_dev(port, s); \
+ }
+
+#define INIT_S3C_SERIAL_STRUCTURE(port, name, bus) { \
+ name, \
+ bus, \
+ s3serial##port##_init, \
+ s3serial##port##_setbrg, \
+ s3serial##port##_getc, \
+ s3serial##port##_tstc, \
+ s3serial##port##_putc, \
+ s3serial##port##_puts, \
+}

#endif /* CONFIG_SERIAL_MULTI */

@@ -85,12 +100,13 @@ void _serial_setbrg(const int dev_index)
/* value is calculated so : (int)(PCLK/16./baudrate) -1 */
reg = get_PCLK() / (16 * gd->baudrate) - 1;

- uart->UBRDIV = reg;
- for (i = 0; i < 100; i++);
+ writel(reg, &uart->UBRDIV);
+ for (i = 0; i < 100; i++)
+ /* Delay */ ;
}
+
#if defined(CONFIG_SERIAL_MULTI)
-static inline void
-serial_setbrg_dev(unsigned int dev_index)
+static inline void serial_setbrg_dev(unsigned int dev_index)
{
_serial_setbrg(dev_index);
}
@@ -110,26 +126,26 @@ static int serial_init_dev(const int dev_index)
S3C24X0_UART * const uart = S3C24X0_GetBase_UART(dev_index);

/* FIFO enable, Tx/Rx FIFO clear */
- uart->UFCON = 0x07;
- uart->UMCON = 0x0;
+ writel(0x07, &uart->UFCON);
+ writel(0x0, &uart->UMCON);

/* Normal,No parity,1 stop,8 bit */
- uart->ULCON = 0x3;
+ writel(0x3, &uart->ULCON);
/*
* tx=level,rx=edge,disable timeout int.,enable rx error int.,
* normal,interrupt or polling
*/
- uart->UCON = 0x245;
+ writel(0x245, &uart->UCON);

#ifdef CONFIG_HWFLOW
- uart->UMCON = 0x1; /* RTS up */
+ writel(0x1, &uart->UMCON); /* RTS up */
#endif

/* FIXME: This is sooooooooooooooooooo ugly */
#if defined(CONFIG_ARCH_GTA02_v1) || defined(CONFIG_ARCH_GTA02_v2)
/* we need auto hw flow control on the gsm and gps port */
if (dev_index == 0 || dev_index == 1)
- uart->UMCON = 0x10;
+ writel(0x10, &uart->UMCON);
#endif
_serial_setbrg(dev_index);

@@ -140,7 +156,7 @@ static int serial_init_dev(const int dev_index)
/* Initialise the serial port. The settings are always 8 data bits, no parity,
* 1 stop bit, no start bits.
*/
-int serial_init (void)
+int serial_init(void)
{
return serial_init_dev(UART_NR);
}
@@ -151,40 +167,41 @@ int serial_init (void)
* otherwise. When the function is succesfull, the character read is
* written into its argument c.
*/
-int _serial_getc (const int dev_index)
+int _serial_getc(const int dev_index)
{
S3C24X0_UART * const uart = S3C24X0_GetBase_UART(dev_index);

- /* wait for character to arrive */
- while (!(uart->UTRSTAT & 0x1));
+ while (!(readl(&uart->UTRSTAT) & 0x1))
+ /* wait for character to arrive */ ;

- return uart->URXH & 0xff;
+ return readb(&uart->URXH) & 0xff;
}
+
#if defined(CONFIG_SERIAL_MULTI)
static inline int serial_getc_dev(unsigned int dev_index)
{
return _serial_getc(dev_index);
}
#else
-int serial_getc (void)
+int serial_getc(void)
{
return _serial_getc(UART_NR);
}
#endif

#ifdef CONFIG_HWFLOW
-static int hwflow = 0; /* turned off by default */
+static int hwflow; /* turned off by default */
int hwflow_onoff(int on)
{
- switch(on) {
+ switch (on) {
case 0:
default:
- break; /* return current */
+ break; /* return current */
case 1:
- hwflow = 1; /* turn on */
+ hwflow = 1; /* turn on */
break;
case -1:
- hwflow = 0; /* turn off */
+ hwflow = 0; /* turn off */
break;
}
return hwflow;
@@ -208,7 +225,7 @@ void enable_putc(void)
/*
* Output a single byte to the serial port.
*/
-void _serial_putc (const char c, const int dev_index)
+void _serial_putc(const char c, const int dev_index)
{
S3C24X0_UART * const uart = S3C24X0_GetBase_UART(dev_index);
#ifdef CONFIG_MODEM_SUPPORT
@@ -216,21 +233,21 @@ void _serial_putc (const char c, const int dev_index)
return;
#endif

- /* wait for room in the tx FIFO */
- while (!(uart->UTRSTAT & 0x2));
+ while (!(readl(&uart->UTRSTAT) & 0x2))
+ /* wait for room in the tx FIFO */ ;

#ifdef CONFIG_HWFLOW
- /* Wait for CTS up */
- while(hwflow && !(uart->UMSTAT & 0x1))
- ;
+ while (hwflow && !(readl(&uart->UMSTAT) & 0x1))
+ /* Wait for CTS up */ ;
#endif

- uart->UTXH = c;
+ writeb(c, &uart->UTXH);

/* If \n, also do \r */
if (c == '\n')
- serial_putc ('\r');
+ serial_putc('\r');
}
+
#if defined(CONFIG_SERIAL_MULTI)
static inline void serial_putc_dev(unsigned int dev_index, const char c)
{
@@ -251,11 +268,11 @@ int _serial_tstc(const int dev_index)
{
S3C24X0_UART * const uart = S3C24X0_GetBase_UART(dev_index);

- return uart->UTRSTAT & 0x1;
+ return readl(&uart->UTRSTAT) & 0x1;
}
+
#if defined(CONFIG_SERIAL_MULTI)
-static inline int
-serial_tstc_dev(unsigned int dev_index)
+static inline int serial_tstc_dev(unsigned int dev_index)
{
return _serial_tstc(dev_index);
}
@@ -269,18 +286,17 @@ int serial_tstc(void)
void _serial_puts(const char *s, const int dev_index)
{
while (*s) {
- _serial_putc (*s++, dev_index);
+ _serial_putc(*s++, dev_index);
}
}
+
#if defined(CONFIG_SERIAL_MULTI)
-static inline void
-serial_puts_dev(int dev_index, const char *s)
+static inline void serial_puts_dev(int dev_index, const char *s)
{
_serial_puts(s, dev_index);
}
#else
-void
-serial_puts (const char *s)
+void serial_puts(const char *s)
{
_serial_puts(s, UART_NR);
}
@@ -289,12 +305,11 @@ serial_puts (const char *s)
#if defined(CONFIG_SERIAL_MULTI)
DECLARE_S3C_SERIAL_FUNCTIONS(0);
struct serial_device s3c24xx_serial0_device =
- INIT_S3C_SERIAL_STRUCTURE(0, "s3ser0", "S3UART1");
+INIT_S3C_SERIAL_STRUCTURE(0, "s3ser0", "S3UART1");
DECLARE_S3C_SERIAL_FUNCTIONS(1);
struct serial_device s3c24xx_serial1_device =
- INIT_S3C_SERIAL_STRUCTURE(1, "s3ser1", "S3UART2");
+INIT_S3C_SERIAL_STRUCTURE(1, "s3ser1", "S3UART2");
DECLARE_S3C_SERIAL_FUNCTIONS(2);
struct serial_device s3c24xx_serial2_device =
- INIT_S3C_SERIAL_STRUCTURE(2, "s3ser2", "S3UART3");
-
+INIT_S3C_SERIAL_STRUCTURE(2, "s3ser2", "S3UART3");
#endif /* CONFIG_SERIAL_MULTI */
-- 1.6.0.6