From mboxrd@z Thu Jan 1 00:00:00 1970 From: Heiko Schocher Date: Thu, 09 Jul 2009 08:35:16 +0200 Subject: [U-Boot] bootcount support on arm/kirkwood In-Reply-To: <73173D32E9439E4ABB5151606C3E19E202DD54DFCC@SC-VEXCH1.marvell.com> References: <73173D32E9439E4ABB5151606C3E19E202DD54DFCC@SC-VEXCH1.marvell.com> Message-ID: <4A558FA4.7080700@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hello Prafulla, Prafulla Wadaskar wrote: >> -----Original Message----- >> From: Wolfgang Denk [mailto:wd at denx.de] >> Sent: Thursday, July 09, 2009 12:29 AM >> To: Prafulla Wadaskar >> Cc: hs at denx.de; U-Boot user list; Prabhanjan Sarnaik; Ashish Karkare >> Subject: Re: [U-Boot] bootcount support on arm/kirkwood >> >> Dear Prafulla Wadaskar, >> >> In message >> <73173D32E9439E4ABB5151606C3E19E202DD54DE86@SC-VEXCH1.marvell. >> com> you wrote: >>> >>>> I searched for some space on this CPU for implementing >> this feature, >>>> but could not find any (at least 4 bytes = 1 register), which not >>>> lost his value on a reset of this CPU. >>> There is reset counter register on Kirkwood which counts >> the time for which H/w Reset is pressed-n-hold. This is >> generally used to trigger "Factory Reset" Kind of function >> using reset key. >>> I don't think you are searching for the same. Do you? >> No, he doesn't. He needs a register that is guaranteed to >> keep it''s values across a processor reset. > > With Kirkwood, the only way to implement it is with flash assist No chance? Is there really no register/mem array which keep its value across a processor reset? There is a "Security Accelerator SRAM" on this chip. Couldn;t I use it? (I looked at it, but it seems, the SRAM gets initialized by reset, but maybe there is a way to deactivate this initialization?) thanks in advance Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany