From: Heiko Schocher <hs@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] 83xx and LCRR setting
Date: Sat, 22 Aug 2009 08:17:51 +0200 [thread overview]
Message-ID: <4A8F8D8F.50805@denx.de> (raw)
In-Reply-To: <20090821155530.27aa2c48.kim.phillips@freescale.com>
Hello Kim,
Kim Phillips wrote:
> On Thu, 20 Aug 2009 12:05:58 +0200
> Heiko Schocher <hs@denx.de> wrote:
>
>>>> On my board (and for example on the MPC832XEMDS) the flash is connected
>>>> to the localbus ... and this register setting is done, while
>>>> running from flash ... Hmm.. is this safe?
>>> yeah, I'm not quite sure how that works myself!
>> I stumbled over this, just because I didn;t set this
>> LCRR_DBYP bit, which the CPU sets after a reset, so
>> what Do you think about this patch?
>>
>> 832x, LCRR: change only the valid bits for this register
>>
>> Signed-off-by: Heiko Schocher <hs@denx.de>
>
>> +#if defined(CONFIG_MPC832x)
>> +#define LCRR_MASK 0xFFFCFFF0
>
> if it's only the DBYP bit that is set out of reset, can we make this
> 0x80000000?
Hmm.. but all the other bits are reserved=0. What happens if they
are set to 1?
bye
Heiko
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
next prev parent reply other threads:[~2009-08-22 6:17 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-08-18 13:23 [U-Boot] 83xx and LCRR setting Heiko Schocher
2009-08-20 0:31 ` Kim Phillips
2009-08-20 5:45 ` Heiko Schocher
2009-08-20 10:05 ` Heiko Schocher
2009-08-20 11:03 ` Detlev Zundel
2009-08-21 20:56 ` Kim Phillips
2009-08-22 6:32 ` Heiko Schocher
2009-08-24 10:15 ` Detlev Zundel
2009-08-24 16:43 ` Kim Phillips
2009-08-21 20:55 ` Kim Phillips
2009-08-22 6:17 ` Heiko Schocher [this message]
2009-08-24 16:32 ` Kim Phillips
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