From mboxrd@z Thu Jan 1 00:00:00 1970 From: Heiko Schocher Date: Sat, 22 Aug 2009 08:17:51 +0200 Subject: [U-Boot] 83xx and LCRR setting In-Reply-To: <20090821155530.27aa2c48.kim.phillips@freescale.com> References: <4A8AAB63.8010709@denx.de> <20090819193128.62f9a4b3.kim.phillips@freescale.com> <4A8D2006.2050800@denx.de> <20090821155530.27aa2c48.kim.phillips@freescale.com> Message-ID: <4A8F8D8F.50805@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hello Kim, Kim Phillips wrote: > On Thu, 20 Aug 2009 12:05:58 +0200 > Heiko Schocher wrote: > >>>> On my board (and for example on the MPC832XEMDS) the flash is connected >>>> to the localbus ... and this register setting is done, while >>>> running from flash ... Hmm.. is this safe? >>> yeah, I'm not quite sure how that works myself! >> I stumbled over this, just because I didn;t set this >> LCRR_DBYP bit, which the CPU sets after a reset, so >> what Do you think about this patch? >> >> 832x, LCRR: change only the valid bits for this register >> >> Signed-off-by: Heiko Schocher > >> +#if defined(CONFIG_MPC832x) >> +#define LCRR_MASK 0xFFFCFFF0 > > if it's only the DBYP bit that is set out of reset, can we make this > 0x80000000? Hmm.. but all the other bits are reserved=0. What happens if they are set to 1? bye Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany