[U-Boot] [PATCH v3] mpc83xx: update LCRR register handling

[Jerry Van Baren <gvb.uboot@gmail.com>]

Hi Heiko,

One minor critique, I had problems parsing the comment:

Heiko Schocher wrote:
> MPC8379E RM says (10-34):
> Once LCRR[CLKDIV] is written, the register should be read, and then
> an isync should be executed.
> So update this in code.
> Also define a LCRR mask for processors, which uses not all bits
                                           ^^^^^^^^^^^^^^^^^^^^^^^
Suggested change:
Also define a LCRR mask for processors to prevent setting any reserved 
bits in the LCRR register (as, for example, mpc832x did).

> in the LCRR register (as for example mpc832x did).
> 
> Signed-off-by: Heiko Schocher <hs@denx.de>

Thanks,
gvb