From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?ISO-8859-1?Q?K=E1ri_Dav=ED=F0sson?= Date: Tue, 1 Sep 2009 17:59:38 +0000 Subject: [U-Boot] invalid core multipliers? In-Reply-To: <20090901173814.GA4471@oksana.dev.rtsoft.ru> References: <20090901165902.GA6435@oksana.dev.rtsoft.ru> <607BBB57-C4BD-4E89-A70D-7AD1A8109F5C@kernel.crashing.org> <20090901173814.GA4471@oksana.dev.rtsoft.ru> Message-ID: <4A9D610A.3020206@marel.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hello, I am bootstrapping an mpc5121e board. When the cpu speed is calculated (cpu/mpc512x/speed.c) there is a comment about all core pll settings above 7 are invalid.... I can't see anything about that in the CPU documentation so I am wondering if anyone has reference to where this is defined as invalid. The board I am using is using CORE PLL index 0x8, i.e. multiplier of 4. If this comment in the code is wrong then the following patch should be o.k... Index: cpu/mpc512x/speed.c =================================================================== --- cpu/mpc512x/speed.c (revision 635) +++ cpu/mpc512x/speed.c (working copy) @@ -44,7 +44,7 @@ {1, 1}, {3, 2}, {2, 1}, {5, 2}, {3, 1}, {7, 2}, - {0, 1}, {0, 1}, /* and all above 7 are not valid too */ + {4, 1}, {0, 1}, /* and all above 7 are not valid too.... I doubt this claim */ {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 1} rg kd