[U-Boot] [PATCH 1/2] mpc52xx, mucmc52, uc101: config cleanup

[U-Boot] [PATCH 1/2] mpc52xx, mucmc52, uc101: config cleanup

[Heiko Schocher]

- as this boards are similiar, collect common config option
  in manroland-common.h
- add OF support
- update default environment

Signed-off-by: Heiko Schocher <hs@denx.de>
---
 board/mucmc52/mucmc52.c            |    7 +
 board/uc101/uc101.c                |    7 +
 include/configs/manroland-common.h |  336 ++++++++++++++++++++++++++++++++++++
 include/configs/mucmc52.h          |  256 +--------------------------
 include/configs/uc101.h            |  266 +---------------------------
 5 files changed, 368 insertions(+), 504 deletions(-)
 create mode 100644 include/configs/manroland-common.h

diff --git a/board/mucmc52/mucmc52.c b/board/mucmc52/mucmc52.c
index 7181bd8..bac49be 100644
--- a/board/mucmc52/mucmc52.c
+++ b/board/mucmc52/mucmc52.c
@@ -398,3 +398,10 @@ void pci_init_board (void)
 	pci_mpc5xxx_init (&hose);
 }
 #endif
+
+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
+void ft_board_setup(void *blob, bd_t *bd)
+{
+	ft_cpu_setup(blob, bd);
+}
+#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
diff --git a/board/uc101/uc101.c b/board/uc101/uc101.c
index 7df349f..4030b9d 100644
--- a/board/uc101/uc101.c
+++ b/board/uc101/uc101.c
@@ -371,3 +371,10 @@ void hw_watchdog_reset(void)
 	*(vu_long *)MPC5XXX_GPT0_ENABLE = GPT_OUT_0;
 }
 #endif
+
+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
+void ft_board_setup(void *blob, bd_t *bd)
+{
+	ft_cpu_setup(blob, bd);
+}
+#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
diff --git a/include/configs/manroland-common.h b/include/configs/manroland-common.h
new file mode 100644
index 0000000..7c2f2c1
--- /dev/null
+++ b/include/configs/manroland-common.h
@@ -0,0 +1,336 @@
+/*
+ * (C) Copyright 2009
+ * Heiko Schocher, DENX Software Engineering, hs at denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __MANROLAND_COMMON_H
+#define __MANROLAND_COMMON_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+#define CONFIG_MPC5xxx		1	/* This is an MPC5xxx CPU		*/
+#define CONFIG_MPC5200		1	/* (more precisely an MPC5200 CPU)	*/
+
+#define CONFIG_SYS_MPC5XXX_CLKIN	33000000 /* ... running at 33.000000MHz	*/
+
+#define BOOTFLAG_COLD		0x01	/* Normal Power-On: Boot from FLASH	*/
+#define BOOTFLAG_WARM		0x02	/* Software reboot			*/
+
+#define CONFIG_BOARD_EARLY_INIT_R
+
+#define CONFIG_HIGH_BATS	1	/* High BATs supported 			*/
+
+/*
+ * Serial console configuration
+ */
+#define CONFIG_PSC_CONSOLE	1	/* console is on PSC1	*/
+#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200,\
+					 230400 }
+
+/* Partitions */
+#define CONFIG_DOS_PARTITION
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DISPLAY
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_DTT
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_SNTP
+
+#define	CONFIG_TIMESTAMP	1	/* Print image info with timestamp */
+
+#if (TEXT_BASE == 0xFFF00000) /* Boot low */
+#   define CONFIG_SYS_LOWBOOT		1
+#endif
+
+/*
+ * Autobooting
+ */
+#define CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds */
+
+#define CONFIG_PREBOOT	"echo;" \
+	"echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
+	"echo"
+
+#undef	CONFIG_BOOTARGS
+
+#define xstr(s)	str(s)
+#define str(s)	#s
+
+#define CONFIG_EXTRA_ENV_SETTINGS					\
+	"netdev=eth0\0"							\
+	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
+		"nfsroot=${serverip}:${rootpath}\0"			\
+	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
+	"addwdt=setenv bootargs ${bootargs} wdt=off\0"			\
+	"addip=setenv bootargs ${bootargs} "				\
+		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
+		":${hostname}:${netdev}:off panic=1\0"			\
+	"kernel_addr=ff810000\0"					\
+	"fdt_addr="xstr(CONFIG_SYS_FLASH_BASE)"\0"			\
+	"flash_nfs=run nfsargs addip addcon addwdt;"			\
+		"bootm ${kernel_addr} - ${fdt_addr}\0"			\
+	"rootpath=/opt/eldk/ppc_82xx\0"					\
+	"kernel_addr_r=300000\0"					\
+	"fdt_addr_r=200000\0"						\
+	"fdt_file=" xstr(CONFIG_HOSTNAME) "/" 				\
+		xstr(CONFIG_HOSTNAME) ".dtb\0"				\
+	"kernel_file=" xstr(CONFIG_HOSTNAME) "/uImage \0" 		\
+	"load_fdt=tftp ${fdt_addr_r} ${fdt_file};\0"			\
+	"load_kernel=tftp ${kernel_addr_r} ${kernel_file};\0" 		\
+	"addcon=setenv bootargs ${bootargs} console=ttyPSC0,${baudrate}\0"\
+	"net_nfs=run load_fdt load_kernel; "				\
+		"run nfsargs addip addcon addwdt;"			\
+		"bootm ${kernel_addr_r} - ${fdt_addr_r}\0"		\
+	"u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.bin \0" 		\
+	"u-boot_addr_r=200000\0"					\
+	"load=tftp ${u-boot_addr_r} ${u-boot}\0"			\
+	"update=protect off " xstr(TEXT_BASE) " +${filesize};"		\
+		"erase " xstr(TEXT_BASE) " +${filesize};"		\
+		"cp.b ${u-boot_addr_r} " xstr(TEXT_BASE) 		\
+		" ${filesize};"						\
+		"protect on " xstr(TEXT_BASE) " +${filesize}\0"		\
+	""
+
+#define CONFIG_BOOTCOMMAND	"run net_nfs"
+
+#define CONFIG_MISC_INIT_R	1
+
+/*
+ * IPB Bus clocking configuration.
+ */
+#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK		/* define for 133MHz speed */
+
+/*
+ * I2C configuration
+ */
+#define CONFIG_HARD_I2C		1	/* I2C with hardware support */
+#define CONFIG_SYS_I2C_MODULE		2	/* Select I2C module #1 or #2 */
+
+#define CONFIG_SYS_I2C_SPEED		100000 /* 100 kHz */
+#define CONFIG_SYS_I2C_SLAVE		0x7F
+
+/*
+ * EEPROM configuration
+ */
+#define CONFIG_SYS_I2C_EEPROM_ADDR		0x58
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	10
+
+/*
+ * RTC configuration
+ */
+#define CONFIG_RTC_PCF8563
+#define CONFIG_SYS_I2C_RTC_ADDR		0x51
+
+/* I2C SYSMON (LM75) */
+#define CONFIG_DTT_LM81			1	/* ON Semi's LM75	*/
+#define CONFIG_DTT_SENSORS		{0}	/* Sensor addresses	*/
+#define CONFIG_SYS_DTT_MAX_TEMP		70
+#define CONFIG_SYS_DTT_LOW_TEMP		-30
+#define CONFIG_SYS_DTT_HYSTERESIS		3
+
+/*
+ * Flash configuration
+ */
+#define CONFIG_SYS_FLASH_BASE		0xFF800000
+
+#define CONFIG_SYS_FLASH_SIZE		0x00800000 /* 8 MByte */
+
+#define CONFIG_ENV_ADDR		(TEXT_BASE+0x40000) /* second sector */
+#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max num of flash banks
+					   (= chip selects) */
+#define CONFIG_SYS_FLASH_ERASE_TOUT	240000	/* Flash Erase Timeout [ms]*/
+#define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Flash Write Timeout [ms]*/
+
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_SYS_FLASH_EMPTY_INFO
+#define CONFIG_SYS_FLASH_CFI_AMD_RESET
+
+/*
+ * Environment settings
+ */
+#define CONFIG_ENV_IS_IN_FLASH	1
+#define CONFIG_ENV_SIZE		0x4000
+#define CONFIG_ENV_OFFSET_REDUND   (CONFIG_ENV_OFFSET+CONFIG_ENV_SECT_SIZE)
+#define CONFIG_ENV_SIZE_REDUND     (CONFIG_ENV_SIZE)
+
+/*
+ * Memory map
+ */
+#define CONFIG_SYS_MBAR		0xF0000000
+#define CONFIG_SYS_DEFAULT_MBAR	0x80000000
+
+#define CONFIG_SYS_GBL_DATA_SIZE	128
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END -\
+					 CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
+
+#define CONFIG_SYS_SDRAM_BASE		0x00000000
+#define CONFIG_SYS_SRAM_BASE	0x80100000	/* CS 1 */
+#define CONFIG_SYS_DISPLAY_BASE	0x80600000	/* CS 3 */
+
+/* Settings for XLB = 132 MHz */
+#define SDRAM_DDR	 1
+#define SDRAM_MODE      0x018D0000
+#define SDRAM_EMODE     0x40090000
+#define SDRAM_CONTROL   0x714f0f00
+#define SDRAM_CONFIG1   0x73722930
+#define SDRAM_CONFIG2   0x47770000
+#define SDRAM_TAPDELAY  0x10000000
+
+/* Use ON-Chip SRAM until RAM will be available */
+#define CONFIG_SYS_INIT_RAM_ADDR	MPC5XXX_SRAM
+#ifdef CONFIG_POST
+/* preserve space for the post_word at end of on-chip SRAM */
+#define CONFIG_SYS_INIT_RAM_END	MPC5XXX_SRAM_POST_SIZE
+#else
+#define CONFIG_SYS_INIT_RAM_END	MPC5XXX_SRAM_SIZE
+#endif
+
+#define CONFIG_SYS_MONITOR_BASE    TEXT_BASE
+#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
+#   define CONFIG_SYS_RAMBOOT		1
+#endif
+
+#define CONFIG_SYS_MONITOR_LEN		(192 << 10)
+#define CONFIG_SYS_MALLOC_LEN		(512 << 10)
+#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)
+
+/*
+ * Ethernet configuration
+ */
+#define CONFIG_MPC5xxx_FEC	1
+#define CONFIG_MPC5xxx_FEC_MII100
+#define CONFIG_PHY_ADDR		0x00
+#define CONFIG_MII		1
+
+/*use  Hardware WDT */
+#define CONFIG_HW_WATCHDOG
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CONFIG_SYS_LONGHELP			/* undef to save memory	    */
+#define CONFIG_SYS_PROMPT		"=> "	/* Monitor Command Prompt   */
+#if defined(CONFIG_CMD_KGDB)
+#define CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size  */
+#else
+#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size  */
+#endif
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
+#define CONFIG_SYS_MAXARGS		16	/* max number of command args*/
+#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
+
+/* Enable an alternate, more extensive memory test */
+#define CONFIG_SYS_ALT_MEMTEST
+
+#define CONFIG_SYS_HZ			1000	/* decrementer freq: 1 ms ticks */
+
+#define CONFIG_SYS_CACHELINE_SIZE	32	/* For MPC5xxx CPUs		*/
+#if defined(CONFIG_CMD_KGDB)
+#  define CONFIG_SYS_CACHELINE_SHIFT	5	/* log base 2 of the above value*/
+#endif
+
+/*
+ * Enable loopw command.
+ */
+#define CONFIG_LOOPW
+
+/*
+ * Various low-level settings
+ */
+#if defined(CONFIG_MPC5200)
+#define CONFIG_SYS_HID0_INIT		HID0_ICE | HID0_ICFI
+#define CONFIG_SYS_HID0_FINAL		HID0_ICE
+#else
+#define CONFIG_SYS_HID0_INIT		0
+#define CONFIG_SYS_HID0_FINAL		0
+#endif
+
+#define CONFIG_SYS_BOOTCS_START	CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_BOOTCS_SIZE		CONFIG_SYS_FLASH_SIZE
+#define CONFIG_SYS_CS0_START		CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_CS0_SIZE		CONFIG_SYS_FLASH_SIZE
+
+/* 8Mbit SRAM @0x80100000 */
+#define CONFIG_SYS_CS1_START		CONFIG_SYS_SRAM_BASE
+
+#define CONFIG_SYS_CS_BURST		0x00000000
+#define CONFIG_SYS_CS_DEADCYCLE	0x33333333
+
+/*-----------------------------------------------------------------------
+ * IDE/ATA stuff Supports IDE harddisk
+ *-----------------------------------------------------------------------
+ */
+
+#undef  CONFIG_IDE_8xx_PCCARD		/* Use IDE with PC Card	Adapter	*/
+
+#undef	CONFIG_IDE_8xx_DIRECT		/* Direct IDE    not supported	*/
+#undef	CONFIG_IDE_LED			/* LED   for ide not supported	*/
+
+#define CONFIG_SYS_IDE_MAXBUS		1	/* max. 1 IDE bus	*/
+
+#define CONFIG_IDE_PREINIT	1
+
+#define CONFIG_SYS_ATA_IDE0_OFFSET	0x0000
+
+#define CONFIG_SYS_ATA_BASE_ADDR	MPC5XXX_ATA
+
+/* Offset for data I/O			*/
+#define CONFIG_SYS_ATA_DATA_OFFSET	(0x0060)
+
+/* Offset for normal register accesses	*/
+#define CONFIG_SYS_ATA_REG_OFFSET	(CONFIG_SYS_ATA_DATA_OFFSET)
+
+/* Offset for alternate registers	*/
+#define CONFIG_SYS_ATA_ALT_OFFSET	(0x005C)
+
+/* Interval between registers	*/
+#define CONFIG_SYS_ATA_STRIDE          4
+
+#define CONFIG_ATAPI            1
+
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT	1
+#define CONFIG_OF_BOARD_SETUP	1
+
+#define OF_CPU			"PowerPC,5200 at 0"
+#define OF_SOC			"soc5200 at f0000000"
+#define OF_TBCLK		(bd->bi_busfreq / 4)
+#define OF_STDOUT_PATH		"/soc5200 at f0000000/serial at 2000"
+
+#endif /* __MANROLAND_COMMON_H */
diff --git a/include/configs/mucmc52.h b/include/configs/mucmc52.h
index ae60cd2..e0e6751 100644
--- a/include/configs/mucmc52.h
+++ b/include/configs/mucmc52.h
@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2008
+ * (C) Copyright 2008-2009
  * Heiko Schocher, DENX Software Engineering, hs at denx.de.
  *
  * (C) Copyright 2003-2005
@@ -32,260 +32,50 @@
  * (easy to change)
  */

-#define	CONFIG_MPC5xxx		1	/* This is an MPC5xxx CPU		*/
-#define	CONFIG_MPC5200		1	/* (more precisely an MPC5200 CPU)	*/
-#define	CONFIG_MUCMC52		1	/* MUCMC52 board			*/
+#define	CONFIG_MUCMC52		1	/* MUCMC52 board	*/
+#define CONFIG_HOSTNAME		mucmc52

-#define	CONFIG_SYS_MPC5XXX_CLKIN	33000000 /* ... running at 33.000000MHz		*/
-
-#define	BOOTFLAG_COLD		0x01	/* Normal Power-On: Boot from FLASH	*/
-#define	BOOTFLAG_WARM		0x02	/* Software reboot			*/
-
-#define	CONFIG_SYS_CACHELINE_SIZE	32	/* For MPC5xxx CPUs			*/
-#if (CONFIG_COMMANDS & CONFIG_SYS_CMD_KGDB)
-#  define	CONFIG_SYS_CACHELINE_SHIFT	5	/* log base 2 of the above value	*/
-#endif
-
-#define	CONFIG_BOARD_EARLY_INIT_R
+#include "manroland-common.h"

 #define	CONFIG_LAST_STAGE_INIT
-
-#define	CONFIG_HIGH_BATS	1	/* High BATs supported			*/
 /*
  * Serial console configuration
  */
-#define	CONFIG_PSC_CONSOLE	1	/* console is on PSC1	*/
 #define	CONFIG_BAUDRATE		38400	/* ... at 38400 bps	*/
-#define	CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 230400 }
-
-/* Partitions */
-#define	CONFIG_DOS_PARTITION

-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define	CONFIG_CMD_DATE
-#define	CONFIG_CMD_DISPLAY
-#define	CONFIG_CMD_DHCP
-#define	CONFIG_CMD_EEPROM
-#define	CONFIG_CMD_FAT
-#define	CONFIG_CMD_I2C
-#define	CONFIG_CMD_DTT
-#define	CONFIG_CMD_IDE
-#define	CONFIG_CMD_MII
-#define	CONFIG_CMD_NFS
 #define	CONFIG_CMD_PCI
-#define	CONFIG_CMD_PING
-#define	CONFIG_CMD_SNTP
-
-#define	CONFIG_TIMESTAMP	1	/* Print image info with timestamp */
-
-#if (TEXT_BASE == 0xFFF00000) /* Boot low */
-#   define	CONFIG_SYS_LOWBOOT		1
-#endif
-
-/*
- * Autobooting
- */
-#define	CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds */
-
-#define	CONFIG_PREBOOT	"echo;" \
-	"echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
-	"echo"
-
-#undef	CONFIG_BOOTARGS
-
-#define	CONFIG_EXTRA_ENV_SETTINGS					\
-	"netdev=eth0\0"							\
-	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
-		"nfsroot=${serverip}:${rootpath}\0"			\
-	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
-	"addip=setenv bootargs ${bootargs} "				\
-		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
-		":${hostname}:${netdev}:off panic=1\0"			\
-	"flash_nfs=run nfsargs addip;"					\
-		"bootm ${kernel_addr}\0"				\
-	"net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0"	\
-	"rootpath=/opt/eldk/ppc_82xx\0"					\
-	""
-
-#define	CONFIG_BOOTCOMMAND	"run net_nfs"
-
-#define	CONFIG_MISC_INIT_R	1
-
-/*
- * IPB Bus clocking configuration.
- */
-#undef	CONFIG_SYS_IPBCLK_EQUALS_XLBCLK		/* define for 133MHz speed */
-
-/*
- * I2C configuration
- */
-#define	CONFIG_HARD_I2C		1	/* I2C with hardware support */
-#define	CONFIG_SYS_I2C_MODULE		2	/* Select I2C module #1 or #2 */
-
-#define	CONFIG_SYS_I2C_SPEED		100000 /* 100 kHz */
-#define	CONFIG_SYS_I2C_SLAVE		0x7F
-
-/*
- * EEPROM configuration
- */
-#define	CONFIG_SYS_I2C_EEPROM_ADDR		0x58
-#define	CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
-#define	CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
-#define	CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	10
-
-/*
- * RTC configuration
- */
-#define	CONFIG_RTC_PCF8563
-#define	CONFIG_SYS_I2C_RTC_ADDR		0x51
-
-/* I2C SYSMON (LM75) */
-#define	CONFIG_DTT_LM81			1	/* ON Semi's LM75		*/
-#define	CONFIG_DTT_SENSORS		{0}	/* Sensor addresses		*/
-#define	CONFIG_SYS_DTT_MAX_TEMP		70
-#define	CONFIG_SYS_DTT_LOW_TEMP		-30
-#define	CONFIG_SYS_DTT_HYSTERESIS		3

 /*
  * Flash configuration
  */
-#define	CONFIG_SYS_FLASH_BASE		0xFF800000
-
-#define	CONFIG_SYS_FLASH_SIZE		0x00800000 /* 8 MByte */
-#define	CONFIG_SYS_MAX_FLASH_SECT	67	/* max num of sects on one chip */
-
-#define	CONFIG_ENV_ADDR		(TEXT_BASE+0x40000) /* second sector */
-#define	CONFIG_SYS_MAX_FLASH_BANKS	1	/* max num of flash banks
-					   (= chip selects) */
-#define	CONFIG_SYS_FLASH_ERASE_TOUT	240000	/* Flash Erase Timeout (in ms)	*/
-#define	CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Flash Write Timeout (in ms)	*/
-
-#define	CONFIG_FLASH_CFI_DRIVER
-#define	CONFIG_SYS_FLASH_CFI
-#define	CONFIG_SYS_FLASH_EMPTY_INFO
-#define	CONFIG_SYS_FLASH_CFI_AMD_RESET
+#define	CONFIG_SYS_MAX_FLASH_SECT	67

 /*
  * Environment settings
  */
-#define	CONFIG_ENV_IS_IN_FLASH	1
-#define	CONFIG_ENV_SIZE		0x4000
 #define	CONFIG_ENV_SECT_SIZE	0x20000
-#define	CONFIG_ENV_OFFSET_REDUND   (CONFIG_ENV_OFFSET+CONFIG_ENV_SECT_SIZE)
-#define	CONFIG_ENV_SIZE_REDUND     (CONFIG_ENV_SIZE)

 /*
  * Memory map
  */
-#define	CONFIG_SYS_MBAR		0xF0000000
-#define	CONFIG_SYS_SDRAM_BASE		0x00000000
-#define	CONFIG_SYS_DEFAULT_MBAR	0x80000000
-#define	CONFIG_SYS_DISPLAY_BASE	0x80600000
 #define	CONFIG_SYS_STATUS1_BASE	0x80600200
 #define	CONFIG_SYS_STATUS2_BASE	0x80600300
 #define	CONFIG_SYS_PMI_UNI_BASE	0x80800000
 #define	CONFIG_SYS_PMI_BROAD_BASE	0x80810000

-/* Settings for XLB = 132 MHz */
-#define	SDRAM_DDR	 1
-#define	SDRAM_MODE      0x018D0000
-#define	SDRAM_EMODE     0x40090000
-#define	SDRAM_CONTROL   0x714f0f00
-#define	SDRAM_CONFIG1   0x73722930
-#define	SDRAM_CONFIG2   0x47770000
-#define	SDRAM_TAPDELAY  0x10000000
-
-/* Use ON-Chip SRAM until RAM will be available */
-#define	CONFIG_SYS_INIT_RAM_ADDR	MPC5XXX_SRAM
-#ifdef CONFIG_POST
-/* preserve space for the post_word at end of on-chip SRAM */
-#define	CONFIG_SYS_INIT_RAM_END	MPC5XXX_SRAM_POST_SIZE
-#else
-#define	CONFIG_SYS_INIT_RAM_END	MPC5XXX_SRAM_SIZE
-#endif
-
-#define	CONFIG_SYS_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */
-#define	CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
-#define	CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
-
-#define	CONFIG_SYS_MONITOR_BASE	TEXT_BASE
-#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
-#   define	CONFIG_SYS_RAMBOOT	1
-#endif
-
-#define	CONFIG_SYS_MONITOR_LEN		(192 << 10)	/* Reserve 192 kB for Monitor	*/
-#define	CONFIG_SYS_MALLOC_LEN		(512 << 10)	/* Reserve 128 kB for malloc()	*/
-#define	CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
-
-/*
- * Ethernet configuration
- */
-#define	CONFIG_MPC5xxx_FEC	1
-#define CONFIG_MPC5xxx_FEC_MII100
-#define	CONFIG_PHY_ADDR		0x00
-#define	CONFIG_MII		1		/* MII PHY management		*/
-
 /*
  * GPIO configuration
  */
 #define	CONFIG_SYS_GPS_PORT_CONFIG	0x8D550644

-/*use  Hardware WDT */
-#define CONFIG_HW_WATCHDOG
+#define	CONFIG_SYS_MEMTEST_START	0x00100000
+#define	CONFIG_SYS_MEMTEST_END		0x00f00000

-/*
- * Miscellaneous configurable options
- */
-#define	CONFIG_SYS_LONGHELP			/* undef to save memory	    */
-#define	CONFIG_SYS_PROMPT		"=> "	/* Monitor Command Prompt   */
-#if (CONFIG_COMMANDS & CONFIG_SYS_CMD_KGDB)
-#define	CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size  */
-#else
-#define	CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size  */
-#endif
-#define	CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define	CONFIG_SYS_MAXARGS		16	/* max number of command args	*/
-#define	CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/
-
-/* Enable an alternate, more extensive memory test */
-#define	CONFIG_SYS_ALT_MEMTEST
-
-#define	CONFIG_SYS_MEMTEST_START	0x00100000	/* memtest works on */
-#define	CONFIG_SYS_MEMTEST_END		0x00f00000	/* 1 ... 15 MB in DRAM	*/
+#define	CONFIG_SYS_LOAD_ADDR		0x100000

-#define	CONFIG_SYS_LOAD_ADDR		0x100000	/* default load address */
-
-#define	CONFIG_SYS_HZ			1000	/* decrementer freq: 1 ms ticks */
-
-/*
- * Enable loopw commando. This has only affect, if CONFIG_SYS_CMD_MEM is defined,
- * which is normally part of the default commands (CFV_CMD_DFL)
- */
-#define	CONFIG_LOOPW
-
-/*
- * Various low-level settings
- */
-#if defined(CONFIG_MPC5200)
-#define	CONFIG_SYS_HID0_INIT		HID0_ICE | HID0_ICFI
-#define	CONFIG_SYS_HID0_FINAL		HID0_ICE
-#else
-#define	CONFIG_SYS_HID0_INIT		0
-#define	CONFIG_SYS_HID0_FINAL		0
-#endif
-
-#define	CONFIG_SYS_BOOTCS_START	CONFIG_SYS_FLASH_BASE
-#define	CONFIG_SYS_BOOTCS_SIZE		CONFIG_SYS_FLASH_SIZE
 #define	CONFIG_SYS_BOOTCS_CFG		0x0004FB00
-#define	CONFIG_SYS_CS0_START		CONFIG_SYS_FLASH_BASE
-#define	CONFIG_SYS_CS0_SIZE		CONFIG_SYS_FLASH_SIZE

 /* 8Mbit SRAM @0x80100000 */
-#define	CONFIG_SYS_CS1_START		0x80100000
 #define	CONFIG_SYS_CS1_SIZE		0x00100000
 #define	CONFIG_SYS_CS1_CFG		0x00019B00

@@ -309,42 +99,12 @@
 #define	CONFIG_SYS_CS7_SIZE		0x00008000
 #define	CONFIG_SYS_CS7_CFG		0xFF00F930

-#define	CONFIG_SYS_CS_BURST		0x00000000
-#define	CONFIG_SYS_CS_DEADCYCLE	0x33333333
-
 /*-----------------------------------------------------------------------
  * IDE/ATA stuff Supports IDE harddisk
  *-----------------------------------------------------------------------
  */
-
-#undef	CONFIG_IDE_8xx_PCCARD		/* Use IDE with PC Card	Adapter	*/
-
-#undef	CONFIG_IDE_8xx_DIRECT		/* Direct IDE    not supported	*/
-#undef	CONFIG_IDE_LED			/* LED   for ide not supported	*/
-
-#define	CONFIG_SYS_IDE_MAXBUS		1	/* max. 1 IDE bus		*/
 #define	CONFIG_SYS_IDE_MAXDEVICE	1	/* max. 2 drives per IDE bus	*/

-#define	CONFIG_IDE_PREINIT	1
-
-#define	CONFIG_SYS_ATA_IDE0_OFFSET	0x0000
-
-#define	CONFIG_SYS_ATA_BASE_ADDR	MPC5XXX_ATA
-
-/* Offset for data I/O			*/
-#define	CONFIG_SYS_ATA_DATA_OFFSET	(0x0060)
-
-/* Offset for normal register accesses	*/
-#define	CONFIG_SYS_ATA_REG_OFFSET	(CONFIG_SYS_ATA_DATA_OFFSET)
-
-/* Offset for alternate registers	*/
-#define	CONFIG_SYS_ATA_ALT_OFFSET	(0x005C)
-
-/* Interval between registers           */
-#define	CONFIG_SYS_ATA_STRIDE          4
-
-#define	CONFIG_ATAPI            1
-
 /*
  * PCI Mapping:
  * 0x40000000 - 0x4fffffff - PCI Memory
diff --git a/include/configs/uc101.h b/include/configs/uc101.h
index 87cb4e5..deb385f 100644
--- a/include/configs/uc101.h
+++ b/include/configs/uc101.h
@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2003-2006
+ * (C) Copyright 2003-2009
  * Heiko Schocher, DENX Software Engineering, hs at denx.de.
  *
  * See file CREDITS for list of people who contributed to this
@@ -29,29 +29,15 @@
  * (easy to change)
  */

-#define CONFIG_MPC5xxx		1	/* This is an MPC5xxx CPU		*/
-#define CONFIG_MPC5200		1	/* (more precisely an MPC5200 CPU)	*/
-#define CONFIG_UC101		1	/* UC101 board			*/
+#define CONFIG_UC101		1	/* UC101 board		*/
+#define CONFIG_HOSTNAME		uc101

-#define CONFIG_SYS_MPC5XXX_CLKIN	33000000 /* ... running at 33.000000MHz		*/
-
-#define BOOTFLAG_COLD		0x01	/* Normal Power-On: Boot from FLASH	*/
-#define BOOTFLAG_WARM		0x02	/* Software reboot			*/
-
-#define CONFIG_BOARD_EARLY_INIT_R
-
-#define CONFIG_HIGH_BATS	1	/* High BATs supported 			*/
+#include "manroland-common.h"

 /*
  * Serial console configuration
  */
-#define CONFIG_PSC_CONSOLE	1	/* console is on PSC1	*/
 #define CONFIG_BAUDRATE		115200	/* ... at 115200 bps	*/
-#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 230400 }
-
-/* Partitions */
-#define CONFIG_DOS_PARTITION
-

 /*
  * BOOTP options
@@ -61,243 +47,40 @@
 #define CONFIG_BOOTP_GATEWAY
 #define CONFIG_BOOTP_HOSTNAME

-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_DATE
-#define CONFIG_CMD_DISPLAY
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_EEPROM
-#define CONFIG_CMD_I2C
-#define CONFIG_CMD_DTT
-#define CONFIG_CMD_IDE
-#define CONFIG_CMD_FAT
-#define CONFIG_CMD_NFS
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_SNTP
-
-
-#define	CONFIG_TIMESTAMP	1	/* Print image info with timestamp */
-
-#if (TEXT_BASE == 0xFFF00000) /* Boot low */
-#   define CONFIG_SYS_LOWBOOT		1
-#endif
-
-/*
- * Autobooting
- */
-#define CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds */
-
-#define CONFIG_PREBOOT	"echo;" \
-	"echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
-	"echo"
-
-#undef	CONFIG_BOOTARGS
-
-#define CONFIG_EXTRA_ENV_SETTINGS					\
-	"netdev=eth0\0"							\
-	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
-		"nfsroot=${serverip}:${rootpath}\0"			\
-	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
-	"addwdt=setenv bootargs ${bootargs} wdt=off"			\
-	"addip=setenv bootargs ${bootargs} "				\
-		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
-		":${hostname}:${netdev}:off panic=1\0"			\
-	"flash_nfs=run nfsargs addip;"					\
-		"bootm ${kernel_addr}\0"				\
-	"net_nfs=tftp 300000 ${bootfile};run nfsargs addip addwdt;bootm\0" \
-	"rootpath=/opt/eldk/ppc_82xx\0"					\
-	""
-
-#define CONFIG_BOOTCOMMAND	"run net_nfs"
-
-#define CONFIG_MISC_INIT_R	1
-
-/*
- * IPB Bus clocking configuration.
- */
-#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK		/* define for 133MHz speed */
-
-/*
- * I2C configuration
- */
-#define CONFIG_HARD_I2C		1	/* I2C with hardware support */
-#define CONFIG_SYS_I2C_MODULE		2	/* Select I2C module #1 or #2 */
-
-#define CONFIG_SYS_I2C_SPEED		100000 /* 100 kHz */
-#define CONFIG_SYS_I2C_SLAVE		0x7F
-
-/*
- * EEPROM configuration
- */
-#define CONFIG_SYS_I2C_EEPROM_ADDR		0x58
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	10
-
-/*
- * RTC configuration
- */
-#define CONFIG_RTC_PCF8563
-#define CONFIG_SYS_I2C_RTC_ADDR		0x51
-
-/* I2C SYSMON (LM75) */
-#define CONFIG_DTT_LM81			1	/* ON Semi's LM75		*/
-#define CONFIG_DTT_SENSORS		{0}	/* Sensor addresses		*/
-#define CONFIG_SYS_DTT_MAX_TEMP		70
-#define CONFIG_SYS_DTT_LOW_TEMP		-30
-#define CONFIG_SYS_DTT_HYSTERESIS		3
-
 /*
  * Flash configuration
  */
-#define CONFIG_SYS_FLASH_BASE		0xFF800000
-
-#define CONFIG_SYS_FLASH_SIZE		0x00800000 /* 8 MByte */
-#define CONFIG_SYS_MAX_FLASH_SECT	140	/* max num of sects on one chip */
-
-#define CONFIG_ENV_ADDR		(TEXT_BASE+0x40000) /* second sector */
-#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max num of flash banks
-					   (= chip selects) */
-#define CONFIG_SYS_FLASH_ERASE_TOUT	240000	/* Flash Erase Timeout (in ms)	*/
-#define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Flash Write Timeout (in ms)	*/
-
-#define CONFIG_FLASH_CFI_DRIVER
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_SYS_FLASH_EMPTY_INFO
-#define CONFIG_SYS_FLASH_CFI_AMD_RESET
+#define CONFIG_SYS_MAX_FLASH_SECT	140

 /*
  * Environment settings
  */
-#define CONFIG_ENV_IS_IN_FLASH	1
-#define CONFIG_ENV_SIZE		0x4000
 #define CONFIG_ENV_SECT_SIZE	0x10000
-#define CONFIG_ENV_OFFSET_REDUND   (CONFIG_ENV_OFFSET+CONFIG_ENV_SECT_SIZE)
-#define CONFIG_ENV_SIZE_REDUND     (CONFIG_ENV_SIZE)

 /*
  * Memory map
  */
-#define CONFIG_SYS_MBAR		0xF0000000
-#define CONFIG_SYS_DEFAULT_MBAR	0x80000000
-
-#define CONFIG_SYS_SDRAM_BASE		0x00000000
-#define CONFIG_SYS_SRAM_BASE		0x80100000	/* CS 1 */
-#define CONFIG_SYS_DISPLAY_BASE	0x80600000	/* CS 3 */
 #define	CONFIG_SYS_IB_MASTER		0xc0510000	/* CS 6 */
 #define CONFIG_SYS_IB_EPLD		0xc0500000	/* CS 7 */

-/* Settings for XLB = 132 MHz */
-#define SDRAM_DDR	 1
-#define SDRAM_MODE      0x018D0000
-#define SDRAM_EMODE     0x40090000
-#define SDRAM_CONTROL   0x714f0f00
-#define SDRAM_CONFIG1   0x73722930
-#define SDRAM_CONFIG2   0x47770000
-#define SDRAM_TAPDELAY  0x10000000
-
 /* SRAM */
-#define SRAM_BASE		CONFIG_SYS_SRAM_BASE	/* SRAM base address	*/
+#define SRAM_BASE		CONFIG_SYS_SRAM_BASE
 #define SRAM_LEN		0x1fffff
 #define SRAM_END		(SRAM_BASE + SRAM_LEN)

-/* Use ON-Chip SRAM until RAM will be available */
-#define CONFIG_SYS_INIT_RAM_ADDR	MPC5XXX_SRAM
-#ifdef CONFIG_POST
-/* preserve space for the post_word at end of on-chip SRAM */
-#define CONFIG_SYS_INIT_RAM_END	MPC5XXX_SRAM_POST_SIZE
-#else
-#define CONFIG_SYS_INIT_RAM_END	MPC5XXX_SRAM_SIZE
-#endif
-
-
-#define CONFIG_SYS_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
-
-#define CONFIG_SYS_MONITOR_BASE    TEXT_BASE
-#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
-#   define CONFIG_SYS_RAMBOOT		1
-#endif
-
-#define CONFIG_SYS_MONITOR_LEN		(192 << 10)	/* Reserve 192 kB for Monitor	*/
-#define CONFIG_SYS_MALLOC_LEN		(512 << 10)	/* Reserve 128 kB for malloc()	*/
-#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
-
-/*
- * Ethernet configuration
- */
-#define CONFIG_MPC5xxx_FEC	1
-#define CONFIG_MPC5xxx_FEC_MII100
-#define CONFIG_PHY_ADDR		0x00
-#define CONFIG_MII		1
-
 /*
  * GPIO configuration
  */
 #define CONFIG_SYS_GPS_PORT_CONFIG	0x4d558044

-/*use  Hardware WDT */
-#define CONFIG_HW_WATCHDOG
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP			/* undef to save memory	    */
-#define CONFIG_SYS_PROMPT		"=> "	/* Monitor Command Prompt   */
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size  */
-#else
-#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size  */
-#endif
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS		16	/* max number of command args	*/
-#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/
-
-/* Enable an alternate, more extensive memory test */
-#define CONFIG_SYS_ALT_MEMTEST
-
-#define CONFIG_SYS_MEMTEST_START	0x00300000	/* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x00f00000	/* 3 ... 15 MB in DRAM	*/
-
-#define CONFIG_SYS_LOAD_ADDR		0x300000	/* default load address */
+#define CONFIG_SYS_MEMTEST_START	0x00300000
+#define CONFIG_SYS_MEMTEST_END		0x00f00000

-#define CONFIG_SYS_HZ			1000	/* decrementer freq: 1 ms ticks */
+#define CONFIG_SYS_LOAD_ADDR		0x300000

-#define CONFIG_SYS_CACHELINE_SIZE	32	/* For MPC5xxx CPUs			*/
-#if defined(CONFIG_CMD_KGDB)
-#  define CONFIG_SYS_CACHELINE_SHIFT	5	/* log base 2 of the above value	*/
-#endif
-
-/*
- * Enable loopw command.
- */
-#define CONFIG_LOOPW
-
-/*
- * Various low-level settings
- */
-#if defined(CONFIG_MPC5200)
-#define CONFIG_SYS_HID0_INIT		HID0_ICE | HID0_ICFI
-#define CONFIG_SYS_HID0_FINAL		HID0_ICE
-#else
-#define CONFIG_SYS_HID0_INIT		0
-#define CONFIG_SYS_HID0_FINAL		0
-#endif
-
-#define CONFIG_SYS_BOOTCS_START	CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_BOOTCS_SIZE		CONFIG_SYS_FLASH_SIZE
 #define CONFIG_SYS_BOOTCS_CFG		0x00045D00
-#define CONFIG_SYS_CS0_START		CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_CS0_SIZE		CONFIG_SYS_FLASH_SIZE

 /* 8Mbit SRAM @0x80100000 */
-#define CONFIG_SYS_CS1_START		CONFIG_SYS_SRAM_BASE
 #define CONFIG_SYS_CS1_SIZE		0x00200000
 #define CONFIG_SYS_CS1_CFG		0x21D00

@@ -316,41 +99,12 @@
 #define CONFIG_SYS_CS7_SIZE		0x00010000
 #define CONFIG_SYS_CS7_CFG		0x00081800

-#define CONFIG_SYS_CS_BURST		0x00000000
-#define CONFIG_SYS_CS_DEADCYCLE	0x33333333
-
 /*-----------------------------------------------------------------------
  * IDE/ATA stuff Supports IDE harddisk
  *-----------------------------------------------------------------------
  */

-#undef  CONFIG_IDE_8xx_PCCARD		/* Use IDE with PC Card	Adapter	*/
-
-#undef	CONFIG_IDE_8xx_DIRECT		/* Direct IDE    not supported	*/
-#undef	CONFIG_IDE_LED			/* LED   for ide not supported	*/
-
-#define CONFIG_SYS_IDE_MAXBUS		1	/* max. 1 IDE bus		*/
-#define CONFIG_SYS_IDE_MAXDEVICE	2	/* max. 2 drives per IDE bus	*/
-
-#define CONFIG_IDE_PREINIT	1
-
-#define CONFIG_SYS_ATA_IDE0_OFFSET	0x0000
-
-#define CONFIG_SYS_ATA_BASE_ADDR	MPC5XXX_ATA
-
-/* Offset for data I/O			*/
-#define CONFIG_SYS_ATA_DATA_OFFSET	(0x0060)
-
-/* Offset for normal register accesses	*/
-#define CONFIG_SYS_ATA_REG_OFFSET	(CONFIG_SYS_ATA_DATA_OFFSET)
-
-/* Offset for alternate registers	*/
-#define CONFIG_SYS_ATA_ALT_OFFSET	(0x005C)
-
-/* Interval between registers                                                */
-#define CONFIG_SYS_ATA_STRIDE          4
-
-#define CONFIG_ATAPI            1
+#define CONFIG_SYS_IDE_MAXDEVICE	1	/* max. 2 drives per IDE bus*/

 /*---------------------------------------------------------------------*/
 /* Display addresses						       */
-- 
1.6.0.6

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

[U-Boot] [PATCH 1/2] mpc52xx, mucmc52, uc101: config cleanup

[Wolfgang Denk]

Dear Heiko Schocher,

In message <4AA755CD.8050807@denx.de> you wrote:
> - as this boards are similiar, collect common config option
>   in manroland-common.h
> - add OF support
> - update default environment
> 
> Signed-off-by: Heiko Schocher <hs@denx.de>
> ---
>  board/mucmc52/mucmc52.c            |    7 +
>  board/uc101/uc101.c                |    7 +
>  include/configs/manroland-common.h |  336 ++++++++++++++++++++++++++++++++++++
>  include/configs/mucmc52.h          |  256 +--------------------------
>  include/configs/uc101.h            |  266 +---------------------------
>  5 files changed, 368 insertions(+), 504 deletions(-)
>  create mode 100644 include/configs/manroland-common.h

Applied to mpc5xxx repo.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Drawing on my fine command of language, I said nothing.

[U-Boot] [PATCH 1/2] mpc52xx, mucmc52, uc101: config cleanup

[Detlev Zundel]

Hi Heiko,

> - as this boards are similiar, collect common config option
>   in manroland-common.h
> - add OF support
> - update default environment
>
> Signed-off-by: Heiko Schocher <hs@denx.de>
> ---
>  board/mucmc52/mucmc52.c            |    7 +
>  board/uc101/uc101.c                |    7 +
>  include/configs/manroland-common.h |  336 ++++++++++++++++++++++++++++++++++++
>  include/configs/mucmc52.h          |  256 +--------------------------
>  include/configs/uc101.h            |  266 +---------------------------
>  5 files changed, 368 insertions(+), 504 deletions(-)
>  create mode 100644 include/configs/manroland-common.h

[...]

> + * High Level Configuration Options
> + * (easy to change)
> + */
> +#define CONFIG_MPC5xxx		1	/* This is an MPC5xxx CPU		*/
> +#define CONFIG_MPC5200		1	/* (more precisely an MPC5200 CPU)	*/
> +
> +#define CONFIG_SYS_MPC5XXX_CLKIN	33000000 /* ... running at 33.000000MHz	*/

Are you sure that this is a good choice to put in a manufacturer common
header file?  Isn't the probability of this becoming incorrect nearly
100% for the next board from this manufacturer?

I'd advise to keep CPU stuff in the individual board config files -
maybe, if you really want, create a "manroland-mpc52xx-common.h". The
rest of the common configs should be re-evaluated in the same spirit.

Cheers
  Detlev

-- 
LISP has  jokingly been  described as  "the most  intelligent way to  misuse a
computer".  I think that  description a great  compliment because it transmits
the full  flavour of  liberation:  it has assisted a number of our most gifted
fellow humans in thinking previously impossible thoughts. - Edsger W. Dijkstra
--
DENX Software Engineering GmbH,      MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich,  Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: dzu at denx.de

[U-Boot] [PATCH 1/2] mpc52xx, mucmc52, uc101: config cleanup

[Wolfgang Denk]

Dear Detlev Zundel,

In message <m27hw8cozk.fsf@ohwell.denx.de> you wrote:
> 
> > +#define CONFIG_MPC5xxx		1	/* This is an MPC5xxx CPU		*/
> > +#define CONFIG_MPC5200		1	/* (more precisely an MPC5200 CPU)	*/
> > +
> > +#define CONFIG_SYS_MPC5XXX_CLKIN	33000000 /* ... running at 33.000000MHz	*/
> 
> Are you sure that this is a good choice to put in a manufacturer common
> header file?  Isn't the probability of this becoming incorrect nearly
> 100% for the next board from this manufacturer?
> 
> I'd advise to keep CPU stuff in the individual board config files -
> maybe, if you really want, create a "manroland-mpc52xx-common.h". The
> rest of the common configs should be re-evaluated in the same spirit.

And right you are.  Thanks for pointing out.

Heiko, please rework. I haven't pushed the repo out yet, so I just
remove that commit again.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Every solution breeds new problems.

[U-Boot] [PATCHv2 1/2] mpc52xx, mucmc52, uc101: config cleanup

[Heiko Schocher]

- as this boards are similiar, collect common config option
  in manroland-common.h and manroland-mpc52xx-common.h
  for mpc52xx specific common options for this manufacturer.
- add OF support
- update default environment

Signed-off-by: Heiko Schocher <hs@denx.de>
---

- changes since v1:
  added suggestion from Detlev Zundel, to collect mpc52xx specific
  config options in manroland-mpc52xx-common.h

 board/mucmc52/mucmc52.c                    |    7 +
 board/uc101/uc101.c                        |    7 +
 include/configs/manroland-common.h         |  139 +++++++++++++++
 include/configs/manroland-mpc52xx-common.h |  230 ++++++++++++++++++++++++
 include/configs/mucmc52.h                  |  257 +--------------------------
 include/configs/uc101.h                    |  267 ++--------------------------
 6 files changed, 403 insertions(+), 504 deletions(-)
 create mode 100644 include/configs/manroland-common.h
 create mode 100644 include/configs/manroland-mpc52xx-common.h

diff --git a/board/mucmc52/mucmc52.c b/board/mucmc52/mucmc52.c
index 7181bd8..bac49be 100644
--- a/board/mucmc52/mucmc52.c
+++ b/board/mucmc52/mucmc52.c
@@ -398,3 +398,10 @@ void pci_init_board (void)
 	pci_mpc5xxx_init (&hose);
 }
 #endif
+
+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
+void ft_board_setup(void *blob, bd_t *bd)
+{
+	ft_cpu_setup(blob, bd);
+}
+#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
diff --git a/board/uc101/uc101.c b/board/uc101/uc101.c
index 7df349f..4030b9d 100644
--- a/board/uc101/uc101.c
+++ b/board/uc101/uc101.c
@@ -371,3 +371,10 @@ void hw_watchdog_reset(void)
 	*(vu_long *)MPC5XXX_GPT0_ENABLE = GPT_OUT_0;
 }
 #endif
+
+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
+void ft_board_setup(void *blob, bd_t *bd)
+{
+	ft_cpu_setup(blob, bd);
+}
+#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
diff --git a/include/configs/manroland-common.h b/include/configs/manroland-common.h
new file mode 100644
index 0000000..ffc94e1
--- /dev/null
+++ b/include/configs/manroland-common.h
@@ -0,0 +1,139 @@
+/*
+ * (C) Copyright 2009
+ * Heiko Schocher, DENX Software Engineering, hs at denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __MANROLAND_COMMON_H
+#define __MANROLAND_COMMON_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+
+#define BOOTFLAG_COLD		0x01	/* Normal Power-On: Boot from FLASH	*/
+#define BOOTFLAG_WARM		0x02	/* Software reboot			*/
+
+#define CONFIG_BOARD_EARLY_INIT_R
+
+/* Partitions */
+#define CONFIG_DOS_PARTITION
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DISPLAY
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_DTT
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_SNTP
+
+#define	CONFIG_TIMESTAMP	1	/* Print image info with timestamp */
+
+/*
+ * Autobooting
+ */
+#define CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds */
+
+#define CONFIG_PREBOOT	"echo;" \
+	"echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
+	"echo"
+
+#undef	CONFIG_BOOTARGS
+
+#define xstr(s)	str(s)
+#define str(s)	#s
+
+#define CONFIG_EXTRA_ENV_SETTINGS					\
+	"netdev=eth0\0"							\
+	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
+		"nfsroot=${serverip}:${rootpath}\0"			\
+	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
+	"addwdt=setenv bootargs ${bootargs} wdt=off\0"			\
+	"addip=setenv bootargs ${bootargs} "				\
+		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
+		":${hostname}:${netdev}:off panic=1\0"			\
+	"kernel_addr=ff810000\0"					\
+	"fdt_addr="xstr(CONFIG_SYS_FLASH_BASE)"\0"			\
+	"flash_nfs=run nfsargs addip addcon addwdt;"			\
+		"bootm ${kernel_addr} - ${fdt_addr}\0"			\
+	"rootpath=/opt/eldk/ppc_82xx\0"					\
+	"kernel_addr_r=300000\0"					\
+	"fdt_addr_r=200000\0"						\
+	"fdt_file=" xstr(CONFIG_HOSTNAME) "/" 				\
+		xstr(CONFIG_HOSTNAME) ".dtb\0"				\
+	"kernel_file=" xstr(CONFIG_HOSTNAME) "/uImage \0" 		\
+	"load_fdt=tftp ${fdt_addr_r} ${fdt_file};\0"			\
+	"load_kernel=tftp ${kernel_addr_r} ${kernel_file};\0" 		\
+	"addcon=setenv bootargs ${bootargs} console=ttyPSC0,${baudrate}\0"\
+	"net_nfs=run load_fdt load_kernel; "				\
+		"run nfsargs addip addcon addwdt;"			\
+		"bootm ${kernel_addr_r} - ${fdt_addr_r}\0"		\
+	"u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.bin \0" 		\
+	"u-boot_addr_r=200000\0"					\
+	"load=tftp ${u-boot_addr_r} ${u-boot}\0"			\
+	"update=protect off " xstr(TEXT_BASE) " +${filesize};"		\
+		"erase " xstr(TEXT_BASE) " +${filesize};"		\
+		"cp.b ${u-boot_addr_r} " xstr(TEXT_BASE) 		\
+		" ${filesize};"						\
+		"protect on " xstr(TEXT_BASE) " +${filesize}\0"		\
+	""
+
+#define CONFIG_BOOTCOMMAND	"run net_nfs"
+
+#define CONFIG_MISC_INIT_R	1
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CONFIG_SYS_LONGHELP			/* undef to save memory	    */
+#define CONFIG_SYS_PROMPT		"=> "	/* Monitor Command Prompt   */
+#if defined(CONFIG_CMD_KGDB)
+#define CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size  */
+#else
+#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size  */
+#endif
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
+#define CONFIG_SYS_MAXARGS		16	/* max number of command args*/
+#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
+
+/* Enable an alternate, more extensive memory test */
+#define CONFIG_SYS_ALT_MEMTEST
+
+/*
+ * Enable loopw command.
+ */
+#define CONFIG_LOOPW
+
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT	1
+#define CONFIG_OF_BOARD_SETUP	1
+
+#endif /* __MANROLAND_COMMON_H */
diff --git a/include/configs/manroland-mpc52xx-common.h b/include/configs/manroland-mpc52xx-common.h
new file mode 100644
index 0000000..b29ef9b
--- /dev/null
+++ b/include/configs/manroland-mpc52xx-common.h
@@ -0,0 +1,230 @@
+/*
+ * (C) Copyright 2009
+ * Heiko Schocher, DENX Software Engineering, hs at denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __MANROLAND_MPC52XX__COMMON_H
+#define __MANROLAND_MPC52XX__COMMON_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+#define CONFIG_MPC5xxx		1	/* This is an MPC5xxx CPU		*/
+#define CONFIG_MPC5200		1	/* (more precisely an MPC5200 CPU)	*/
+
+#define CONFIG_SYS_MPC5XXX_CLKIN	33000000 /* ... running at 33.000000MHz	*/
+
+#define CONFIG_HIGH_BATS	1	/* High BATs supported 			*/
+
+/*
+ * Serial console configuration
+ */
+#define CONFIG_PSC_CONSOLE	1	/* console is on PSC1	*/
+#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200,\
+					 230400 }
+
+#if (TEXT_BASE == 0xFFF00000) /* Boot low */
+#   define CONFIG_SYS_LOWBOOT		1
+#endif
+
+/*
+ * IPB Bus clocking configuration.
+ */
+#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK		/* define for 133MHz speed */
+
+/*
+ * I2C configuration
+ */
+#define CONFIG_HARD_I2C		1	/* I2C with hardware support */
+#define CONFIG_SYS_I2C_MODULE		2	/* Select I2C module #1 or #2 */
+
+#define CONFIG_SYS_I2C_SPEED		100000 /* 100 kHz */
+#define CONFIG_SYS_I2C_SLAVE		0x7F
+
+/*
+ * EEPROM configuration
+ */
+#define CONFIG_SYS_I2C_EEPROM_ADDR		0x58
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	10
+
+/*
+ * RTC configuration
+ */
+#define CONFIG_RTC_PCF8563
+#define CONFIG_SYS_I2C_RTC_ADDR		0x51
+
+/* I2C SYSMON (LM75) */
+#define CONFIG_DTT_LM81			1	/* ON Semi's LM75	*/
+#define CONFIG_DTT_SENSORS		{0}	/* Sensor addresses	*/
+#define CONFIG_SYS_DTT_MAX_TEMP		70
+#define CONFIG_SYS_DTT_LOW_TEMP		-30
+#define CONFIG_SYS_DTT_HYSTERESIS		3
+
+/*
+ * Flash configuration
+ */
+#define CONFIG_SYS_FLASH_BASE		0xFF800000
+
+#define CONFIG_SYS_FLASH_SIZE		0x00800000 /* 8 MByte */
+
+#define CONFIG_ENV_ADDR		(TEXT_BASE+0x40000) /* second sector */
+#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max num of flash banks
+					   (= chip selects) */
+#define CONFIG_SYS_FLASH_ERASE_TOUT	240000	/* Flash Erase Timeout [ms]*/
+#define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Flash Write Timeout [ms]*/
+
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_SYS_FLASH_EMPTY_INFO
+#define CONFIG_SYS_FLASH_CFI_AMD_RESET
+
+/*
+ * Environment settings
+ */
+#define CONFIG_ENV_IS_IN_FLASH	1
+#define CONFIG_ENV_SIZE		0x4000
+#define CONFIG_ENV_OFFSET_REDUND   (CONFIG_ENV_OFFSET+CONFIG_ENV_SECT_SIZE)
+#define CONFIG_ENV_SIZE_REDUND     (CONFIG_ENV_SIZE)
+
+/*
+ * Memory map
+ */
+#define CONFIG_SYS_MBAR		0xF0000000
+#define CONFIG_SYS_DEFAULT_MBAR	0x80000000
+
+#define CONFIG_SYS_GBL_DATA_SIZE	128
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END -\
+					 CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
+
+#define CONFIG_SYS_SDRAM_BASE		0x00000000
+#define CONFIG_SYS_SRAM_BASE	0x80100000	/* CS 1 */
+#define CONFIG_SYS_DISPLAY_BASE	0x80600000	/* CS 3 */
+
+/* Settings for XLB = 132 MHz */
+#define SDRAM_DDR	 1
+#define SDRAM_MODE      0x018D0000
+#define SDRAM_EMODE     0x40090000
+#define SDRAM_CONTROL   0x714f0f00
+#define SDRAM_CONFIG1   0x73722930
+#define SDRAM_CONFIG2   0x47770000
+#define SDRAM_TAPDELAY  0x10000000
+
+/* Use ON-Chip SRAM until RAM will be available */
+#define CONFIG_SYS_INIT_RAM_ADDR	MPC5XXX_SRAM
+#ifdef CONFIG_POST
+/* preserve space for the post_word at end of on-chip SRAM */
+#define CONFIG_SYS_INIT_RAM_END	MPC5XXX_SRAM_POST_SIZE
+#else
+#define CONFIG_SYS_INIT_RAM_END	MPC5XXX_SRAM_SIZE
+#endif
+
+#define CONFIG_SYS_MONITOR_BASE    TEXT_BASE
+#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
+#   define CONFIG_SYS_RAMBOOT		1
+#endif
+
+#define CONFIG_SYS_MONITOR_LEN		(192 << 10)
+#define CONFIG_SYS_MALLOC_LEN		(512 << 10)
+#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)
+
+/*
+ * Ethernet configuration
+ */
+#define CONFIG_MPC5xxx_FEC	1
+#define CONFIG_MPC5xxx_FEC_MII100
+#define CONFIG_PHY_ADDR		0x00
+#define CONFIG_MII		1
+
+/*use  Hardware WDT */
+#define CONFIG_HW_WATCHDOG
+
+#define CONFIG_SYS_HZ			1000	/* decrementer freq: 1 ms ticks */
+
+#define CONFIG_SYS_CACHELINE_SIZE	32	/* For MPC5xxx CPUs		*/
+#if defined(CONFIG_CMD_KGDB)
+#  define CONFIG_SYS_CACHELINE_SHIFT	5	/* log base 2 of the above value*/
+#endif
+
+/*
+ * Various low-level settings
+ */
+#if defined(CONFIG_MPC5200)
+#define CONFIG_SYS_HID0_INIT		HID0_ICE | HID0_ICFI
+#define CONFIG_SYS_HID0_FINAL		HID0_ICE
+#else
+#define CONFIG_SYS_HID0_INIT		0
+#define CONFIG_SYS_HID0_FINAL		0
+#endif
+
+#define CONFIG_SYS_BOOTCS_START	CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_BOOTCS_SIZE		CONFIG_SYS_FLASH_SIZE
+#define CONFIG_SYS_CS0_START		CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_CS0_SIZE		CONFIG_SYS_FLASH_SIZE
+
+/* 8Mbit SRAM @0x80100000 */
+#define CONFIG_SYS_CS1_START		CONFIG_SYS_SRAM_BASE
+
+#define CONFIG_SYS_CS_BURST		0x00000000
+#define CONFIG_SYS_CS_DEADCYCLE	0x33333333
+
+/*-----------------------------------------------------------------------
+ * IDE/ATA stuff Supports IDE harddisk
+ *-----------------------------------------------------------------------
+ */
+
+#undef  CONFIG_IDE_8xx_PCCARD		/* Use IDE with PC Card	Adapter	*/
+
+#undef	CONFIG_IDE_8xx_DIRECT		/* Direct IDE    not supported	*/
+#undef	CONFIG_IDE_LED			/* LED   for ide not supported	*/
+
+#define CONFIG_SYS_IDE_MAXBUS		1	/* max. 1 IDE bus	*/
+
+#define CONFIG_IDE_PREINIT	1
+
+#define CONFIG_SYS_ATA_IDE0_OFFSET	0x0000
+
+#define CONFIG_SYS_ATA_BASE_ADDR	MPC5XXX_ATA
+
+/* Offset for data I/O			*/
+#define CONFIG_SYS_ATA_DATA_OFFSET	(0x0060)
+
+/* Offset for normal register accesses	*/
+#define CONFIG_SYS_ATA_REG_OFFSET	(CONFIG_SYS_ATA_DATA_OFFSET)
+
+/* Offset for alternate registers	*/
+#define CONFIG_SYS_ATA_ALT_OFFSET	(0x005C)
+
+/* Interval between registers	*/
+#define CONFIG_SYS_ATA_STRIDE          4
+
+#define CONFIG_ATAPI            1
+
+#define OF_CPU			"PowerPC,5200 at 0"
+#define OF_SOC			"soc5200@f0000000"
+#define OF_TBCLK		(bd->bi_busfreq / 4)
+#define OF_STDOUT_PATH		"/soc5200 at f0000000/serial at 2000"
+#define CONFIG_OF_IDE_FIXUP
+
+#endif /* __MANROLAND_MPC52XX__COMMON_H */
diff --git a/include/configs/mucmc52.h b/include/configs/mucmc52.h
index ae60cd2..367b8f6 100644
--- a/include/configs/mucmc52.h
+++ b/include/configs/mucmc52.h
@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2008
+ * (C) Copyright 2008-2009
  * Heiko Schocher, DENX Software Engineering, hs at denx.de.
  *
  * (C) Copyright 2003-2005
@@ -32,260 +32,51 @@
  * (easy to change)
  */

-#define	CONFIG_MPC5xxx		1	/* This is an MPC5xxx CPU		*/
-#define	CONFIG_MPC5200		1	/* (more precisely an MPC5200 CPU)	*/
-#define	CONFIG_MUCMC52		1	/* MUCMC52 board			*/
+#define	CONFIG_MUCMC52		1	/* MUCMC52 board	*/
+#define	CONFIG_HOSTNAME		mucmc52

-#define	CONFIG_SYS_MPC5XXX_CLKIN	33000000 /* ... running at 33.000000MHz		*/
-
-#define	BOOTFLAG_COLD		0x01	/* Normal Power-On: Boot from FLASH	*/
-#define	BOOTFLAG_WARM		0x02	/* Software reboot			*/
-
-#define	CONFIG_SYS_CACHELINE_SIZE	32	/* For MPC5xxx CPUs			*/
-#if (CONFIG_COMMANDS & CONFIG_SYS_CMD_KGDB)
-#  define	CONFIG_SYS_CACHELINE_SHIFT	5	/* log base 2 of the above value	*/
-#endif
-
-#define	CONFIG_BOARD_EARLY_INIT_R
+#include "manroland-common.h"
+#include "manroland-mpc52xx-common.h"

 #define	CONFIG_LAST_STAGE_INIT
-
-#define	CONFIG_HIGH_BATS	1	/* High BATs supported			*/
 /*
  * Serial console configuration
  */
-#define	CONFIG_PSC_CONSOLE	1	/* console is on PSC1	*/
 #define	CONFIG_BAUDRATE		38400	/* ... at 38400 bps	*/
-#define	CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 230400 }
-
-/* Partitions */
-#define	CONFIG_DOS_PARTITION

-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define	CONFIG_CMD_DATE
-#define	CONFIG_CMD_DISPLAY
-#define	CONFIG_CMD_DHCP
-#define	CONFIG_CMD_EEPROM
-#define	CONFIG_CMD_FAT
-#define	CONFIG_CMD_I2C
-#define	CONFIG_CMD_DTT
-#define	CONFIG_CMD_IDE
-#define	CONFIG_CMD_MII
-#define	CONFIG_CMD_NFS
 #define	CONFIG_CMD_PCI
-#define	CONFIG_CMD_PING
-#define	CONFIG_CMD_SNTP
-
-#define	CONFIG_TIMESTAMP	1	/* Print image info with timestamp */
-
-#if (TEXT_BASE == 0xFFF00000) /* Boot low */
-#   define	CONFIG_SYS_LOWBOOT		1
-#endif
-
-/*
- * Autobooting
- */
-#define	CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds */
-
-#define	CONFIG_PREBOOT	"echo;" \
-	"echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
-	"echo"
-
-#undef	CONFIG_BOOTARGS
-
-#define	CONFIG_EXTRA_ENV_SETTINGS					\
-	"netdev=eth0\0"							\
-	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
-		"nfsroot=${serverip}:${rootpath}\0"			\
-	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
-	"addip=setenv bootargs ${bootargs} "				\
-		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
-		":${hostname}:${netdev}:off panic=1\0"			\
-	"flash_nfs=run nfsargs addip;"					\
-		"bootm ${kernel_addr}\0"				\
-	"net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0"	\
-	"rootpath=/opt/eldk/ppc_82xx\0"					\
-	""
-
-#define	CONFIG_BOOTCOMMAND	"run net_nfs"
-
-#define	CONFIG_MISC_INIT_R	1
-
-/*
- * IPB Bus clocking configuration.
- */
-#undef	CONFIG_SYS_IPBCLK_EQUALS_XLBCLK		/* define for 133MHz speed */
-
-/*
- * I2C configuration
- */
-#define	CONFIG_HARD_I2C		1	/* I2C with hardware support */
-#define	CONFIG_SYS_I2C_MODULE		2	/* Select I2C module #1 or #2 */
-
-#define	CONFIG_SYS_I2C_SPEED		100000 /* 100 kHz */
-#define	CONFIG_SYS_I2C_SLAVE		0x7F
-
-/*
- * EEPROM configuration
- */
-#define	CONFIG_SYS_I2C_EEPROM_ADDR		0x58
-#define	CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
-#define	CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
-#define	CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	10
-
-/*
- * RTC configuration
- */
-#define	CONFIG_RTC_PCF8563
-#define	CONFIG_SYS_I2C_RTC_ADDR		0x51
-
-/* I2C SYSMON (LM75) */
-#define	CONFIG_DTT_LM81			1	/* ON Semi's LM75		*/
-#define	CONFIG_DTT_SENSORS		{0}	/* Sensor addresses		*/
-#define	CONFIG_SYS_DTT_MAX_TEMP		70
-#define	CONFIG_SYS_DTT_LOW_TEMP		-30
-#define	CONFIG_SYS_DTT_HYSTERESIS		3

 /*
  * Flash configuration
  */
-#define	CONFIG_SYS_FLASH_BASE		0xFF800000
-
-#define	CONFIG_SYS_FLASH_SIZE		0x00800000 /* 8 MByte */
-#define	CONFIG_SYS_MAX_FLASH_SECT	67	/* max num of sects on one chip */
-
-#define	CONFIG_ENV_ADDR		(TEXT_BASE+0x40000) /* second sector */
-#define	CONFIG_SYS_MAX_FLASH_BANKS	1	/* max num of flash banks
-					   (= chip selects) */
-#define	CONFIG_SYS_FLASH_ERASE_TOUT	240000	/* Flash Erase Timeout (in ms)	*/
-#define	CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Flash Write Timeout (in ms)	*/
-
-#define	CONFIG_FLASH_CFI_DRIVER
-#define	CONFIG_SYS_FLASH_CFI
-#define	CONFIG_SYS_FLASH_EMPTY_INFO
-#define	CONFIG_SYS_FLASH_CFI_AMD_RESET
+#define	CONFIG_SYS_MAX_FLASH_SECT	67

 /*
  * Environment settings
  */
-#define	CONFIG_ENV_IS_IN_FLASH	1
-#define	CONFIG_ENV_SIZE		0x4000
 #define	CONFIG_ENV_SECT_SIZE	0x20000
-#define	CONFIG_ENV_OFFSET_REDUND   (CONFIG_ENV_OFFSET+CONFIG_ENV_SECT_SIZE)
-#define	CONFIG_ENV_SIZE_REDUND     (CONFIG_ENV_SIZE)

 /*
  * Memory map
  */
-#define	CONFIG_SYS_MBAR		0xF0000000
-#define	CONFIG_SYS_SDRAM_BASE		0x00000000
-#define	CONFIG_SYS_DEFAULT_MBAR	0x80000000
-#define	CONFIG_SYS_DISPLAY_BASE	0x80600000
 #define	CONFIG_SYS_STATUS1_BASE	0x80600200
 #define	CONFIG_SYS_STATUS2_BASE	0x80600300
 #define	CONFIG_SYS_PMI_UNI_BASE	0x80800000
 #define	CONFIG_SYS_PMI_BROAD_BASE	0x80810000

-/* Settings for XLB = 132 MHz */
-#define	SDRAM_DDR	 1
-#define	SDRAM_MODE      0x018D0000
-#define	SDRAM_EMODE     0x40090000
-#define	SDRAM_CONTROL   0x714f0f00
-#define	SDRAM_CONFIG1   0x73722930
-#define	SDRAM_CONFIG2   0x47770000
-#define	SDRAM_TAPDELAY  0x10000000
-
-/* Use ON-Chip SRAM until RAM will be available */
-#define	CONFIG_SYS_INIT_RAM_ADDR	MPC5XXX_SRAM
-#ifdef CONFIG_POST
-/* preserve space for the post_word at end of on-chip SRAM */
-#define	CONFIG_SYS_INIT_RAM_END	MPC5XXX_SRAM_POST_SIZE
-#else
-#define	CONFIG_SYS_INIT_RAM_END	MPC5XXX_SRAM_SIZE
-#endif
-
-#define	CONFIG_SYS_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */
-#define	CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
-#define	CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
-
-#define	CONFIG_SYS_MONITOR_BASE	TEXT_BASE
-#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
-#   define	CONFIG_SYS_RAMBOOT	1
-#endif
-
-#define	CONFIG_SYS_MONITOR_LEN		(192 << 10)	/* Reserve 192 kB for Monitor	*/
-#define	CONFIG_SYS_MALLOC_LEN		(512 << 10)	/* Reserve 128 kB for malloc()	*/
-#define	CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
-
-/*
- * Ethernet configuration
- */
-#define	CONFIG_MPC5xxx_FEC	1
-#define CONFIG_MPC5xxx_FEC_MII100
-#define	CONFIG_PHY_ADDR		0x00
-#define	CONFIG_MII		1		/* MII PHY management		*/
-
 /*
  * GPIO configuration
  */
 #define	CONFIG_SYS_GPS_PORT_CONFIG	0x8D550644

-/*use  Hardware WDT */
-#define CONFIG_HW_WATCHDOG
+#define	CONFIG_SYS_MEMTEST_START	0x00100000
+#define	CONFIG_SYS_MEMTEST_END		0x00f00000

-/*
- * Miscellaneous configurable options
- */
-#define	CONFIG_SYS_LONGHELP			/* undef to save memory	    */
-#define	CONFIG_SYS_PROMPT		"=> "	/* Monitor Command Prompt   */
-#if (CONFIG_COMMANDS & CONFIG_SYS_CMD_KGDB)
-#define	CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size  */
-#else
-#define	CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size  */
-#endif
-#define	CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define	CONFIG_SYS_MAXARGS		16	/* max number of command args	*/
-#define	CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/
-
-/* Enable an alternate, more extensive memory test */
-#define	CONFIG_SYS_ALT_MEMTEST
-
-#define	CONFIG_SYS_MEMTEST_START	0x00100000	/* memtest works on */
-#define	CONFIG_SYS_MEMTEST_END		0x00f00000	/* 1 ... 15 MB in DRAM	*/
+#define	CONFIG_SYS_LOAD_ADDR		0x100000

-#define	CONFIG_SYS_LOAD_ADDR		0x100000	/* default load address */
-
-#define	CONFIG_SYS_HZ			1000	/* decrementer freq: 1 ms ticks */
-
-/*
- * Enable loopw commando. This has only affect, if CONFIG_SYS_CMD_MEM is defined,
- * which is normally part of the default commands (CFV_CMD_DFL)
- */
-#define	CONFIG_LOOPW
-
-/*
- * Various low-level settings
- */
-#if defined(CONFIG_MPC5200)
-#define	CONFIG_SYS_HID0_INIT		HID0_ICE | HID0_ICFI
-#define	CONFIG_SYS_HID0_FINAL		HID0_ICE
-#else
-#define	CONFIG_SYS_HID0_INIT		0
-#define	CONFIG_SYS_HID0_FINAL		0
-#endif
-
-#define	CONFIG_SYS_BOOTCS_START	CONFIG_SYS_FLASH_BASE
-#define	CONFIG_SYS_BOOTCS_SIZE		CONFIG_SYS_FLASH_SIZE
 #define	CONFIG_SYS_BOOTCS_CFG		0x0004FB00
-#define	CONFIG_SYS_CS0_START		CONFIG_SYS_FLASH_BASE
-#define	CONFIG_SYS_CS0_SIZE		CONFIG_SYS_FLASH_SIZE

 /* 8Mbit SRAM @0x80100000 */
-#define	CONFIG_SYS_CS1_START		0x80100000
 #define	CONFIG_SYS_CS1_SIZE		0x00100000
 #define	CONFIG_SYS_CS1_CFG		0x00019B00

@@ -309,42 +100,12 @@
 #define	CONFIG_SYS_CS7_SIZE		0x00008000
 #define	CONFIG_SYS_CS7_CFG		0xFF00F930

-#define	CONFIG_SYS_CS_BURST		0x00000000
-#define	CONFIG_SYS_CS_DEADCYCLE	0x33333333
-
 /*-----------------------------------------------------------------------
  * IDE/ATA stuff Supports IDE harddisk
  *-----------------------------------------------------------------------
  */
-
-#undef	CONFIG_IDE_8xx_PCCARD		/* Use IDE with PC Card	Adapter	*/
-
-#undef	CONFIG_IDE_8xx_DIRECT		/* Direct IDE    not supported	*/
-#undef	CONFIG_IDE_LED			/* LED   for ide not supported	*/
-
-#define	CONFIG_SYS_IDE_MAXBUS		1	/* max. 1 IDE bus		*/
 #define	CONFIG_SYS_IDE_MAXDEVICE	1	/* max. 2 drives per IDE bus	*/

-#define	CONFIG_IDE_PREINIT	1
-
-#define	CONFIG_SYS_ATA_IDE0_OFFSET	0x0000
-
-#define	CONFIG_SYS_ATA_BASE_ADDR	MPC5XXX_ATA
-
-/* Offset for data I/O			*/
-#define	CONFIG_SYS_ATA_DATA_OFFSET	(0x0060)
-
-/* Offset for normal register accesses	*/
-#define	CONFIG_SYS_ATA_REG_OFFSET	(CONFIG_SYS_ATA_DATA_OFFSET)
-
-/* Offset for alternate registers	*/
-#define	CONFIG_SYS_ATA_ALT_OFFSET	(0x005C)
-
-/* Interval between registers           */
-#define	CONFIG_SYS_ATA_STRIDE          4
-
-#define	CONFIG_ATAPI            1
-
 /*
  * PCI Mapping:
  * 0x40000000 - 0x4fffffff - PCI Memory
diff --git a/include/configs/uc101.h b/include/configs/uc101.h
index 87cb4e5..5fbcb0c 100644
--- a/include/configs/uc101.h
+++ b/include/configs/uc101.h
@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2003-2006
+ * (C) Copyright 2003-2009
  * Heiko Schocher, DENX Software Engineering, hs at denx.de.
  *
  * See file CREDITS for list of people who contributed to this
@@ -29,29 +29,16 @@
  * (easy to change)
  */

-#define CONFIG_MPC5xxx		1	/* This is an MPC5xxx CPU		*/
-#define CONFIG_MPC5200		1	/* (more precisely an MPC5200 CPU)	*/
-#define CONFIG_UC101		1	/* UC101 board			*/
+#define CONFIG_UC101		1	/* UC101 board		*/
+#define CONFIG_HOSTNAME		uc101

-#define CONFIG_SYS_MPC5XXX_CLKIN	33000000 /* ... running at 33.000000MHz		*/
-
-#define BOOTFLAG_COLD		0x01	/* Normal Power-On: Boot from FLASH	*/
-#define BOOTFLAG_WARM		0x02	/* Software reboot			*/
-
-#define CONFIG_BOARD_EARLY_INIT_R
-
-#define CONFIG_HIGH_BATS	1	/* High BATs supported 			*/
+#include "manroland-common.h"
+#include "manroland-mpc52xx-common.h"

 /*
  * Serial console configuration
  */
-#define CONFIG_PSC_CONSOLE	1	/* console is on PSC1	*/
 #define CONFIG_BAUDRATE		115200	/* ... at 115200 bps	*/
-#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 230400 }
-
-/* Partitions */
-#define CONFIG_DOS_PARTITION
-

 /*
  * BOOTP options
@@ -61,243 +48,40 @@
 #define CONFIG_BOOTP_GATEWAY
 #define CONFIG_BOOTP_HOSTNAME

-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_DATE
-#define CONFIG_CMD_DISPLAY
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_EEPROM
-#define CONFIG_CMD_I2C
-#define CONFIG_CMD_DTT
-#define CONFIG_CMD_IDE
-#define CONFIG_CMD_FAT
-#define CONFIG_CMD_NFS
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_SNTP
-
-
-#define	CONFIG_TIMESTAMP	1	/* Print image info with timestamp */
-
-#if (TEXT_BASE == 0xFFF00000) /* Boot low */
-#   define CONFIG_SYS_LOWBOOT		1
-#endif
-
-/*
- * Autobooting
- */
-#define CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds */
-
-#define CONFIG_PREBOOT	"echo;" \
-	"echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
-	"echo"
-
-#undef	CONFIG_BOOTARGS
-
-#define CONFIG_EXTRA_ENV_SETTINGS					\
-	"netdev=eth0\0"							\
-	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
-		"nfsroot=${serverip}:${rootpath}\0"			\
-	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
-	"addwdt=setenv bootargs ${bootargs} wdt=off"			\
-	"addip=setenv bootargs ${bootargs} "				\
-		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
-		":${hostname}:${netdev}:off panic=1\0"			\
-	"flash_nfs=run nfsargs addip;"					\
-		"bootm ${kernel_addr}\0"				\
-	"net_nfs=tftp 300000 ${bootfile};run nfsargs addip addwdt;bootm\0" \
-	"rootpath=/opt/eldk/ppc_82xx\0"					\
-	""
-
-#define CONFIG_BOOTCOMMAND	"run net_nfs"
-
-#define CONFIG_MISC_INIT_R	1
-
-/*
- * IPB Bus clocking configuration.
- */
-#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK		/* define for 133MHz speed */
-
-/*
- * I2C configuration
- */
-#define CONFIG_HARD_I2C		1	/* I2C with hardware support */
-#define CONFIG_SYS_I2C_MODULE		2	/* Select I2C module #1 or #2 */
-
-#define CONFIG_SYS_I2C_SPEED		100000 /* 100 kHz */
-#define CONFIG_SYS_I2C_SLAVE		0x7F
-
-/*
- * EEPROM configuration
- */
-#define CONFIG_SYS_I2C_EEPROM_ADDR		0x58
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	10
-
-/*
- * RTC configuration
- */
-#define CONFIG_RTC_PCF8563
-#define CONFIG_SYS_I2C_RTC_ADDR		0x51
-
-/* I2C SYSMON (LM75) */
-#define CONFIG_DTT_LM81			1	/* ON Semi's LM75		*/
-#define CONFIG_DTT_SENSORS		{0}	/* Sensor addresses		*/
-#define CONFIG_SYS_DTT_MAX_TEMP		70
-#define CONFIG_SYS_DTT_LOW_TEMP		-30
-#define CONFIG_SYS_DTT_HYSTERESIS		3
-
 /*
  * Flash configuration
  */
-#define CONFIG_SYS_FLASH_BASE		0xFF800000
-
-#define CONFIG_SYS_FLASH_SIZE		0x00800000 /* 8 MByte */
-#define CONFIG_SYS_MAX_FLASH_SECT	140	/* max num of sects on one chip */
-
-#define CONFIG_ENV_ADDR		(TEXT_BASE+0x40000) /* second sector */
-#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max num of flash banks
-					   (= chip selects) */
-#define CONFIG_SYS_FLASH_ERASE_TOUT	240000	/* Flash Erase Timeout (in ms)	*/
-#define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Flash Write Timeout (in ms)	*/
-
-#define CONFIG_FLASH_CFI_DRIVER
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_SYS_FLASH_EMPTY_INFO
-#define CONFIG_SYS_FLASH_CFI_AMD_RESET
+#define CONFIG_SYS_MAX_FLASH_SECT	140

 /*
  * Environment settings
  */
-#define CONFIG_ENV_IS_IN_FLASH	1
-#define CONFIG_ENV_SIZE		0x4000
 #define CONFIG_ENV_SECT_SIZE	0x10000
-#define CONFIG_ENV_OFFSET_REDUND   (CONFIG_ENV_OFFSET+CONFIG_ENV_SECT_SIZE)
-#define CONFIG_ENV_SIZE_REDUND     (CONFIG_ENV_SIZE)

 /*
  * Memory map
  */
-#define CONFIG_SYS_MBAR		0xF0000000
-#define CONFIG_SYS_DEFAULT_MBAR	0x80000000
-
-#define CONFIG_SYS_SDRAM_BASE		0x00000000
-#define CONFIG_SYS_SRAM_BASE		0x80100000	/* CS 1 */
-#define CONFIG_SYS_DISPLAY_BASE	0x80600000	/* CS 3 */
 #define	CONFIG_SYS_IB_MASTER		0xc0510000	/* CS 6 */
 #define CONFIG_SYS_IB_EPLD		0xc0500000	/* CS 7 */

-/* Settings for XLB = 132 MHz */
-#define SDRAM_DDR	 1
-#define SDRAM_MODE      0x018D0000
-#define SDRAM_EMODE     0x40090000
-#define SDRAM_CONTROL   0x714f0f00
-#define SDRAM_CONFIG1   0x73722930
-#define SDRAM_CONFIG2   0x47770000
-#define SDRAM_TAPDELAY  0x10000000
-
 /* SRAM */
-#define SRAM_BASE		CONFIG_SYS_SRAM_BASE	/* SRAM base address	*/
+#define SRAM_BASE		CONFIG_SYS_SRAM_BASE
 #define SRAM_LEN		0x1fffff
 #define SRAM_END		(SRAM_BASE + SRAM_LEN)

-/* Use ON-Chip SRAM until RAM will be available */
-#define CONFIG_SYS_INIT_RAM_ADDR	MPC5XXX_SRAM
-#ifdef CONFIG_POST
-/* preserve space for the post_word at end of on-chip SRAM */
-#define CONFIG_SYS_INIT_RAM_END	MPC5XXX_SRAM_POST_SIZE
-#else
-#define CONFIG_SYS_INIT_RAM_END	MPC5XXX_SRAM_SIZE
-#endif
-
-
-#define CONFIG_SYS_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
-
-#define CONFIG_SYS_MONITOR_BASE    TEXT_BASE
-#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
-#   define CONFIG_SYS_RAMBOOT		1
-#endif
-
-#define CONFIG_SYS_MONITOR_LEN		(192 << 10)	/* Reserve 192 kB for Monitor	*/
-#define CONFIG_SYS_MALLOC_LEN		(512 << 10)	/* Reserve 128 kB for malloc()	*/
-#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
-
-/*
- * Ethernet configuration
- */
-#define CONFIG_MPC5xxx_FEC	1
-#define CONFIG_MPC5xxx_FEC_MII100
-#define CONFIG_PHY_ADDR		0x00
-#define CONFIG_MII		1
-
 /*
  * GPIO configuration
  */
 #define CONFIG_SYS_GPS_PORT_CONFIG	0x4d558044

-/*use  Hardware WDT */
-#define CONFIG_HW_WATCHDOG
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP			/* undef to save memory	    */
-#define CONFIG_SYS_PROMPT		"=> "	/* Monitor Command Prompt   */
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size  */
-#else
-#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size  */
-#endif
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS		16	/* max number of command args	*/
-#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/
-
-/* Enable an alternate, more extensive memory test */
-#define CONFIG_SYS_ALT_MEMTEST
-
-#define CONFIG_SYS_MEMTEST_START	0x00300000	/* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x00f00000	/* 3 ... 15 MB in DRAM	*/
-
-#define CONFIG_SYS_LOAD_ADDR		0x300000	/* default load address */
+#define CONFIG_SYS_MEMTEST_START	0x00300000
+#define CONFIG_SYS_MEMTEST_END		0x00f00000

-#define CONFIG_SYS_HZ			1000	/* decrementer freq: 1 ms ticks */
+#define CONFIG_SYS_LOAD_ADDR		0x300000

-#define CONFIG_SYS_CACHELINE_SIZE	32	/* For MPC5xxx CPUs			*/
-#if defined(CONFIG_CMD_KGDB)
-#  define CONFIG_SYS_CACHELINE_SHIFT	5	/* log base 2 of the above value	*/
-#endif
-
-/*
- * Enable loopw command.
- */
-#define CONFIG_LOOPW
-
-/*
- * Various low-level settings
- */
-#if defined(CONFIG_MPC5200)
-#define CONFIG_SYS_HID0_INIT		HID0_ICE | HID0_ICFI
-#define CONFIG_SYS_HID0_FINAL		HID0_ICE
-#else
-#define CONFIG_SYS_HID0_INIT		0
-#define CONFIG_SYS_HID0_FINAL		0
-#endif
-
-#define CONFIG_SYS_BOOTCS_START	CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_BOOTCS_SIZE		CONFIG_SYS_FLASH_SIZE
 #define CONFIG_SYS_BOOTCS_CFG		0x00045D00
-#define CONFIG_SYS_CS0_START		CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_CS0_SIZE		CONFIG_SYS_FLASH_SIZE

 /* 8Mbit SRAM @0x80100000 */
-#define CONFIG_SYS_CS1_START		CONFIG_SYS_SRAM_BASE
 #define CONFIG_SYS_CS1_SIZE		0x00200000
 #define CONFIG_SYS_CS1_CFG		0x21D00

@@ -316,41 +100,12 @@
 #define CONFIG_SYS_CS7_SIZE		0x00010000
 #define CONFIG_SYS_CS7_CFG		0x00081800

-#define CONFIG_SYS_CS_BURST		0x00000000
-#define CONFIG_SYS_CS_DEADCYCLE	0x33333333
-
 /*-----------------------------------------------------------------------
  * IDE/ATA stuff Supports IDE harddisk
  *-----------------------------------------------------------------------
  */

-#undef  CONFIG_IDE_8xx_PCCARD		/* Use IDE with PC Card	Adapter	*/
-
-#undef	CONFIG_IDE_8xx_DIRECT		/* Direct IDE    not supported	*/
-#undef	CONFIG_IDE_LED			/* LED   for ide not supported	*/
-
-#define CONFIG_SYS_IDE_MAXBUS		1	/* max. 1 IDE bus		*/
-#define CONFIG_SYS_IDE_MAXDEVICE	2	/* max. 2 drives per IDE bus	*/
-
-#define CONFIG_IDE_PREINIT	1
-
-#define CONFIG_SYS_ATA_IDE0_OFFSET	0x0000
-
-#define CONFIG_SYS_ATA_BASE_ADDR	MPC5XXX_ATA
-
-/* Offset for data I/O			*/
-#define CONFIG_SYS_ATA_DATA_OFFSET	(0x0060)
-
-/* Offset for normal register accesses	*/
-#define CONFIG_SYS_ATA_REG_OFFSET	(CONFIG_SYS_ATA_DATA_OFFSET)
-
-/* Offset for alternate registers	*/
-#define CONFIG_SYS_ATA_ALT_OFFSET	(0x005C)
-
-/* Interval between registers                                                */
-#define CONFIG_SYS_ATA_STRIDE          4
-
-#define CONFIG_ATAPI            1
+#define CONFIG_SYS_IDE_MAXDEVICE	1	/* max. 2 drives per IDE bus*/

 /*---------------------------------------------------------------------*/
 /* Display addresses						       */
-- 
1.6.0.6

[U-Boot] [PATCHv2 1/2] mpc52xx, mucmc52, uc101: config cleanup

[Detlev Zundel]

Hello Heiko,

> - as this boards are similiar, collect common config option
>   in manroland-common.h and manroland-mpc52xx-common.h
>   for mpc52xx specific common options for this manufacturer.
> - add OF support
> - update default environment

Argh, sorry for interrupting again, but I think I suggested something
problematic on second thought:

>  include/configs/manroland-mpc52xx-common.h |  230 ++++++++++++++++++++++++

[...]

> diff --git a/include/configs/manroland-mpc52xx-common.h b/include/configs/manroland-mpc52xx-common.h
> new file mode 100644
> index 0000000..b29ef9b
> --- /dev/null
> +++ b/include/configs/manroland-mpc52xx-common.h

[...]

> +#define CONFIG_MPC5xxx		1	/* This is an MPC5xxx CPU		*/
> +#define CONFIG_MPC5200		1	/* (more precisely an MPC5200 CPU)	*/

So all boards using manroland-mpc52xx-common.h are in fact 5200s.  In
this case, I should have suggested the filename
"manroland-mpc5200-common.h" as the "xx" part surely cannot be anything
else then "00".

Sorry for this wrong lead.

Cheers
  Detlev

-- 
Some people seem to think that C is a real programming language, but they are
sadly mistaken.  It really is about writing almost-portable assembly language
[...]               -- Linus Torvalds 10404265599082718160noreply at blogger.com
--
DENX Software Engineering GmbH,      MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich,  Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: dzu at denx.de

[U-Boot] [PATCHv2 1/2] mpc52xx, mucmc52, uc101: config cleanup

[Heiko Schocher]

Hello Detlev,

Detlev Zundel wrote:
>> - as this boards are similiar, collect common config option
>>   in manroland-common.h and manroland-mpc52xx-common.h
>>   for mpc52xx specific common options for this manufacturer.
>> - add OF support
>> - update default environment
> 
> Argh, sorry for interrupting again, but I think I suggested something
> problematic on second thought:
> 
>>  include/configs/manroland-mpc52xx-common.h |  230 ++++++++++++++++++++++++
> 
> [...]
> 
>> diff --git a/include/configs/manroland-mpc52xx-common.h b/include/configs/manroland-mpc52xx-common.h
>> new file mode 100644
>> index 0000000..b29ef9b
>> --- /dev/null
>> +++ b/include/configs/manroland-mpc52xx-common.h
> 
> [...]
> 
>> +#define CONFIG_MPC5xxx		1	/* This is an MPC5xxx CPU		*/
>> +#define CONFIG_MPC5200		1	/* (more precisely an MPC5200 CPU)	*/
> 
> So all boards using manroland-mpc52xx-common.h are in fact 5200s.  In
> this case, I should have suggested the filename
> "manroland-mpc5200-common.h" as the "xx" part surely cannot be anything
> else then "00".

Argh.. and I didn;t detected it too ;-)

> Sorry for this wrong lead.

No problem, I send a patch soon, if the rest of this patch is ok.

bye
Heiko
-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

[U-Boot] [PATCHv3 1/2] mpc5200, mucmc52, uc101: config cleanup

[Heiko Schocher]

- as this boards are similiar, collect common config option
  in manroland/common.h and manroland/mpc52xx-common.h
  for mpc5200 specific common options for this manufacturer.
- add OF support
- update default environment

Signed-off-by: Heiko Schocher <hs@denx.de>
---

- changes since v1:
  added suggestion from Detlev Zundel, to collect mpc52xx specific
  config options in manroland-mpc52xx-common.h

- changes since v2:
  as discussed with Wolfgang and Detlev, moved the manroland common
  headers in include/configs/manroland

 board/mucmc52/mucmc52.c                    |    7 +
 board/uc101/uc101.c                        |    7 +
 include/configs/manroland/common.h         |  139 +++++++++++++++
 include/configs/manroland/mpc5200-common.h |  229 ++++++++++++++++++++++++
 include/configs/mucmc52.h                  |  257 +--------------------------
 include/configs/uc101.h                    |  267 ++--------------------------
 6 files changed, 402 insertions(+), 504 deletions(-)
 create mode 100644 include/configs/manroland/common.h
 create mode 100644 include/configs/manroland/mpc5200-common.h

diff --git a/board/mucmc52/mucmc52.c b/board/mucmc52/mucmc52.c
index 7181bd8..bac49be 100644
--- a/board/mucmc52/mucmc52.c
+++ b/board/mucmc52/mucmc52.c
@@ -398,3 +398,10 @@ void pci_init_board (void)
 	pci_mpc5xxx_init (&hose);
 }
 #endif
+
+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
+void ft_board_setup(void *blob, bd_t *bd)
+{
+	ft_cpu_setup(blob, bd);
+}
+#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
diff --git a/board/uc101/uc101.c b/board/uc101/uc101.c
index 7df349f..4030b9d 100644
--- a/board/uc101/uc101.c
+++ b/board/uc101/uc101.c
@@ -371,3 +371,10 @@ void hw_watchdog_reset(void)
 	*(vu_long *)MPC5XXX_GPT0_ENABLE = GPT_OUT_0;
 }
 #endif
+
+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
+void ft_board_setup(void *blob, bd_t *bd)
+{
+	ft_cpu_setup(blob, bd);
+}
+#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
diff --git a/include/configs/manroland/common.h b/include/configs/manroland/common.h
new file mode 100644
index 0000000..ffc94e1
--- /dev/null
+++ b/include/configs/manroland/common.h
@@ -0,0 +1,139 @@
+/*
+ * (C) Copyright 2009
+ * Heiko Schocher, DENX Software Engineering, hs at denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __MANROLAND_COMMON_H
+#define __MANROLAND_COMMON_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+
+#define BOOTFLAG_COLD		0x01	/* Normal Power-On: Boot from FLASH	*/
+#define BOOTFLAG_WARM		0x02	/* Software reboot			*/
+
+#define CONFIG_BOARD_EARLY_INIT_R
+
+/* Partitions */
+#define CONFIG_DOS_PARTITION
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DISPLAY
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_DTT
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_SNTP
+
+#define	CONFIG_TIMESTAMP	1	/* Print image info with timestamp */
+
+/*
+ * Autobooting
+ */
+#define CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds */
+
+#define CONFIG_PREBOOT	"echo;" \
+	"echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
+	"echo"
+
+#undef	CONFIG_BOOTARGS
+
+#define xstr(s)	str(s)
+#define str(s)	#s
+
+#define CONFIG_EXTRA_ENV_SETTINGS					\
+	"netdev=eth0\0"							\
+	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
+		"nfsroot=${serverip}:${rootpath}\0"			\
+	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
+	"addwdt=setenv bootargs ${bootargs} wdt=off\0"			\
+	"addip=setenv bootargs ${bootargs} "				\
+		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
+		":${hostname}:${netdev}:off panic=1\0"			\
+	"kernel_addr=ff810000\0"					\
+	"fdt_addr="xstr(CONFIG_SYS_FLASH_BASE)"\0"			\
+	"flash_nfs=run nfsargs addip addcon addwdt;"			\
+		"bootm ${kernel_addr} - ${fdt_addr}\0"			\
+	"rootpath=/opt/eldk/ppc_82xx\0"					\
+	"kernel_addr_r=300000\0"					\
+	"fdt_addr_r=200000\0"						\
+	"fdt_file=" xstr(CONFIG_HOSTNAME) "/" 				\
+		xstr(CONFIG_HOSTNAME) ".dtb\0"				\
+	"kernel_file=" xstr(CONFIG_HOSTNAME) "/uImage \0" 		\
+	"load_fdt=tftp ${fdt_addr_r} ${fdt_file};\0"			\
+	"load_kernel=tftp ${kernel_addr_r} ${kernel_file};\0" 		\
+	"addcon=setenv bootargs ${bootargs} console=ttyPSC0,${baudrate}\0"\
+	"net_nfs=run load_fdt load_kernel; "				\
+		"run nfsargs addip addcon addwdt;"			\
+		"bootm ${kernel_addr_r} - ${fdt_addr_r}\0"		\
+	"u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.bin \0" 		\
+	"u-boot_addr_r=200000\0"					\
+	"load=tftp ${u-boot_addr_r} ${u-boot}\0"			\
+	"update=protect off " xstr(TEXT_BASE) " +${filesize};"		\
+		"erase " xstr(TEXT_BASE) " +${filesize};"		\
+		"cp.b ${u-boot_addr_r} " xstr(TEXT_BASE) 		\
+		" ${filesize};"						\
+		"protect on " xstr(TEXT_BASE) " +${filesize}\0"		\
+	""
+
+#define CONFIG_BOOTCOMMAND	"run net_nfs"
+
+#define CONFIG_MISC_INIT_R	1
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CONFIG_SYS_LONGHELP			/* undef to save memory	    */
+#define CONFIG_SYS_PROMPT		"=> "	/* Monitor Command Prompt   */
+#if defined(CONFIG_CMD_KGDB)
+#define CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size  */
+#else
+#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size  */
+#endif
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
+#define CONFIG_SYS_MAXARGS		16	/* max number of command args*/
+#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
+
+/* Enable an alternate, more extensive memory test */
+#define CONFIG_SYS_ALT_MEMTEST
+
+/*
+ * Enable loopw command.
+ */
+#define CONFIG_LOOPW
+
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT	1
+#define CONFIG_OF_BOARD_SETUP	1
+
+#endif /* __MANROLAND_COMMON_H */
diff --git a/include/configs/manroland/mpc5200-common.h b/include/configs/manroland/mpc5200-common.h
new file mode 100644
index 0000000..2f092b1
--- /dev/null
+++ b/include/configs/manroland/mpc5200-common.h
@@ -0,0 +1,229 @@
+/*
+ * (C) Copyright 2009
+ * Heiko Schocher, DENX Software Engineering, hs at denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __MANROLAND_MPC52XX__COMMON_H
+#define __MANROLAND_MPC52XX__COMMON_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+#define CONFIG_MPC5xxx		1	/* This is an MPC5xxx CPU		*/
+#define CONFIG_MPC5200		1	/* (more precisely an MPC5200 CPU)	*/
+
+#define CONFIG_SYS_MPC5XXX_CLKIN	33000000 /* ... running at 33.000000MHz	*/
+
+#define CONFIG_HIGH_BATS	1	/* High BATs supported 			*/
+
+/*
+ * Serial console configuration
+ */
+#define CONFIG_PSC_CONSOLE	1	/* console is on PSC1	*/
+#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200,\
+					 230400 }
+
+#if (TEXT_BASE == 0xFFF00000) /* Boot low */
+#   define CONFIG_SYS_LOWBOOT		1
+#endif
+
+/*
+ * IPB Bus clocking configuration.
+ */
+#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK		/* define for 133MHz speed */
+
+/*
+ * I2C configuration
+ */
+#define CONFIG_HARD_I2C		1	/* I2C with hardware support */
+#define CONFIG_SYS_I2C_MODULE		2	/* Select I2C module #1 or #2 */
+
+#define CONFIG_SYS_I2C_SPEED		100000 /* 100 kHz */
+#define CONFIG_SYS_I2C_SLAVE		0x7F
+
+/*
+ * EEPROM configuration
+ */
+#define CONFIG_SYS_I2C_EEPROM_ADDR		0x58
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	10
+
+/*
+ * RTC configuration
+ */
+#define CONFIG_RTC_PCF8563
+#define CONFIG_SYS_I2C_RTC_ADDR		0x51
+
+/* I2C SYSMON (LM75) */
+#define CONFIG_DTT_LM81			1	/* ON Semi's LM75	*/
+#define CONFIG_DTT_SENSORS		{0}	/* Sensor addresses	*/
+#define CONFIG_SYS_DTT_MAX_TEMP		70
+#define CONFIG_SYS_DTT_LOW_TEMP		-30
+#define CONFIG_SYS_DTT_HYSTERESIS		3
+
+/*
+ * Flash configuration
+ */
+#define CONFIG_SYS_FLASH_BASE		0xFF800000
+
+#define CONFIG_SYS_FLASH_SIZE		0x00800000 /* 8 MByte */
+
+#define CONFIG_ENV_ADDR		(TEXT_BASE+0x40000) /* second sector */
+#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max num of flash banks
+					   (= chip selects) */
+#define CONFIG_SYS_FLASH_ERASE_TOUT	240000	/* Flash Erase Timeout [ms]*/
+#define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Flash Write Timeout [ms]*/
+
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_SYS_FLASH_EMPTY_INFO
+#define CONFIG_SYS_FLASH_CFI_AMD_RESET
+
+/*
+ * Environment settings
+ */
+#define CONFIG_ENV_IS_IN_FLASH	1
+#define CONFIG_ENV_SIZE		0x4000
+#define CONFIG_ENV_OFFSET_REDUND   (CONFIG_ENV_OFFSET+CONFIG_ENV_SECT_SIZE)
+#define CONFIG_ENV_SIZE_REDUND     (CONFIG_ENV_SIZE)
+
+/*
+ * Memory map
+ */
+#define CONFIG_SYS_MBAR		0xF0000000
+#define CONFIG_SYS_DEFAULT_MBAR	0x80000000
+
+#define CONFIG_SYS_GBL_DATA_SIZE	128
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END -\
+					 CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
+
+#define CONFIG_SYS_SDRAM_BASE		0x00000000
+#define CONFIG_SYS_SRAM_BASE	0x80100000	/* CS 1 */
+#define CONFIG_SYS_DISPLAY_BASE	0x80600000	/* CS 3 */
+
+/* Settings for XLB = 132 MHz */
+#define SDRAM_DDR	 1
+#define SDRAM_MODE      0x018D0000
+#define SDRAM_EMODE     0x40090000
+#define SDRAM_CONTROL   0x714f0f00
+#define SDRAM_CONFIG1   0x73722930
+#define SDRAM_CONFIG2   0x47770000
+#define SDRAM_TAPDELAY  0x10000000
+
+/* Use ON-Chip SRAM until RAM will be available */
+#define CONFIG_SYS_INIT_RAM_ADDR	MPC5XXX_SRAM
+#ifdef CONFIG_POST
+/* preserve space for the post_word at end of on-chip SRAM */
+#define CONFIG_SYS_INIT_RAM_END	MPC5XXX_SRAM_POST_SIZE
+#else
+#define CONFIG_SYS_INIT_RAM_END	MPC5XXX_SRAM_SIZE
+#endif
+
+#define CONFIG_SYS_MONITOR_BASE    TEXT_BASE
+#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
+#   define CONFIG_SYS_RAMBOOT		1
+#endif
+
+#define CONFIG_SYS_MONITOR_LEN		(192 << 10)
+#define CONFIG_SYS_MALLOC_LEN		(512 << 10)
+#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)
+
+/*
+ * Ethernet configuration
+ */
+#define CONFIG_MPC5xxx_FEC	1
+#define CONFIG_MPC5xxx_FEC_MII100
+#define CONFIG_PHY_ADDR		0x00
+#define CONFIG_MII		1
+
+/*use  Hardware WDT */
+#define CONFIG_HW_WATCHDOG
+
+#define CONFIG_SYS_HZ			1000	/* decrementer freq: 1 ms ticks */
+
+#define CONFIG_SYS_CACHELINE_SIZE	32	/* For MPC5xxx CPUs		*/
+#if defined(CONFIG_CMD_KGDB)
+#  define CONFIG_SYS_CACHELINE_SHIFT	5	/* log base 2 of the above value*/
+#endif
+
+/*
+ * Various low-level settings
+ */
+#if defined(CONFIG_MPC5200)
+#define CONFIG_SYS_HID0_INIT		HID0_ICE | HID0_ICFI
+#define CONFIG_SYS_HID0_FINAL		HID0_ICE
+#else
+#define CONFIG_SYS_HID0_INIT		0
+#define CONFIG_SYS_HID0_FINAL		0
+#endif
+
+#define CONFIG_SYS_BOOTCS_START	CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_BOOTCS_SIZE		CONFIG_SYS_FLASH_SIZE
+#define CONFIG_SYS_CS0_START		CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_CS0_SIZE		CONFIG_SYS_FLASH_SIZE
+
+/* 8Mbit SRAM @0x80100000 */
+#define CONFIG_SYS_CS1_START		CONFIG_SYS_SRAM_BASE
+
+#define CONFIG_SYS_CS_BURST		0x00000000
+#define CONFIG_SYS_CS_DEADCYCLE	0x33333333
+
+/*-----------------------------------------------------------------------
+ * IDE/ATA stuff Supports IDE harddisk
+ *-----------------------------------------------------------------------
+ */
+
+#undef  CONFIG_IDE_8xx_PCCARD		/* Use IDE with PC Card	Adapter	*/
+
+#undef	CONFIG_IDE_8xx_DIRECT		/* Direct IDE    not supported	*/
+#undef	CONFIG_IDE_LED			/* LED   for ide not supported	*/
+
+#define CONFIG_SYS_IDE_MAXBUS		1	/* max. 1 IDE bus	*/
+
+#define CONFIG_IDE_PREINIT	1
+
+#define CONFIG_SYS_ATA_IDE0_OFFSET	0x0000
+
+#define CONFIG_SYS_ATA_BASE_ADDR	MPC5XXX_ATA
+
+/* Offset for data I/O			*/
+#define CONFIG_SYS_ATA_DATA_OFFSET	(0x0060)
+
+/* Offset for normal register accesses	*/
+#define CONFIG_SYS_ATA_REG_OFFSET	(CONFIG_SYS_ATA_DATA_OFFSET)
+
+/* Offset for alternate registers	*/
+#define CONFIG_SYS_ATA_ALT_OFFSET	(0x005C)
+
+/* Interval between registers	*/
+#define CONFIG_SYS_ATA_STRIDE          4
+
+#define CONFIG_ATAPI            1
+
+#define OF_CPU			"PowerPC,5200 at 0"
+#define OF_SOC			"soc5200@f0000000"
+#define OF_TBCLK		(bd->bi_busfreq / 4)
+#define OF_STDOUT_PATH		"/soc5200 at f0000000/serial at 2000"
+
+#endif /* __MANROLAND_MPC52XX__COMMON_H */
diff --git a/include/configs/mucmc52.h b/include/configs/mucmc52.h
index ae60cd2..07ed046 100644
--- a/include/configs/mucmc52.h
+++ b/include/configs/mucmc52.h
@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2008
+ * (C) Copyright 2008-2009
  * Heiko Schocher, DENX Software Engineering, hs at denx.de.
  *
  * (C) Copyright 2003-2005
@@ -32,260 +32,51 @@
  * (easy to change)
  */

-#define	CONFIG_MPC5xxx		1	/* This is an MPC5xxx CPU		*/
-#define	CONFIG_MPC5200		1	/* (more precisely an MPC5200 CPU)	*/
-#define	CONFIG_MUCMC52		1	/* MUCMC52 board			*/
+#define	CONFIG_MUCMC52		1	/* MUCMC52 board	*/
+#define	CONFIG_HOSTNAME		mucmc52

-#define	CONFIG_SYS_MPC5XXX_CLKIN	33000000 /* ... running at 33.000000MHz		*/
-
-#define	BOOTFLAG_COLD		0x01	/* Normal Power-On: Boot from FLASH	*/
-#define	BOOTFLAG_WARM		0x02	/* Software reboot			*/
-
-#define	CONFIG_SYS_CACHELINE_SIZE	32	/* For MPC5xxx CPUs			*/
-#if (CONFIG_COMMANDS & CONFIG_SYS_CMD_KGDB)
-#  define	CONFIG_SYS_CACHELINE_SHIFT	5	/* log base 2 of the above value	*/
-#endif
-
-#define	CONFIG_BOARD_EARLY_INIT_R
+#include "manroland/common.h"
+#include "manroland/mpc5200-common.h"

 #define	CONFIG_LAST_STAGE_INIT
-
-#define	CONFIG_HIGH_BATS	1	/* High BATs supported			*/
 /*
  * Serial console configuration
  */
-#define	CONFIG_PSC_CONSOLE	1	/* console is on PSC1	*/
 #define	CONFIG_BAUDRATE		38400	/* ... at 38400 bps	*/
-#define	CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 230400 }
-
-/* Partitions */
-#define	CONFIG_DOS_PARTITION

-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define	CONFIG_CMD_DATE
-#define	CONFIG_CMD_DISPLAY
-#define	CONFIG_CMD_DHCP
-#define	CONFIG_CMD_EEPROM
-#define	CONFIG_CMD_FAT
-#define	CONFIG_CMD_I2C
-#define	CONFIG_CMD_DTT
-#define	CONFIG_CMD_IDE
-#define	CONFIG_CMD_MII
-#define	CONFIG_CMD_NFS
 #define	CONFIG_CMD_PCI
-#define	CONFIG_CMD_PING
-#define	CONFIG_CMD_SNTP
-
-#define	CONFIG_TIMESTAMP	1	/* Print image info with timestamp */
-
-#if (TEXT_BASE == 0xFFF00000) /* Boot low */
-#   define	CONFIG_SYS_LOWBOOT		1
-#endif
-
-/*
- * Autobooting
- */
-#define	CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds */
-
-#define	CONFIG_PREBOOT	"echo;" \
-	"echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
-	"echo"
-
-#undef	CONFIG_BOOTARGS
-
-#define	CONFIG_EXTRA_ENV_SETTINGS					\
-	"netdev=eth0\0"							\
-	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
-		"nfsroot=${serverip}:${rootpath}\0"			\
-	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
-	"addip=setenv bootargs ${bootargs} "				\
-		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
-		":${hostname}:${netdev}:off panic=1\0"			\
-	"flash_nfs=run nfsargs addip;"					\
-		"bootm ${kernel_addr}\0"				\
-	"net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0"	\
-	"rootpath=/opt/eldk/ppc_82xx\0"					\
-	""
-
-#define	CONFIG_BOOTCOMMAND	"run net_nfs"
-
-#define	CONFIG_MISC_INIT_R	1
-
-/*
- * IPB Bus clocking configuration.
- */
-#undef	CONFIG_SYS_IPBCLK_EQUALS_XLBCLK		/* define for 133MHz speed */
-
-/*
- * I2C configuration
- */
-#define	CONFIG_HARD_I2C		1	/* I2C with hardware support */
-#define	CONFIG_SYS_I2C_MODULE		2	/* Select I2C module #1 or #2 */
-
-#define	CONFIG_SYS_I2C_SPEED		100000 /* 100 kHz */
-#define	CONFIG_SYS_I2C_SLAVE		0x7F
-
-/*
- * EEPROM configuration
- */
-#define	CONFIG_SYS_I2C_EEPROM_ADDR		0x58
-#define	CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
-#define	CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
-#define	CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	10
-
-/*
- * RTC configuration
- */
-#define	CONFIG_RTC_PCF8563
-#define	CONFIG_SYS_I2C_RTC_ADDR		0x51
-
-/* I2C SYSMON (LM75) */
-#define	CONFIG_DTT_LM81			1	/* ON Semi's LM75		*/
-#define	CONFIG_DTT_SENSORS		{0}	/* Sensor addresses		*/
-#define	CONFIG_SYS_DTT_MAX_TEMP		70
-#define	CONFIG_SYS_DTT_LOW_TEMP		-30
-#define	CONFIG_SYS_DTT_HYSTERESIS		3

 /*
  * Flash configuration
  */
-#define	CONFIG_SYS_FLASH_BASE		0xFF800000
-
-#define	CONFIG_SYS_FLASH_SIZE		0x00800000 /* 8 MByte */
-#define	CONFIG_SYS_MAX_FLASH_SECT	67	/* max num of sects on one chip */
-
-#define	CONFIG_ENV_ADDR		(TEXT_BASE+0x40000) /* second sector */
-#define	CONFIG_SYS_MAX_FLASH_BANKS	1	/* max num of flash banks
-					   (= chip selects) */
-#define	CONFIG_SYS_FLASH_ERASE_TOUT	240000	/* Flash Erase Timeout (in ms)	*/
-#define	CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Flash Write Timeout (in ms)	*/
-
-#define	CONFIG_FLASH_CFI_DRIVER
-#define	CONFIG_SYS_FLASH_CFI
-#define	CONFIG_SYS_FLASH_EMPTY_INFO
-#define	CONFIG_SYS_FLASH_CFI_AMD_RESET
+#define	CONFIG_SYS_MAX_FLASH_SECT	67

 /*
  * Environment settings
  */
-#define	CONFIG_ENV_IS_IN_FLASH	1
-#define	CONFIG_ENV_SIZE		0x4000
 #define	CONFIG_ENV_SECT_SIZE	0x20000
-#define	CONFIG_ENV_OFFSET_REDUND   (CONFIG_ENV_OFFSET+CONFIG_ENV_SECT_SIZE)
-#define	CONFIG_ENV_SIZE_REDUND     (CONFIG_ENV_SIZE)

 /*
  * Memory map
  */
-#define	CONFIG_SYS_MBAR		0xF0000000
-#define	CONFIG_SYS_SDRAM_BASE		0x00000000
-#define	CONFIG_SYS_DEFAULT_MBAR	0x80000000
-#define	CONFIG_SYS_DISPLAY_BASE	0x80600000
 #define	CONFIG_SYS_STATUS1_BASE	0x80600200
 #define	CONFIG_SYS_STATUS2_BASE	0x80600300
 #define	CONFIG_SYS_PMI_UNI_BASE	0x80800000
 #define	CONFIG_SYS_PMI_BROAD_BASE	0x80810000

-/* Settings for XLB = 132 MHz */
-#define	SDRAM_DDR	 1
-#define	SDRAM_MODE      0x018D0000
-#define	SDRAM_EMODE     0x40090000
-#define	SDRAM_CONTROL   0x714f0f00
-#define	SDRAM_CONFIG1   0x73722930
-#define	SDRAM_CONFIG2   0x47770000
-#define	SDRAM_TAPDELAY  0x10000000
-
-/* Use ON-Chip SRAM until RAM will be available */
-#define	CONFIG_SYS_INIT_RAM_ADDR	MPC5XXX_SRAM
-#ifdef CONFIG_POST
-/* preserve space for the post_word at end of on-chip SRAM */
-#define	CONFIG_SYS_INIT_RAM_END	MPC5XXX_SRAM_POST_SIZE
-#else
-#define	CONFIG_SYS_INIT_RAM_END	MPC5XXX_SRAM_SIZE
-#endif
-
-#define	CONFIG_SYS_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */
-#define	CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
-#define	CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
-
-#define	CONFIG_SYS_MONITOR_BASE	TEXT_BASE
-#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
-#   define	CONFIG_SYS_RAMBOOT	1
-#endif
-
-#define	CONFIG_SYS_MONITOR_LEN		(192 << 10)	/* Reserve 192 kB for Monitor	*/
-#define	CONFIG_SYS_MALLOC_LEN		(512 << 10)	/* Reserve 128 kB for malloc()	*/
-#define	CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
-
-/*
- * Ethernet configuration
- */
-#define	CONFIG_MPC5xxx_FEC	1
-#define CONFIG_MPC5xxx_FEC_MII100
-#define	CONFIG_PHY_ADDR		0x00
-#define	CONFIG_MII		1		/* MII PHY management		*/
-
 /*
  * GPIO configuration
  */
 #define	CONFIG_SYS_GPS_PORT_CONFIG	0x8D550644

-/*use  Hardware WDT */
-#define CONFIG_HW_WATCHDOG
+#define	CONFIG_SYS_MEMTEST_START	0x00100000
+#define	CONFIG_SYS_MEMTEST_END		0x00f00000

-/*
- * Miscellaneous configurable options
- */
-#define	CONFIG_SYS_LONGHELP			/* undef to save memory	    */
-#define	CONFIG_SYS_PROMPT		"=> "	/* Monitor Command Prompt   */
-#if (CONFIG_COMMANDS & CONFIG_SYS_CMD_KGDB)
-#define	CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size  */
-#else
-#define	CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size  */
-#endif
-#define	CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define	CONFIG_SYS_MAXARGS		16	/* max number of command args	*/
-#define	CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/
-
-/* Enable an alternate, more extensive memory test */
-#define	CONFIG_SYS_ALT_MEMTEST
-
-#define	CONFIG_SYS_MEMTEST_START	0x00100000	/* memtest works on */
-#define	CONFIG_SYS_MEMTEST_END		0x00f00000	/* 1 ... 15 MB in DRAM	*/
+#define	CONFIG_SYS_LOAD_ADDR		0x100000

-#define	CONFIG_SYS_LOAD_ADDR		0x100000	/* default load address */
-
-#define	CONFIG_SYS_HZ			1000	/* decrementer freq: 1 ms ticks */
-
-/*
- * Enable loopw commando. This has only affect, if CONFIG_SYS_CMD_MEM is defined,
- * which is normally part of the default commands (CFV_CMD_DFL)
- */
-#define	CONFIG_LOOPW
-
-/*
- * Various low-level settings
- */
-#if defined(CONFIG_MPC5200)
-#define	CONFIG_SYS_HID0_INIT		HID0_ICE | HID0_ICFI
-#define	CONFIG_SYS_HID0_FINAL		HID0_ICE
-#else
-#define	CONFIG_SYS_HID0_INIT		0
-#define	CONFIG_SYS_HID0_FINAL		0
-#endif
-
-#define	CONFIG_SYS_BOOTCS_START	CONFIG_SYS_FLASH_BASE
-#define	CONFIG_SYS_BOOTCS_SIZE		CONFIG_SYS_FLASH_SIZE
 #define	CONFIG_SYS_BOOTCS_CFG		0x0004FB00
-#define	CONFIG_SYS_CS0_START		CONFIG_SYS_FLASH_BASE
-#define	CONFIG_SYS_CS0_SIZE		CONFIG_SYS_FLASH_SIZE

 /* 8Mbit SRAM @0x80100000 */
-#define	CONFIG_SYS_CS1_START		0x80100000
 #define	CONFIG_SYS_CS1_SIZE		0x00100000
 #define	CONFIG_SYS_CS1_CFG		0x00019B00

@@ -309,42 +100,12 @@
 #define	CONFIG_SYS_CS7_SIZE		0x00008000
 #define	CONFIG_SYS_CS7_CFG		0xFF00F930

-#define	CONFIG_SYS_CS_BURST		0x00000000
-#define	CONFIG_SYS_CS_DEADCYCLE	0x33333333
-
 /*-----------------------------------------------------------------------
  * IDE/ATA stuff Supports IDE harddisk
  *-----------------------------------------------------------------------
  */
-
-#undef	CONFIG_IDE_8xx_PCCARD		/* Use IDE with PC Card	Adapter	*/
-
-#undef	CONFIG_IDE_8xx_DIRECT		/* Direct IDE    not supported	*/
-#undef	CONFIG_IDE_LED			/* LED   for ide not supported	*/
-
-#define	CONFIG_SYS_IDE_MAXBUS		1	/* max. 1 IDE bus		*/
 #define	CONFIG_SYS_IDE_MAXDEVICE	1	/* max. 2 drives per IDE bus	*/

-#define	CONFIG_IDE_PREINIT	1
-
-#define	CONFIG_SYS_ATA_IDE0_OFFSET	0x0000
-
-#define	CONFIG_SYS_ATA_BASE_ADDR	MPC5XXX_ATA
-
-/* Offset for data I/O			*/
-#define	CONFIG_SYS_ATA_DATA_OFFSET	(0x0060)
-
-/* Offset for normal register accesses	*/
-#define	CONFIG_SYS_ATA_REG_OFFSET	(CONFIG_SYS_ATA_DATA_OFFSET)
-
-/* Offset for alternate registers	*/
-#define	CONFIG_SYS_ATA_ALT_OFFSET	(0x005C)
-
-/* Interval between registers           */
-#define	CONFIG_SYS_ATA_STRIDE          4
-
-#define	CONFIG_ATAPI            1
-
 /*
  * PCI Mapping:
  * 0x40000000 - 0x4fffffff - PCI Memory
diff --git a/include/configs/uc101.h b/include/configs/uc101.h
index 87cb4e5..fc0b103 100644
--- a/include/configs/uc101.h
+++ b/include/configs/uc101.h
@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2003-2006
+ * (C) Copyright 2003-2009
  * Heiko Schocher, DENX Software Engineering, hs at denx.de.
  *
  * See file CREDITS for list of people who contributed to this
@@ -29,29 +29,16 @@
  * (easy to change)
  */

-#define CONFIG_MPC5xxx		1	/* This is an MPC5xxx CPU		*/
-#define CONFIG_MPC5200		1	/* (more precisely an MPC5200 CPU)	*/
-#define CONFIG_UC101		1	/* UC101 board			*/
+#define CONFIG_UC101		1	/* UC101 board		*/
+#define CONFIG_HOSTNAME		uc101

-#define CONFIG_SYS_MPC5XXX_CLKIN	33000000 /* ... running at 33.000000MHz		*/
-
-#define BOOTFLAG_COLD		0x01	/* Normal Power-On: Boot from FLASH	*/
-#define BOOTFLAG_WARM		0x02	/* Software reboot			*/
-
-#define CONFIG_BOARD_EARLY_INIT_R
-
-#define CONFIG_HIGH_BATS	1	/* High BATs supported 			*/
+#include "manroland/common.h"
+#include "manroland/mpc5200-common.h"

 /*
  * Serial console configuration
  */
-#define CONFIG_PSC_CONSOLE	1	/* console is on PSC1	*/
 #define CONFIG_BAUDRATE		115200	/* ... at 115200 bps	*/
-#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 230400 }
-
-/* Partitions */
-#define CONFIG_DOS_PARTITION
-

 /*
  * BOOTP options
@@ -61,243 +48,40 @@
 #define CONFIG_BOOTP_GATEWAY
 #define CONFIG_BOOTP_HOSTNAME

-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_DATE
-#define CONFIG_CMD_DISPLAY
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_EEPROM
-#define CONFIG_CMD_I2C
-#define CONFIG_CMD_DTT
-#define CONFIG_CMD_IDE
-#define CONFIG_CMD_FAT
-#define CONFIG_CMD_NFS
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_SNTP
-
-
-#define	CONFIG_TIMESTAMP	1	/* Print image info with timestamp */
-
-#if (TEXT_BASE == 0xFFF00000) /* Boot low */
-#   define CONFIG_SYS_LOWBOOT		1
-#endif
-
-/*
- * Autobooting
- */
-#define CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds */
-
-#define CONFIG_PREBOOT	"echo;" \
-	"echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
-	"echo"
-
-#undef	CONFIG_BOOTARGS
-
-#define CONFIG_EXTRA_ENV_SETTINGS					\
-	"netdev=eth0\0"							\
-	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
-		"nfsroot=${serverip}:${rootpath}\0"			\
-	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
-	"addwdt=setenv bootargs ${bootargs} wdt=off"			\
-	"addip=setenv bootargs ${bootargs} "				\
-		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
-		":${hostname}:${netdev}:off panic=1\0"			\
-	"flash_nfs=run nfsargs addip;"					\
-		"bootm ${kernel_addr}\0"				\
-	"net_nfs=tftp 300000 ${bootfile};run nfsargs addip addwdt;bootm\0" \
-	"rootpath=/opt/eldk/ppc_82xx\0"					\
-	""
-
-#define CONFIG_BOOTCOMMAND	"run net_nfs"
-
-#define CONFIG_MISC_INIT_R	1
-
-/*
- * IPB Bus clocking configuration.
- */
-#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK		/* define for 133MHz speed */
-
-/*
- * I2C configuration
- */
-#define CONFIG_HARD_I2C		1	/* I2C with hardware support */
-#define CONFIG_SYS_I2C_MODULE		2	/* Select I2C module #1 or #2 */
-
-#define CONFIG_SYS_I2C_SPEED		100000 /* 100 kHz */
-#define CONFIG_SYS_I2C_SLAVE		0x7F
-
-/*
- * EEPROM configuration
- */
-#define CONFIG_SYS_I2C_EEPROM_ADDR		0x58
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	10
-
-/*
- * RTC configuration
- */
-#define CONFIG_RTC_PCF8563
-#define CONFIG_SYS_I2C_RTC_ADDR		0x51
-
-/* I2C SYSMON (LM75) */
-#define CONFIG_DTT_LM81			1	/* ON Semi's LM75		*/
-#define CONFIG_DTT_SENSORS		{0}	/* Sensor addresses		*/
-#define CONFIG_SYS_DTT_MAX_TEMP		70
-#define CONFIG_SYS_DTT_LOW_TEMP		-30
-#define CONFIG_SYS_DTT_HYSTERESIS		3
-
 /*
  * Flash configuration
  */
-#define CONFIG_SYS_FLASH_BASE		0xFF800000
-
-#define CONFIG_SYS_FLASH_SIZE		0x00800000 /* 8 MByte */
-#define CONFIG_SYS_MAX_FLASH_SECT	140	/* max num of sects on one chip */
-
-#define CONFIG_ENV_ADDR		(TEXT_BASE+0x40000) /* second sector */
-#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max num of flash banks
-					   (= chip selects) */
-#define CONFIG_SYS_FLASH_ERASE_TOUT	240000	/* Flash Erase Timeout (in ms)	*/
-#define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Flash Write Timeout (in ms)	*/
-
-#define CONFIG_FLASH_CFI_DRIVER
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_SYS_FLASH_EMPTY_INFO
-#define CONFIG_SYS_FLASH_CFI_AMD_RESET
+#define CONFIG_SYS_MAX_FLASH_SECT	140

 /*
  * Environment settings
  */
-#define CONFIG_ENV_IS_IN_FLASH	1
-#define CONFIG_ENV_SIZE		0x4000
 #define CONFIG_ENV_SECT_SIZE	0x10000
-#define CONFIG_ENV_OFFSET_REDUND   (CONFIG_ENV_OFFSET+CONFIG_ENV_SECT_SIZE)
-#define CONFIG_ENV_SIZE_REDUND     (CONFIG_ENV_SIZE)

 /*
  * Memory map
  */
-#define CONFIG_SYS_MBAR		0xF0000000
-#define CONFIG_SYS_DEFAULT_MBAR	0x80000000
-
-#define CONFIG_SYS_SDRAM_BASE		0x00000000
-#define CONFIG_SYS_SRAM_BASE		0x80100000	/* CS 1 */
-#define CONFIG_SYS_DISPLAY_BASE	0x80600000	/* CS 3 */
 #define	CONFIG_SYS_IB_MASTER		0xc0510000	/* CS 6 */
 #define CONFIG_SYS_IB_EPLD		0xc0500000	/* CS 7 */

-/* Settings for XLB = 132 MHz */
-#define SDRAM_DDR	 1
-#define SDRAM_MODE      0x018D0000
-#define SDRAM_EMODE     0x40090000
-#define SDRAM_CONTROL   0x714f0f00
-#define SDRAM_CONFIG1   0x73722930
-#define SDRAM_CONFIG2   0x47770000
-#define SDRAM_TAPDELAY  0x10000000
-
 /* SRAM */
-#define SRAM_BASE		CONFIG_SYS_SRAM_BASE	/* SRAM base address	*/
+#define SRAM_BASE		CONFIG_SYS_SRAM_BASE
 #define SRAM_LEN		0x1fffff
 #define SRAM_END		(SRAM_BASE + SRAM_LEN)

-/* Use ON-Chip SRAM until RAM will be available */
-#define CONFIG_SYS_INIT_RAM_ADDR	MPC5XXX_SRAM
-#ifdef CONFIG_POST
-/* preserve space for the post_word at end of on-chip SRAM */
-#define CONFIG_SYS_INIT_RAM_END	MPC5XXX_SRAM_POST_SIZE
-#else
-#define CONFIG_SYS_INIT_RAM_END	MPC5XXX_SRAM_SIZE
-#endif
-
-
-#define CONFIG_SYS_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
-
-#define CONFIG_SYS_MONITOR_BASE    TEXT_BASE
-#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
-#   define CONFIG_SYS_RAMBOOT		1
-#endif
-
-#define CONFIG_SYS_MONITOR_LEN		(192 << 10)	/* Reserve 192 kB for Monitor	*/
-#define CONFIG_SYS_MALLOC_LEN		(512 << 10)	/* Reserve 128 kB for malloc()	*/
-#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
-
-/*
- * Ethernet configuration
- */
-#define CONFIG_MPC5xxx_FEC	1
-#define CONFIG_MPC5xxx_FEC_MII100
-#define CONFIG_PHY_ADDR		0x00
-#define CONFIG_MII		1
-
 /*
  * GPIO configuration
  */
 #define CONFIG_SYS_GPS_PORT_CONFIG	0x4d558044

-/*use  Hardware WDT */
-#define CONFIG_HW_WATCHDOG
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP			/* undef to save memory	    */
-#define CONFIG_SYS_PROMPT		"=> "	/* Monitor Command Prompt   */
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size  */
-#else
-#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size  */
-#endif
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS		16	/* max number of command args	*/
-#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/
-
-/* Enable an alternate, more extensive memory test */
-#define CONFIG_SYS_ALT_MEMTEST
-
-#define CONFIG_SYS_MEMTEST_START	0x00300000	/* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x00f00000	/* 3 ... 15 MB in DRAM	*/
-
-#define CONFIG_SYS_LOAD_ADDR		0x300000	/* default load address */
+#define CONFIG_SYS_MEMTEST_START	0x00300000
+#define CONFIG_SYS_MEMTEST_END		0x00f00000

-#define CONFIG_SYS_HZ			1000	/* decrementer freq: 1 ms ticks */
+#define CONFIG_SYS_LOAD_ADDR		0x300000

-#define CONFIG_SYS_CACHELINE_SIZE	32	/* For MPC5xxx CPUs			*/
-#if defined(CONFIG_CMD_KGDB)
-#  define CONFIG_SYS_CACHELINE_SHIFT	5	/* log base 2 of the above value	*/
-#endif
-
-/*
- * Enable loopw command.
- */
-#define CONFIG_LOOPW
-
-/*
- * Various low-level settings
- */
-#if defined(CONFIG_MPC5200)
-#define CONFIG_SYS_HID0_INIT		HID0_ICE | HID0_ICFI
-#define CONFIG_SYS_HID0_FINAL		HID0_ICE
-#else
-#define CONFIG_SYS_HID0_INIT		0
-#define CONFIG_SYS_HID0_FINAL		0
-#endif
-
-#define CONFIG_SYS_BOOTCS_START	CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_BOOTCS_SIZE		CONFIG_SYS_FLASH_SIZE
 #define CONFIG_SYS_BOOTCS_CFG		0x00045D00
-#define CONFIG_SYS_CS0_START		CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_CS0_SIZE		CONFIG_SYS_FLASH_SIZE

 /* 8Mbit SRAM @0x80100000 */
-#define CONFIG_SYS_CS1_START		CONFIG_SYS_SRAM_BASE
 #define CONFIG_SYS_CS1_SIZE		0x00200000
 #define CONFIG_SYS_CS1_CFG		0x21D00

@@ -316,41 +100,12 @@
 #define CONFIG_SYS_CS7_SIZE		0x00010000
 #define CONFIG_SYS_CS7_CFG		0x00081800

-#define CONFIG_SYS_CS_BURST		0x00000000
-#define CONFIG_SYS_CS_DEADCYCLE	0x33333333
-
 /*-----------------------------------------------------------------------
  * IDE/ATA stuff Supports IDE harddisk
  *-----------------------------------------------------------------------
  */

-#undef  CONFIG_IDE_8xx_PCCARD		/* Use IDE with PC Card	Adapter	*/
-
-#undef	CONFIG_IDE_8xx_DIRECT		/* Direct IDE    not supported	*/
-#undef	CONFIG_IDE_LED			/* LED   for ide not supported	*/
-
-#define CONFIG_SYS_IDE_MAXBUS		1	/* max. 1 IDE bus		*/
-#define CONFIG_SYS_IDE_MAXDEVICE	2	/* max. 2 drives per IDE bus	*/
-
-#define CONFIG_IDE_PREINIT	1
-
-#define CONFIG_SYS_ATA_IDE0_OFFSET	0x0000
-
-#define CONFIG_SYS_ATA_BASE_ADDR	MPC5XXX_ATA
-
-/* Offset for data I/O			*/
-#define CONFIG_SYS_ATA_DATA_OFFSET	(0x0060)
-
-/* Offset for normal register accesses	*/
-#define CONFIG_SYS_ATA_REG_OFFSET	(CONFIG_SYS_ATA_DATA_OFFSET)
-
-/* Offset for alternate registers	*/
-#define CONFIG_SYS_ATA_ALT_OFFSET	(0x005C)
-
-/* Interval between registers                                                */
-#define CONFIG_SYS_ATA_STRIDE          4
-
-#define CONFIG_ATAPI            1
+#define CONFIG_SYS_IDE_MAXDEVICE	1	/* max. 2 drives per IDE bus*/

 /*---------------------------------------------------------------------*/
 /* Display addresses						       */
-- 
1.6.0.6

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

[U-Boot] [PATCHv3 1/2] mpc5200, mucmc52, uc101: config cleanup

[Detlev Zundel]

Hi Heiko,

> - as this boards are similiar, collect common config option
>   in manroland/common.h and manroland/mpc52xx-common.h
>   for mpc5200 specific common options for this manufacturer.
> - add OF support
> - update default environment
>
> Signed-off-by: Heiko Schocher <hs@denx.de>

Acked-by: Detlev Zundel <dzu@denx.de>

Thanks
  Detlev

-- 
Some people seem to think that C is a real programming language, but they are
sadly mistaken.  It really is about writing almost-portable assembly language
[...]               -- Linus Torvalds 10404265599082718160noreply at blogger.com
--
DENX Software Engineering GmbH,      MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich,  Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: dzu at denx.de

[U-Boot] [PATCHv3 2/2] mucmc52, uc101: delete ata@3a00 node, if no CF card is detected

[Heiko Schocher]

U-Boot can detect, if a ide device is present or not.
If not and this new config option is activated, u-boot
removes the ata node from the DTS before booting Linux,
so the Linux IDE driver didn;t crashs, when probing the
device. This is needed for buggy hardware (uc101) where
no pull down resistor is connected to the signal IDE5V_DD7.

Signed-off-by: Heiko Schocher <hs@denx.de>
---

changes since v1:
- added comment from Wolfgang Denk, to move this to a more
  common place, so others can also use it, and made it
  therefore per CONFIG_OF_IDE_FIXUP selectable.

changes since v2:
- add CONFIG_OF_IDE_FIXUP to mpc5200-common.h

 README                                     |    9 +++++++++
 cpu/mpc5xxx/cpu.c                          |   18 ++++++++++++++++++
 include/configs/manroland/mpc5200-common.h |    1 +
 3 files changed, 28 insertions(+), 0 deletions(-)

diff --git a/README b/README
index ff4ed8b..b9364bf 100644
--- a/README
+++ b/README
@@ -386,6 +386,15 @@ The following options need to be configured:
 		This define fills in the correct boot CPU in the boot
 		param header, the default value is zero if undefined.

+		CONFIG_OF_IDE_FIXUP
+
+		U-Boot can detect, if a ide device is present or not.
+		If not and this config option is activated, u-boot
+		removes the ata node from the DTS before booting Linux,
+		so the Linux IDE driver didn;t crashs, when probing the
+		device. This is needed for buggy hardware (uc101) where
+		no pull down resistor is connected to the signal IDE5V_DD7.
+
 - vxWorks boot parameters:

 		bootvx constructs a valid bootline using the following
diff --git a/cpu/mpc5xxx/cpu.c b/cpu/mpc5xxx/cpu.c
index f6258c7..a2fc323 100644
--- a/cpu/mpc5xxx/cpu.c
+++ b/cpu/mpc5xxx/cpu.c
@@ -125,6 +125,9 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 	uchar enetaddr[6];
 	char * eth_path = "/" OF_SOC "/ethernet at 3000";
 #endif
+#if defined(CONFIG_OF_IDE_FIXUP)
+	extern block_dev_desc_t ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE];
+#endif

 	do_fixup_by_path_u32(blob, cpu_path, "timebase-frequency", OF_TBCLK, 1);
 	do_fixup_by_path_u32(blob, cpu_path, "bus-frequency", bd->bi_busfreq, 1);
@@ -137,6 +140,21 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 	do_fixup_by_path(blob, eth_path, "mac-address", enetaddr, 6, 0);
 	do_fixup_by_path(blob, eth_path, "local-mac-address", enetaddr, 6, 0);
 #endif
+#if defined(CONFIG_OF_IDE_FIXUP)
+	if (ide_dev_desc[0].type == DEV_TYPE_UNKNOWN) {
+		/* NO CF card detected -> delete ata node in DTS */
+		int nodeoffset = 0;
+		char nodename[] = "/soc5200 at f0000000/ata at 3a00";
+
+		nodeoffset = fdt_path_offset (blob, nodename);
+		if (nodeoffset >= 0) {
+			fdt_del_node(blob, nodeoffset);
+		} else
+			printf("%s: cannot find %s node err:%s\n",
+				__func__, nodename, fdt_strerror(nodeoffset));
+	}
+
+#endif
 }
 #endif

diff --git a/include/configs/manroland/mpc5200-common.h b/include/configs/manroland/mpc5200-common.h
index 2f092b1..b29ef9b 100644
--- a/include/configs/manroland/mpc5200-common.h
+++ b/include/configs/manroland/mpc5200-common.h
@@ -225,5 +225,6 @@
 #define OF_SOC			"soc5200 at f0000000"
 #define OF_TBCLK		(bd->bi_busfreq / 4)
 #define OF_STDOUT_PATH		"/soc5200 at f0000000/serial at 2000"
+#define CONFIG_OF_IDE_FIXUP

 #endif /* __MANROLAND_MPC52XX__COMMON_H */
-- 
1.6.0.6


-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany