[U-Boot] [PATCH v3] TI: OMAP3: Overo Tobi ethernet support

Olof Johansson
2009-09-26T21:14:34Z

Add setup for ethernet on Tobi, allowing kernel/ramdisk to be loaded
over tftp.

This also refactors the smc911x driver to allow for detecting when the
chip is missing. I.e. the detect_chip() function is called earlier and
will abort gracefully when the Chip ID read returns all 1's.

Signed-off-by: Olof Johansson <olof@lixom.net>

---

Changes since last version:
* Incorporated auto-detect based on email discussion
* Refactored some smc911x probe to deal with the above
* Incorporated the GPIO library changes
* Removed the TOBI-specific config option due to the new auto-probe

Testing on non-Tobi carrier boards would be appreciated, since I don't
have any.

board/overo/overo.c | 59 ++++++++++++++++++++++++++++++++++++++
board/overo/overo.h | 63 +++++++++++++++++++++--------------------
drivers/net/smc911x.c | 14 +++++----
drivers/net/smc911x.h | 7 +++-
include/configs/omap3_overo.h | 17 ++++++++++-
5 files changed, 119 insertions(+), 41 deletions(-)

diff --git a/board/overo/overo.c b/board/overo/overo.c
index dd6d286..d42dc13 100644
--- a/board/overo/overo.c
+++ b/board/overo/overo.c
@@ -29,13 +29,20 @@
* MA 02111-1307 USA
*/
#include <common.h>
+#include <netdev.h>
#include <twl4030.h>
#include <asm/io.h>
#include <asm/arch/mux.h>
+#include <asm/arch/mem.h>
#include <asm/arch/sys_proto.h>
+#include <asm/arch/gpio.h>
#include <asm/mach-types.h>
#include "overo.h"

+#if defined(CONFIG_CMD_NET)
+static void setup_net_chip(void);
+#endif
+
/*
* Routine: board_init
* Description: Early hardware init.
@@ -62,6 +69,10 @@ int misc_init_r(void)
twl4030_power_init();
twl4030_led_init();

+#if defined(CONFIG_CMD_NET)
+ setup_net_chip();
+#endif
+
dieid_num_r();

return 0;
@@ -77,3 +88,51 @@ void set_muxconf_regs(void)
{
MUX_OVERO();
}
+
+#if defined(CONFIG_CMD_NET)
+/*
+ * Routine: setup_net_chip
+ * Description: Setting up the configuration GPMC registers specific to the
+ * Ethernet hardware.
+ */
+static void setup_net_chip(void)
+{
+ struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
+
+ /* Configure GPMC registers */
+ writel(NET_GPMC_CONFIG1, &gpmc_cfg->cs[5].config1);
+ writel(NET_GPMC_CONFIG2, &gpmc_cfg->cs[5].config2);
+ writel(NET_GPMC_CONFIG3, &gpmc_cfg->cs[5].config3);
+ writel(NET_GPMC_CONFIG4, &gpmc_cfg->cs[5].config4);
+ writel(NET_GPMC_CONFIG5, &gpmc_cfg->cs[5].config5);
+ writel(NET_GPMC_CONFIG6, &gpmc_cfg->cs[5].config6);
+ writel(NET_GPMC_CONFIG7, &gpmc_cfg->cs[5].config7);
+
+ /* Enable off mode for NWE in PADCONF_GPMC_NWE register */
+ writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
+ /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
+ writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
+ /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
+ writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
+ &ctrl_base->gpmc_nadv_ale);
+
+ /* Make GPIO 64 as output pin and send a magic pulse through it */
+ if (!omap_request_gpio(64)) {
+ omap_set_gpio_direction(64, 0);
+ omap_set_gpio_dataout(64, 1);
+ udelay(1);
+ omap_set_gpio_dataout(64, 0);
+ udelay(1);
+ omap_set_gpio_dataout(64, 1);
+ }
+}
+#endif
+
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC911X
+ rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
+#endif
+ return rc;
+}
diff --git a/board/overo/overo.h b/board/overo/overo.h
index d9fe74e..4c7ac27 100644
--- a/board/overo/overo.h
+++ b/board/overo/overo.h
@@ -83,43 +83,43 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)) /*SDRC_DQS2*/\
MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)) /*SDRC_DQS3*/\
/*GPMC*/\
- MUX_VAL(CP(GPMC_A1), (IDIS | PTD | DIS | M0)) /*GPMC_A1*/\
- MUX_VAL(CP(GPMC_A2), (IDIS | PTD | DIS | M0)) /*GPMC_A2*/\
- MUX_VAL(CP(GPMC_A3), (IDIS | PTD | DIS | M0)) /*GPMC_A3*/\
- MUX_VAL(CP(GPMC_A4), (IDIS | PTD | DIS | M0)) /*GPMC_A4*/\
- MUX_VAL(CP(GPMC_A5), (IDIS | PTD | DIS | M0)) /*GPMC_A5*/\
- MUX_VAL(CP(GPMC_A6), (IDIS | PTD | DIS | M0)) /*GPMC_A6*/\
- MUX_VAL(CP(GPMC_A7), (IDIS | PTD | DIS | M0)) /*GPMC_A7*/\
- MUX_VAL(CP(GPMC_A8), (IDIS | PTD | DIS | M0)) /*GPMC_A8*/\
- MUX_VAL(CP(GPMC_A9), (IDIS | PTD | DIS | M0)) /*GPMC_A9*/\
- MUX_VAL(CP(GPMC_A10), (IDIS | PTD | DIS | M0)) /*GPMC_A10*/\
- MUX_VAL(CP(GPMC_D0), (IEN | PTD | DIS | M0)) /*GPMC_D0*/\
- MUX_VAL(CP(GPMC_D1), (IEN | PTD | DIS | M0)) /*GPMC_D1*/\
- MUX_VAL(CP(GPMC_D2), (IEN | PTD | DIS | M0)) /*GPMC_D2*/\
- MUX_VAL(CP(GPMC_D3), (IEN | PTD | DIS | M0)) /*GPMC_D3*/\
- MUX_VAL(CP(GPMC_D4), (IEN | PTD | DIS | M0)) /*GPMC_D4*/\
- MUX_VAL(CP(GPMC_D5), (IEN | PTD | DIS | M0)) /*GPMC_D5*/\
- MUX_VAL(CP(GPMC_D6), (IEN | PTD | DIS | M0)) /*GPMC_D6*/\
- MUX_VAL(CP(GPMC_D7), (IEN | PTD | DIS | M0)) /*GPMC_D7*/\
- MUX_VAL(CP(GPMC_D8), (IEN | PTD | DIS | M0)) /*GPMC_D8*/\
- MUX_VAL(CP(GPMC_D9), (IEN | PTD | DIS | M0)) /*GPMC_D9*/\
- MUX_VAL(CP(GPMC_D10), (IEN | PTD | DIS | M0)) /*GPMC_D10*/\
- MUX_VAL(CP(GPMC_D11), (IEN | PTD | DIS | M0)) /*GPMC_D11*/\
- MUX_VAL(CP(GPMC_D12), (IEN | PTD | DIS | M0)) /*GPMC_D12*/\
- MUX_VAL(CP(GPMC_D13), (IEN | PTD | DIS | M0)) /*GPMC_D13*/\
- MUX_VAL(CP(GPMC_D14), (IEN | PTD | DIS | M0)) /*GPMC_D14*/\
- MUX_VAL(CP(GPMC_D15), (IEN | PTD | DIS | M0)) /*GPMC_D15*/\
+ MUX_VAL(CP(GPMC_A1), (IDIS | PTU | EN | M0)) /*GPMC_A1*/\
+ MUX_VAL(CP(GPMC_A2), (IDIS | PTU | EN | M0)) /*GPMC_A2*/\
+ MUX_VAL(CP(GPMC_A3), (IDIS | PTU | EN | M0)) /*GPMC_A3*/\
+ MUX_VAL(CP(GPMC_A4), (IDIS | PTU | EN | M0)) /*GPMC_A4*/\
+ MUX_VAL(CP(GPMC_A5), (IDIS | PTU | EN | M0)) /*GPMC_A5*/\
+ MUX_VAL(CP(GPMC_A6), (IDIS | PTU | EN | M0)) /*GPMC_A6*/\
+ MUX_VAL(CP(GPMC_A7), (IDIS | PTU | EN | M0)) /*GPMC_A7*/\
+ MUX_VAL(CP(GPMC_A8), (IDIS | PTU | EN | M0)) /*GPMC_A8*/\
+ MUX_VAL(CP(GPMC_A9), (IDIS | PTU | EN | M0)) /*GPMC_A9*/\
+ MUX_VAL(CP(GPMC_A10), (IDIS | PTU | EN | M0)) /*GPMC_A10*/\
+ MUX_VAL(CP(GPMC_D0), (IEN | PTU | EN | M0)) /*GPMC_D0*/\
+ MUX_VAL(CP(GPMC_D1), (IEN | PTU | EN | M0)) /*GPMC_D1*/\
+ MUX_VAL(CP(GPMC_D2), (IEN | PTU | EN | M0)) /*GPMC_D2*/\
+ MUX_VAL(CP(GPMC_D3), (IEN | PTU | EN | M0)) /*GPMC_D3*/\
+ MUX_VAL(CP(GPMC_D4), (IEN | PTU | EN | M0)) /*GPMC_D4*/\
+ MUX_VAL(CP(GPMC_D5), (IEN | PTU | EN | M0)) /*GPMC_D5*/\
+ MUX_VAL(CP(GPMC_D6), (IEN | PTU | EN | M0)) /*GPMC_D6*/\
+ MUX_VAL(CP(GPMC_D7), (IEN | PTU | EN | M0)) /*GPMC_D7*/\
+ MUX_VAL(CP(GPMC_D8), (IEN | PTU | EN | M0)) /*GPMC_D8*/\
+ MUX_VAL(CP(GPMC_D9), (IEN | PTU | EN | M0)) /*GPMC_D9*/\
+ MUX_VAL(CP(GPMC_D10), (IEN | PTU | EN | M0)) /*GPMC_D10*/\
+ MUX_VAL(CP(GPMC_D11), (IEN | PTU | EN | M0)) /*GPMC_D11*/\
+ MUX_VAL(CP(GPMC_D12), (IEN | PTU | EN | M0)) /*GPMC_D12*/\
+ MUX_VAL(CP(GPMC_D13), (IEN | PTU | EN | M0)) /*GPMC_D13*/\
+ MUX_VAL(CP(GPMC_D14), (IEN | PTU | EN | M0)) /*GPMC_D14*/\
+ MUX_VAL(CP(GPMC_D15), (IEN | PTU | EN | M0)) /*GPMC_D15*/\
MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)) /*GPMC_nCS0*/\
MUX_VAL(CP(GPMC_NCS1), (IDIS | PTU | EN | M0)) /*GPMC_nCS1*/\
MUX_VAL(CP(GPMC_NCS2), (IDIS | PTU | EN | M0)) /*GPMC_nCS2*/\
MUX_VAL(CP(GPMC_NCS3), (IEN | PTU | EN | M4)) /*GPIO_54*/\
/* - MMC1_WP*/\
MUX_VAL(CP(GPMC_NCS4), (IDIS | PTU | EN | M0)) /*GPMC_nCS4*/\
- MUX_VAL(CP(GPMC_NCS5), (IDIS | PTD | DIS | M0)) /*GPMC_nCS5*/\
+ MUX_VAL(CP(GPMC_NCS5), (IDIS | PTU | EN | M0)) /*GPMC_nCS5*/\
MUX_VAL(CP(GPMC_NCS6), (IEN | PTD | DIS | M0)) /*GPMC_nCS6*/\
MUX_VAL(CP(GPMC_NCS7), (IEN | PTU | EN | M0)) /*GPMC_nCS7*/\
MUX_VAL(CP(GPMC_NBE1), (IEN | PTD | DIS | M0)) /*GPMC_nCS3*/\
- MUX_VAL(CP(GPMC_CLK), (IDIS | PTD | DIS | M0)) /*GPMC_CLK*/\
+ MUX_VAL(CP(GPMC_CLK), (IDIS | PTU | EN | M0)) /*GPMC_CLK*/\
MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M0)) /*GPMC_nADV_ALE*/\
MUX_VAL(CP(GPMC_NOE), (IDIS | PTD | DIS | M0)) /*GPMC_nOE*/\
MUX_VAL(CP(GPMC_NWE), (IDIS | PTD | DIS | M0)) /*GPMC_nWE*/\
@@ -127,7 +127,7 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(GPMC_NWP), (IEN | PTD | DIS | M0)) /*GPMC_nWP*/\
MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M0)) /*GPMC_WAIT0*/\
MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M0)) /*GPMC_WAIT1*/\
- MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | DIS | M4)) /*GPIO_64*/\
+ MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M4)) /*GPIO_64*/\
/* - SMSC911X_NRES*/\
MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M0)) /*GPMC_nCS3*/\
/*DSS*/\
@@ -270,8 +270,8 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(MCSPI1_SOMI), (IEN | PTD | DIS | M0)) /*McSPI1_SOMI */\
MUX_VAL(CP(MCSPI1_CS0), (IEN | PTD | EN | M0)) /*McSPI1_CS0*/\
MUX_VAL(CP(MCSPI1_CS1), (IDIS | PTD | EN | M0)) /*McSPI1_CS1*/\
- MUX_VAL(CP(MCSPI1_CS2), (IEN | PTD | DIS | M4)) /*GPIO_176*/\
- /* - SMSC911X_IRQ*/\
+ MUX_VAL(CP(MCSPI1_CS2), (IEN | PTU | DIS | M4)) /*GPIO_176 */\
+ /* - LAN_INTR */\
MUX_VAL(CP(MCSPI1_CS3), (IEN | PTD | DIS | M3)) /*HSUSB2_DATA2*/\
MUX_VAL(CP(MCSPI2_CLK), (IEN | PTD | DIS | M3)) /*HSUSB2_DATA7*/\
MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTD | DIS | M3)) /*HSUSB2_DATA4*/\
@@ -378,4 +378,5 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)) /*sdrc_cke0*/\
MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | EN | M0)) /*sdrc_cke1*/

+
#endif
diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c
index 18a729c..b106ec9 100644
--- a/drivers/net/smc911x.c
+++ b/drivers/net/smc911x.c
@@ -146,10 +146,9 @@ static void smc911x_enable(struct eth_device *dev)

static int smc911x_init(struct eth_device *dev, bd_t * bd)
{
- printf(DRIVERNAME ": initializing\n");
+ struct chip_id *id = dev->priv;

- if (smc911x_detect_chip(dev))
- goto err_out;
+ printf(DRIVERNAME ": detected %s controller\n", id->name);

smc911x_reset(dev);

@@ -162,9 +161,6 @@ static int smc911x_init(struct eth_device *dev, bd_t * bd)
smc911x_enable(dev);

return 0;
-
-err_out:
- return -1;
}

static int smc911x_send(struct eth_device *dev,
@@ -268,6 +264,12 @@ int smc911x_initialize(u8 dev_num, int base_addr)
dev->recv = smc911x_rx;
sprintf(dev->name, "%s-%hu", DRIVERNAME, dev_num);

+ /* Try to detect chip. Will fail if not present. */
+ if (smc911x_detect_chip(dev)) {
+ free(dev);
+ return 0;
+ }
+
eth_register(dev);
return 0;
}
diff --git a/drivers/net/smc911x.h b/drivers/net/smc911x.h
index 053e330..d5bca63 100644
--- a/drivers/net/smc911x.h
+++ b/drivers/net/smc911x.h
@@ -441,7 +441,10 @@ static int smc911x_detect_chip(struct eth_device *dev)
unsigned long val, i;

val = smc911x_reg_read(dev, BYTE_TEST);
- if (val != 0x87654321) {
+ if (val == 0xffffffff) {
+ /* Special case -- no chip present */
+ return -1;
+ } else if (val != 0x87654321) {
printf(DRIVERNAME ": Invalid chip endian 0x%08lx\n", val);
return -1;
}
@@ -455,7 +458,7 @@ static int smc911x_detect_chip(struct eth_device *dev)
return -1;
}

- printf(DRIVERNAME ": detected %s controller\n", chip_ids[i].name);
+ dev->priv = (void *)&chip_ids[i];

return 0;
}
diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h
index 07a031b..1836233 100644
--- a/include/configs/omap3_overo.h
+++ b/include/configs/omap3_overo.h
@@ -28,7 +28,7 @@
#define CONFIG_OMAP 1 /* in a TI OMAP core */
#define CONFIG_OMAP34XX 1 /* which is a 34XX */
#define CONFIG_OMAP3430 1 /* which is in a 3430 */
-#define CONFIG_OMAP3_OVERO 1 /* working with overo */
+#define CONFIG_OMAP3_OVERO 1 /* working with overo */

#include <asm/arch/cpu.h> /* get chip and board defs */
#include <asm/arch/omap3.h>
@@ -105,8 +105,8 @@
#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
#undef CONFIG_CMD_IMI /* iminfo */
#undef CONFIG_CMD_IMLS /* List all found images */
-#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
#undef CONFIG_CMD_NFS /* NFS support */
+#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */

#define CONFIG_SYS_NO_FLASH
#define CONFIG_SYS_I2C_SPEED 100000
@@ -293,4 +293,17 @@ extern unsigned int boot_flash_sec;
extern unsigned int boot_flash_type;
#endif

+#if defined(CONFIG_CMD_NET)
+/*----------------------------------------------------------------------------
+ * SMSC9211 Ethernet from SMSC9118 family
+ *----------------------------------------------------------------------------
+ */
+
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC911X 1
+#define CONFIG_SMC911X_32_BIT
+#define CONFIG_SMC911X_BASE 0x2C000000
+
+#endif /* (CONFIG_CMD_NET) */
+
#endif /* __CONFIG_H */
--
1.6.0.4