[U-Boot] [PATCH V4 2/4] add TI DA8xx support: Add DA8xx cpu functions

[Tom <Tom.Rix@windriver.com>]

Nick Thompson wrote:
> From: Sekhar Nori <nsekhar@ti.com>
> 
> Provides initial support for TI OMAP-L1x/DA8xx SoC devices.
> See http://www.ti.com
> 
> Provides:
> Low level initialisation.
> System clock API.
> Timer control.
> 
> Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
> ---
> Applies to u-boot-ti
> 
>  cpu/arm926ejs/davinci/cpu.c |   43 ++++++++++++++++++++++++++++++++++++++++++-
>  cpu/arm926ejs/davinci/psc.c |   43 ++++++++++++++++++++++++++++++++++---------
>  2 files changed, 76 insertions(+), 10 deletions(-)
> 
> diff --git a/cpu/arm926ejs/davinci/cpu.c b/cpu/arm926ejs/davinci/cpu.c
> index 390cab8..a18f7e9 100644
> --- a/cpu/arm926ejs/davinci/cpu.c
> +++ b/cpu/arm926ejs/davinci/cpu.c
> @@ -23,7 +23,7 @@
>  #include <common.h>
>  #include <netdev.h>
>  #include <asm/arch/hardware.h>
> -
> +#include <asm/io.h>
>  
>  /* offsets from PLL controller base */
>  #define PLLC_PLLCTL	0x100
> @@ -60,6 +60,47 @@
>  #define DDR_PLLDIV	PLLC_PLLDIV1
>  #endif
>  
> +#ifdef CONFIG_SOC_DA8XX
> +const dv_reg * const sysdiv[7] = {
> +	&DAVINCI_PLLC_REGS->plldiv1, &DAVINCI_PLLC_REGS->plldiv2,
> +	&DAVINCI_PLLC_REGS->plldiv3, &DAVINCI_PLLC_REGS->plldiv4,
> +	&DAVINCI_PLLC_REGS->plldiv5, &DAVINCI_PLLC_REGS->plldiv6,
> +	&DAVINCI_PLLC_REGS->plldiv7
> +};
> +
> +int clk_get(enum davinci_clk_ids id)
> +{
> +	int pre_div = (readl(&DAVINCI_PLLC_REGS->prediv) &
> +		       DAVINCI_PPLC_DIV_MASK) + 1;
> +	int pllm = readl(&DAVINCI_PLLC_REGS->pllm) + 1;
> +	int post_div = (readl(&DAVINCI_PLLC_REGS->postdiv) &
> +			DAVINCI_PPLC_DIV_MASK) + 1;
> +	int pll_out = CONFIG_SYS_OSCIN_FREQ;

These register reads can be deferred till when they are
needed.  The various goto out's make some unnecessary.
This is an optional change.

Your other changes look fine.

Tom

> +
> +	if (id == DAVINCI_AUXCLK_CLKID)
> +		goto out;
> +