From mboxrd@z Thu Jan 1 00:00:00 1970 From: Albert ARIBAUD Date: Sun, 29 Nov 2009 13:56:08 +0100 Subject: [U-Boot] [PATCH V2 3/3] Add support for the LaCie ED Mini V2 board In-Reply-To: <20091118222158.A05573F6C2@gemini.denx.de> References: <1258239796-21528-1-git-send-email-albert.aribaud@free.fr> <1258239796-21528-2-git-send-email-albert.aribaud@free.fr> <1258239796-21528-3-git-send-email-albert.aribaud@free.fr> <1258239796-21528-4-git-send-email-albert.aribaud@free.fr> <20091118222158.A05573F6C2@gemini.denx.de> Message-ID: <4B126F68.9020005@free.fr> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Wolfgang Denk a ?crit : >> +int dram_init(void) >> +{ >> + int i; >> + >> + for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { >> + gd->bd->bi_dram[i].start = orion5x_sdram_bar(i); >> + gd->bd->bi_dram[i].size = orion5x_sdram_bs(i); >> + } >> + return 0; >> +} > > Cannot you use get_ram_size() for auto-sizing and checking? The SoC allows for up to 4 banks of DRAM, not necessarily contiguous. Granted, this is not a frequent configuration, however I'd like to support it correctly, and the heuristics of get_ram_size() are based on the assumption that all DRAM is contiguous. However I realize that this code is actually SoC-specific, not board-specific. It could be moved in cpu/arm926ejs/orion5x/dram.c, and then orion5x_sdram_{bar,bs} could be made static (or inlined). What do you think? Amicalement, -- Albert.