[U-Boot] Problem with transparent PCI-PCI bridge on Canyonlands

Felix Radensky
2009-12-24T14:34:39Z

Hi, Max

java33 at inwind.it wrote:
> Hello,
>
> I've encountered the same problem and found a solution.
> In
> drivers/pci/pci_indirect.c, add the following code block at line 79:
>
> #elif
> defined(CONFIG_460EX)
> #define INDIRECT_PCI_OP(rw, size, type, op, mask) \
>
> static int \
> indirect_##rw##_config_##size(struct pci_controller *hose,
> \
> pci_dev_t dev, int offset, type val) \
> { \
> u32 b, d,f;
> \
> b = PCI_BUS(dev); d = PCI_DEV(dev); f = PCI_FUNC(dev); \
> b = b -
> hose->first_busno; \
> dev = PCI_BDF(b, d, f); \
> if (PCI_BUS(dev) >
> 0) \
> out_le32(hose->cfg_addr, dev
> | (offset & 0xfc) | 0x00000001); \
>
> else \
> out_le32
> (hose->cfg_addr, dev | (offset & 0xfc) | 0x00000000); \
> cfg_##rw(val, hose-
>
>> cfg_data + (offset & mask), type, op); \
>>
> return 0; \
> }
> #else
>
> Hope
> this helps
>
> Ciao
>
> Max Tretene, ACube Systems Srl
>
Thanks for help. Your fix indeed helps to avoid infinite loop I had.
u-boot still hangs for me, now at different place:

U-Boot 2009.11 (Dec 24 2009 - 16:12:11)

CPU: AMCC PowerPC 460EX Rev. A at 600 MHz (PLB=200 OPB=100 EBC=100)
Security/Kasumi support
Bootstrap Option H - Boot ROM Location I2C (Addr 0x52)
Internal PCI arbiter enabled
32 kB I-Cache 32 kB D-Cache
Board: Canyonlands - AMCC PPC460EX Evaluation Board, 2*PCIe, Rev. 14
I2C: ready
DRAM: 512 MB (ECC not enabled, 400 MHz, CL3)
FLASH: 64 MB
NAND: 256 MiB
PCI: Bus Dev VenId DevId Class Int
PCI Autoconfig: Bus Memory region: [0x80000000-0x8fffffff],
Physical Memory [80000000-8fffffffx]
PCI Autoconfig: Bus I/O region: [0x0-0xffff],
Physical Memory: [d8000000-d800ffff]
PCI Scan: Found Bus 0, Device 6, Function 0
PCI Autoconfig: Found P2P bridge, device 6

The hang is at

pci_hose_read_config_byte(hose, dev, PCI_HEADER_TYPE, &header_type);

invoked from pci_hose_scan_bus().

Any ideas ?

Thanks a lot.

Felix.