[U-Boot] Problem with transparent PCI-PCI bridge on Canyonlands

[U-Boot] Problem with transparent PCI-PCI bridge on Canyonlands

[Felix Radensky]

Hi,

I'm running latest u-boot on 1GHz Canyonlands board and have trouble
using 64-bit transparent PCI-PCI PLX 6254 bridge. With PLX evaluation
board plugged into Canyonlands PCI slot u-boot hangs. With PCI support
disabled u-boot works fine. The PLX board is OK, it was recognized by
both u-boot and kernel on Freescale MPC8536DS board. On Canyonlands
linux-2.6.32 silently resets the board when PLX is plugged in. Any ideas
what could be wrong in u-boot ? I'll post a separate question to 
linuxppc-dev.

U-Boot 2009.11-rc2-00002-g386118a (Dec 09 2009 - 18:48:44)

CPU:   AMCC PowerPC 460EX Rev. A at 1000 MHz (PLB=200 OPB=100 EBC=100)
       Security/Kasumi support
       Bootstrap Option H - Boot ROM Location I2C (Addr 0x52)
       Internal PCI arbiter enabled
       32 kB I-Cache 32 kB D-Cache
Board: Canyonlands - AMCC PPC460EX Evaluation Board, 2*PCIe, Rev. 14
I2C:   ready
DRAM:  512 MB (ECC not enabled, 400 MHz, CL3)
FLASH: 64 MB
NAND:  256 MiB
PCI:   Bus Dev VenId DevId Class Int


Thanks a lot.

Felix.

[U-Boot] Problem with transparent PCI-PCI bridge on Canyonlands

[Wolfgang Denk]

Dear Felix Radensky,

In message <4B1FE62C.7080407@embedded-sol.com> you wrote:
> 
> I'm running latest u-boot on 1GHz Canyonlands board and have trouble
> using 64-bit transparent PCI-PCI PLX 6254 bridge. With PLX evaluation
> board plugged into Canyonlands PCI slot u-boot hangs. With PCI support
-----------------------------------------^^^^^^^^^^^^^

Where exactly does U-Boot hang?

What are the console messages you see? And which U-Boot version is
this, and which version of the Canyonlands board?

> disabled u-boot works fine. The PLX board is OK, it was recognized by
> both u-boot and kernel on Freescale MPC8536DS board. On Canyonlands
> linux-2.6.32 silently resets the board when PLX is plugged in. Any ideas
--^^^^^^^^^^^^^^^^^^^^^^^^^^^^

This is inconsistent: above you report U-Boot hangs, here you claim
that Linux reboots?

> U-Boot 2009.11-rc2-00002-g386118a (Dec 09 2009 - 18:48:44)
> 
> CPU:   AMCC PowerPC 460EX Rev. A at 1000 MHz (PLB=200 OPB=100 EBC=100)
--------------------------------------^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

Did you try running in another configuration, like 800-nor or
1066-nor?

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
If I ever needed a brain transplant, I'd choose a teenager's  because
I'd want a brain that had never been used.

[U-Boot] Problem with transparent PCI-PCI bridge on Canyonlands

[Felix Radensky]

Hi, Wolfgang

Wolfgang Denk wrote:
> Dear Felix Radensky,
>
> In message <4B1FE62C.7080407@embedded-sol.com> you wrote:
>   
>> I'm running latest u-boot on 1GHz Canyonlands board and have trouble
>> using 64-bit transparent PCI-PCI PLX 6254 bridge. With PLX evaluation
>> board plugged into Canyonlands PCI slot u-boot hangs. With PCI support
>>     
> -----------------------------------------^^^^^^^^^^^^^
>
> Where exactly does U-Boot hang?
>
> What are the console messages you see? And which U-Boot version is
> this, and which version of the Canyonlands board?
>
>   
>> disabled u-boot works fine. The PLX board is OK, it was recognized by
>> both u-boot and kernel on Freescale MPC8536DS board. On Canyonlands
>> linux-2.6.32 silently resets the board when PLX is plugged in. Any ideas
>>     
> --^^^^^^^^^^^^^^^^^^^^^^^^^^^^
>
> This is inconsistent: above you report U-Boot hangs, here you claim
> that Linux reboots?
>
>   
As I said, if I disable PCI support in u-boot, it runs fine and can 
start booting linux.
>> U-Boot 2009.11-rc2-00002-g386118a (Dec 09 2009 - 18:48:44)
>>
>> CPU:   AMCC PowerPC 460EX Rev. A at 1000 MHz (PLB=200 OPB=100 EBC=100)
>>     
> --------------------------------------^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
>
> Did you try running in another configuration, like 800-nor or
> 1066-nor?
>
>   
I did try 600-nor and 800-nor, but that didn't change anything. With 
1066-nor
u-boot hangs earlier, the console messages show

U-Boot 2009.11-rc2-00002-g386118a (Dec 09 2009 - 18:48:44)

CPU:   AMCC PowerPC 460EX Rev. A at 1066.667 MHz (PLB=266 OPB=88 EBC=88)
       Security/Kasumi support
       Bootstrap Option H - Boot ROM Location I2C (Addr 0x52)
       Internal PCI arbiter enabled
       32 kB I-Cache 32 kB D-Cache
Board: Canyonlands - AMCC PPC460EX Evaluation Board, 2*PCIe, Rev. 14
I2C:   ready
DRAM:  512 MB (ECC not enabled, 533 MHz, CL4)

Felix.

[U-Boot] Problem with transparent PCI-PCI bridge on Canyonlands

[Felix Radensky]

Hi, Wolfgang

Felix Radensky wrote:
> Hi, Wolfgang
>
>
>   
>> --------------------------------------^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
>>
>> Did you try running in another configuration, like 800-nor or
>> 1066-nor?
>>
>>   
>>     
> I did try 600-nor and 800-nor, but that didn't change anything. With 
> 1066-nor
> u-boot hangs earlier, the console messages show
>
> U-Boot 2009.11-rc2-00002-g386118a (Dec 09 2009 - 18:48:44)
>
> CPU:   AMCC PowerPC 460EX Rev. A at 1066.667 MHz (PLB=266 OPB=88 EBC=88)
>        Security/Kasumi support
>        Bootstrap Option H - Boot ROM Location I2C (Addr 0x52)
>        Internal PCI arbiter enabled
>        32 kB I-Cache 32 kB D-Cache
> Board: Canyonlands - AMCC PPC460EX Evaluation Board, 2*PCIe, Rev. 14
> I2C:   ready
> DRAM:  512 MB (ECC not enabled, 533 MHz, CL4)
>
> Felix.
>
>   

Actually, 1066-nor is not different from other configurations. Switching
to 1066-nor requires power-cycle, it's not enough to simply run "reset" 
command.
Anyway, in this configuration u-boot also hangs when PLX board is 
plugged in.

Felix.

[U-Boot] Problem with transparent PCI-PCI bridge on Canyonlands

[Wolfgang Denk]

Dear Felix Radensky,

In message <4B2022D6.7040104@embedded-sol.com> you wrote:
> 
> Anyway, in this configuration u-boot also hangs when PLX board is 
> plugged in.

Are you using an ATX power supply? If not: do that!

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
e-credibility: the non-guaranteeable likelihood that  the  electronic
data you're seeing is genuine rather than somebody's made-up crap.
- Karl Lehenbauer

[U-Boot] Problem with transparent PCI-PCI bridge on Canyonlands

[Felix Radensky]

Wolfgang Denk wrote:
> Dear Felix Radensky,
>
> In message <4B2022D6.7040104@embedded-sol.com> you wrote:
>   
>> Anyway, in this configuration u-boot also hangs when PLX board is 
>> plugged in.
>>     
>
> Are you using an ATX power supply? If not: do that!
>   

I do use ATX power supply, but it only has 20 pins, while Canyonlands
connector has 24 pins. Could that be a problem ?

Felix.

[U-Boot] Problem with transparent PCI-PCI bridge on Canyonlands

[Feng Kan]

Can you turn on the additional debug information. That will give a
better
Clue as to what part is hanging.

Feng Kan
AMCC Software

-----Original Message-----
From: u-boot-bounces@lists.denx.de [mailto:u-boot-bounces at lists.denx.de]
On Behalf Of Felix Radensky
Sent: Wednesday, December 09, 2009 10:02 AM
To: u-boot at lists.denx.de; Stefan Roese
Subject: [U-Boot] Problem with transparent PCI-PCI bridge on Canyonlands

Hi,

I'm running latest u-boot on 1GHz Canyonlands board and have trouble
using 64-bit transparent PCI-PCI PLX 6254 bridge. With PLX evaluation
board plugged into Canyonlands PCI slot u-boot hangs. With PCI support
disabled u-boot works fine. The PLX board is OK, it was recognized by
both u-boot and kernel on Freescale MPC8536DS board. On Canyonlands
linux-2.6.32 silently resets the board when PLX is plugged in. Any ideas
what could be wrong in u-boot ? I'll post a separate question to 
linuxppc-dev.

U-Boot 2009.11-rc2-00002-g386118a (Dec 09 2009 - 18:48:44)

CPU:   AMCC PowerPC 460EX Rev. A at 1000 MHz (PLB=200 OPB=100 EBC=100)
       Security/Kasumi support
       Bootstrap Option H - Boot ROM Location I2C (Addr 0x52)
       Internal PCI arbiter enabled
       32 kB I-Cache 32 kB D-Cache
Board: Canyonlands - AMCC PPC460EX Evaluation Board, 2*PCIe, Rev. 14
I2C:   ready
DRAM:  512 MB (ECC not enabled, 400 MHz, CL3)
FLASH: 64 MB
NAND:  256 MiB
PCI:   Bus Dev VenId DevId Class Int


Thanks a lot.

Felix.

_______________________________________________
U-Boot mailing list
U-Boot at lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] Problem with transparent PCI-PCI bridge on Canyonlands

[Felix Radensky]

Hi,

Feng Kan wrote:
> Can you turn on the additional debug information. That will give a
> better
> Clue as to what part is hanging.
>   

I've enabled debugging in drivers/pci/pci.c. I'm seeing an infinite flow 
of messages

PCI:   Bus Dev VenId DevId Class Int
PCI Scan: Found Bus 0, Device 6, Function 0
PCI Scan: Found Bus 1, Device 6, Function 0
...
PCI Scan: Found Bus 255, Device 6, Function 0
PCI Scan: Found Bus 0, Device 6, Function 0
PCI Scan: Found Bus 1, Device 6, Function 0
...

Felix.
> Feng Kan
> AMCC Software
>
> -----Original Message-----
> From: u-boot-bounces at lists.denx.de [mailto:u-boot-bounces at lists.denx.de]
> On Behalf Of Felix Radensky
> Sent: Wednesday, December 09, 2009 10:02 AM
> To: u-boot at lists.denx.de; Stefan Roese
> Subject: [U-Boot] Problem with transparent PCI-PCI bridge on Canyonlands
>
> Hi,
>
> I'm running latest u-boot on 1GHz Canyonlands board and have trouble
> using 64-bit transparent PCI-PCI PLX 6254 bridge. With PLX evaluation
> board plugged into Canyonlands PCI slot u-boot hangs. With PCI support
> disabled u-boot works fine. The PLX board is OK, it was recognized by
> both u-boot and kernel on Freescale MPC8536DS board. On Canyonlands
> linux-2.6.32 silently resets the board when PLX is plugged in. Any ideas
> what could be wrong in u-boot ? I'll post a separate question to 
> linuxppc-dev.
>
> U-Boot 2009.11-rc2-00002-g386118a (Dec 09 2009 - 18:48:44)
>
> CPU:   AMCC PowerPC 460EX Rev. A at 1000 MHz (PLB=200 OPB=100 EBC=100)
>        Security/Kasumi support
>        Bootstrap Option H - Boot ROM Location I2C (Addr 0x52)
>        Internal PCI arbiter enabled
>        32 kB I-Cache 32 kB D-Cache
> Board: Canyonlands - AMCC PPC460EX Evaluation Board, 2*PCIe, Rev. 14
> I2C:   ready
> DRAM:  512 MB (ECC not enabled, 400 MHz, CL3)
> FLASH: 64 MB
> NAND:  256 MiB
> PCI:   Bus Dev VenId DevId Class Int
>
>
> Thanks a lot.
>
> Felix.
>
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> http://lists.denx.de/mailman/listinfo/u-boot
>   

[U-Boot] Problem with transparent PCI-PCI bridge on Canyonlands

[Felix Radensky]

Feng, Stefan

Can I do anything else to help you identify the problem ?

Thanks.

Felix.

Felix Radensky wrote:
> Hi,
>
> Feng Kan wrote:
>   
>> Can you turn on the additional debug information. That will give a
>> better
>> Clue as to what part is hanging.
>>   
>>     
>
> I've enabled debugging in drivers/pci/pci.c. I'm seeing an infinite flow 
> of messages
>
> PCI:   Bus Dev VenId DevId Class Int
> PCI Scan: Found Bus 0, Device 6, Function 0
> PCI Scan: Found Bus 1, Device 6, Function 0
> ...
> PCI Scan: Found Bus 255, Device 6, Function 0
> PCI Scan: Found Bus 0, Device 6, Function 0
> PCI Scan: Found Bus 1, Device 6, Function 0
> ...
>
> Felix.
>   
>> Feng Kan
>> AMCC Software
>>
>> -----Original Message-----
>> From: u-boot-bounces at lists.denx.de [mailto:u-boot-bounces at lists.denx.de]
>> On Behalf Of Felix Radensky
>> Sent: Wednesday, December 09, 2009 10:02 AM
>> To: u-boot at lists.denx.de; Stefan Roese
>> Subject: [U-Boot] Problem with transparent PCI-PCI bridge on Canyonlands
>>
>> Hi,
>>
>> I'm running latest u-boot on 1GHz Canyonlands board and have trouble
>> using 64-bit transparent PCI-PCI PLX 6254 bridge. With PLX evaluation
>> board plugged into Canyonlands PCI slot u-boot hangs. With PCI support
>> disabled u-boot works fine. The PLX board is OK, it was recognized by
>> both u-boot and kernel on Freescale MPC8536DS board. On Canyonlands
>> linux-2.6.32 silently resets the board when PLX is plugged in. Any ideas
>> what could be wrong in u-boot ? I'll post a separate question to 
>> linuxppc-dev.
>>
>> U-Boot 2009.11-rc2-00002-g386118a (Dec 09 2009 - 18:48:44)
>>
>> CPU:   AMCC PowerPC 460EX Rev. A at 1000 MHz (PLB=200 OPB=100 EBC=100)
>>        Security/Kasumi support
>>        Bootstrap Option H - Boot ROM Location I2C (Addr 0x52)
>>        Internal PCI arbiter enabled
>>        32 kB I-Cache 32 kB D-Cache
>> Board: Canyonlands - AMCC PPC460EX Evaluation Board, 2*PCIe, Rev. 14
>> I2C:   ready
>> DRAM:  512 MB (ECC not enabled, 400 MHz, CL3)
>> FLASH: 64 MB
>> NAND:  256 MiB
>> PCI:   Bus Dev VenId DevId Class Int
>>
>>
>> Thanks a lot.
>>
>> Felix.
>>
>> _______________________________________________
>> U-Boot mailing list
>> U-Boot at lists.denx.de
>> http://lists.denx.de/mailman/listinfo/u-boot
>>   
>>     
>
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> http://lists.denx.de/mailman/listinfo/u-boot
>   

[U-Boot] Problem with transparent PCI-PCI bridge on Canyonlands

[Stefan Roese]

Felix,

On Tuesday 15 December 2009 08:30:26 Felix Radensky wrote:
> Can I do anything else to help you identify the problem ?

Do you have other PPC4xx boards, in which you could test this PCI-PCI bridge 
board?

Some other comments below.
 
> Thanks.
> 
> Felix.
> 
> Felix Radensky wrote:
> > Hi,
> >
> > Feng Kan wrote:
> >> Can you turn on the additional debug information. That will give a
> >> better
> >> Clue as to what part is hanging.
> >
> > I've enabled debugging in drivers/pci/pci.c. I'm seeing an infinite flow
> > of messages
> >
> > PCI:   Bus Dev VenId DevId Class Int
> > PCI Scan: Found Bus 0, Device 6, Function 0
> > PCI Scan: Found Bus 1, Device 6, Function 0
> > ...
> > PCI Scan: Found Bus 255, Device 6, Function 0
> > PCI Scan: Found Bus 0, Device 6, Function 0
> > PCI Scan: Found Bus 1, Device 6, Function 0
> > ...

Strange to see an infinite loop here. I suggest you debug, why 
pci_hose_scan_bus() is called endlessly. Hard to guess without access to such 
a board.

Cheers,
Stefan

--
DENX Software Engineering GmbH,      MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich,  Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: office at denx.de

[U-Boot] Problem with transparent PCI-PCI bridge on Canyonlands

[Felix Radensky]

Hi, Stefan

Stefan Roese wrote:
> Felix,
>
> On Tuesday 15 December 2009 08:30:26 Felix Radensky wrote:
>   
>> Can I do anything else to help you identify the problem ?
>>     
>
> Do you have other PPC4xx boards, in which you could test this PCI-PCI bridge 
> board?
>   

No, I don't.

> Some other comments below.
>  
>   
>> Thanks.
>>
>> Felix.
>>
>> Felix Radensky wrote:
>>     
>>> Hi,
>>>
>>> Feng Kan wrote:
>>>       
>>>> Can you turn on the additional debug information. That will give a
>>>> better
>>>> Clue as to what part is hanging.
>>>>         
>>> I've enabled debugging in drivers/pci/pci.c. I'm seeing an infinite flow
>>> of messages
>>>
>>> PCI:   Bus Dev VenId DevId Class Int
>>> PCI Scan: Found Bus 0, Device 6, Function 0
>>> PCI Scan: Found Bus 1, Device 6, Function 0
>>> ...
>>> PCI Scan: Found Bus 255, Device 6, Function 0
>>> PCI Scan: Found Bus 0, Device 6, Function 0
>>> PCI Scan: Found Bus 1, Device 6, Function 0
>>> ...
>>>       
>
> Strange to see an infinite loop here. I suggest you debug, why 
> pci_hose_scan_bus() is called endlessly. Hard to guess without access to such 
> a board.
>   

OK, thanks. I'll look into it.

Felix.

[U-Boot] Problem with transparent PCI-PCI bridge on Canyonlands

[java33 at inwind.it]

Hello,

I've encountered the same problem and found a solution.
In 
drivers/pci/pci_indirect.c, add the following code block at line 79:

#elif 
defined(CONFIG_460EX)
#define INDIRECT_PCI_OP(rw, size, type, op, mask)			 \

static int								 \
indirect_##rw##_config_##size(struct pci_controller *hose,	
	 \
			      pci_dev_t dev, int offset, type val)	 \
{									 \
	u32 b, d,f;		
					 \
	b = PCI_BUS(dev); d = PCI_DEV(dev); f = PCI_FUNC(dev);		 \
	b = b - 
hose->first_busno;					 \
	dev = PCI_BDF(b, d, f);						 \
	if (PCI_BUS(dev) > 
0)                                            \
		out_le32(hose->cfg_addr, dev 
| (offset & 0xfc) | 0x00000001); \
	
else                                                             \
		out_le32
(hose->cfg_addr, dev | (offset & 0xfc) | 0x00000000); \
	cfg_##rw(val, hose-
>cfg_data + (offset & mask), type, op);	 \
	return 0;							 \
}
#else

Hope 
this helps

Ciao

Max Tretene, ACube Systems Srl

[U-Boot] Problem with transparent PCI-PCI bridge on Canyonlands

[Felix Radensky]

Hi, Max

java33 at inwind.it wrote:
> Hello,
>
> I've encountered the same problem and found a solution.
> In 
> drivers/pci/pci_indirect.c, add the following code block at line 79:
>
> #elif 
> defined(CONFIG_460EX)
> #define INDIRECT_PCI_OP(rw, size, type, op, mask)			 \
>
> static int								 \
> indirect_##rw##_config_##size(struct pci_controller *hose,	
> 	 \
> 			      pci_dev_t dev, int offset, type val)	 \
> {									 \
> 	u32 b, d,f;		
> 					 \
> 	b = PCI_BUS(dev); d = PCI_DEV(dev); f = PCI_FUNC(dev);		 \
> 	b = b - 
> hose->first_busno;					 \
> 	dev = PCI_BDF(b, d, f);						 \
> 	if (PCI_BUS(dev) > 
> 0)                                            \
> 		out_le32(hose->cfg_addr, dev 
> | (offset & 0xfc) | 0x00000001); \
> 	
> else                                                             \
> 		out_le32
> (hose->cfg_addr, dev | (offset & 0xfc) | 0x00000000); \
> 	cfg_##rw(val, hose-
>   
>> cfg_data + (offset & mask), type, op);	 \
>>     
> 	return 0;							 \
> }
> #else
>
> Hope 
> this helps
>
> Ciao
>
> Max Tretene, ACube Systems Srl
>   
Thanks for help. Your fix indeed helps to avoid infinite loop I had.
u-boot still hangs for me, now at different place:

U-Boot 2009.11 (Dec 24 2009 - 16:12:11)

CPU:   AMCC PowerPC 460EX Rev. A at 600 MHz (PLB=200 OPB=100 EBC=100)
       Security/Kasumi support
       Bootstrap Option H - Boot ROM Location I2C (Addr 0x52)
       Internal PCI arbiter enabled
       32 kB I-Cache 32 kB D-Cache
Board: Canyonlands - AMCC PPC460EX Evaluation Board, 2*PCIe, Rev. 14
I2C:   ready
DRAM:  512 MB (ECC not enabled, 400 MHz, CL3)
FLASH: 64 MB
NAND:  256 MiB
PCI:   Bus Dev VenId DevId Class Int
PCI Autoconfig: Bus Memory region: [0x80000000-0x8fffffff],
                Physical Memory [80000000-8fffffffx]
PCI Autoconfig: Bus I/O region: [0x0-0xffff],
                Physical Memory: [d8000000-d800ffff]
PCI Scan: Found Bus 0, Device 6, Function 0
PCI Autoconfig: Found P2P bridge, device 6

The hang is at

pci_hose_read_config_byte(hose, dev, PCI_HEADER_TYPE, &header_type);

invoked from pci_hose_scan_bus().

Any ideas ?

Thanks a lot.

Felix.

[U-Boot] Problem with transparent PCI-PCI bridge on Canyonlands

[Felix Radensky]

Hi, Max

Felix Radensky wrote:
> Hi, Max
>
> java33 at inwind.it wrote:
>   
>> Hello,
>>
>> I've encountered the same problem and found a solution.
>> In 
>> drivers/pci/pci_indirect.c, add the following code block at line 79:
>>
>> #elif 
>> defined(CONFIG_460EX)
>> #define INDIRECT_PCI_OP(rw, size, type, op, mask)			 \
>>
>> static int								 \
>> indirect_##rw##_config_##size(struct pci_controller *hose,	
>> 	 \
>> 			      pci_dev_t dev, int offset, type val)	 \
>> {									 \
>> 	u32 b, d,f;		
>> 					 \
>> 	b = PCI_BUS(dev); d = PCI_DEV(dev); f = PCI_FUNC(dev);		 \
>> 	b = b - 
>> hose->first_busno;					 \
>> 	dev = PCI_BDF(b, d, f);						 \
>> 	if (PCI_BUS(dev) > 
>> 0)                                            \
>> 		out_le32(hose->cfg_addr, dev 
>> | (offset & 0xfc) | 0x00000001); \
>> 	
>> else                                                             \
>> 		out_le32
>> (hose->cfg_addr, dev | (offset & 0xfc) | 0x00000000); \
>> 	cfg_##rw(val, hose-
>>   
>>     
>>> cfg_data + (offset & mask), type, op);	 \
>>>     
>>>       
>> 	return 0;							 \
>> }
>> #else
>>
>> Hope 
>> this helps
>>
>> Ciao
>>
>> Max Tretene, ACube Systems Srl
>>   
>>     
> Thanks for help. Your fix indeed helps to avoid infinite loop I had.
> u-boot still hangs for me, now at different place:
>
> U-Boot 2009.11 (Dec 24 2009 - 16:12:11)
>
> CPU:   AMCC PowerPC 460EX Rev. A at 600 MHz (PLB=200 OPB=100 EBC=100)
>        Security/Kasumi support
>        Bootstrap Option H - Boot ROM Location I2C (Addr 0x52)
>        Internal PCI arbiter enabled
>        32 kB I-Cache 32 kB D-Cache
> Board: Canyonlands - AMCC PPC460EX Evaluation Board, 2*PCIe, Rev. 14
> I2C:   ready
> DRAM:  512 MB (ECC not enabled, 400 MHz, CL3)
> FLASH: 64 MB
> NAND:  256 MiB
> PCI:   Bus Dev VenId DevId Class Int
> PCI Autoconfig: Bus Memory region: [0x80000000-0x8fffffff],
>                 Physical Memory [80000000-8fffffffx]
> PCI Autoconfig: Bus I/O region: [0x0-0xffff],
>                 Physical Memory: [d8000000-d800ffff]
> PCI Scan: Found Bus 0, Device 6, Function 0
> PCI Autoconfig: Found P2P bridge, device 6
>
> The hang is at
>
> pci_hose_read_config_byte(hose, dev, PCI_HEADER_TYPE, &header_type);
>
> invoked from pci_hose_scan_bus().
>
> Any ideas ?
>
> Thanks a lot.
>
> Felix.
>   
It appears that PLX evaluation board I was using on Canyonlands was 
broken. On the
custom board based on 460EX and the same PLX your fix helps to avoid 
infinite loop
in bridge detection. U-boot detects both PLX and device behind it.

It would be great if you could submit your fix for mainline inclusion.

Thanks a lot for your help, much appreciated !

Felix.