From: Tom <Tom.Rix@windriver.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v4 05/12] SPEAr : nand driver support for SPEAr SoCs
Date: Wed, 13 Jan 2010 07:13:17 -0600 [thread overview]
Message-ID: <4B4DC6ED.4090603@windriver.com> (raw)
SPEAr SoCs contain an FSMC controller which can be used to interface
with a range of memories eg. NAND, SRAM, NOR.
Currently, this driver supports interfacing FSMC with NAND memories
Signed-off-by: Vipin <vipin.kumar@st.com>
---
drivers/mtd/nand/Makefile | 1 +
drivers/mtd/nand/spr_nand.c | 123 +++++++++++++++++++++++++++++++++
include/asm-arm/arch-spear/spr_nand.h | 57 +++++++++++++++
3 files changed, 181 insertions(+), 0 deletions(-)
create mode 100755 drivers/mtd/nand/spr_nand.c
create mode 100644 include/asm-arm/arch-spear/spr_nand.h
<snip>
+}
+
+static int spear_read_hwecc(struct mtd_info *mtd,
+ const u_char *data, u_char ecc[3])
+{
+ u_int ecc_tmp;
+
+ /* read the h/w ECC */
+ ecc_tmp = readl(&fsmc_regs_p->genmemctrl_ecc);
+
+ ecc[0] = (u_char) (ecc_tmp & 0xFF);
+ ecc[1] = (u_char) ((ecc_tmp & 0xFF00) >> 8);
+ ecc[2] = (u_char) ((ecc_tmp & 0xFF0000) >> 16);
+
+ return 0;
Always returning 0.
return can be switched to void
+}
+
+void spear_enable_hwecc(struct mtd_info *mtd, int mode)
+{
+ writel(readl(&fsmc_regs_p->genmemctrl_pc) & ~0x80,
+ &fsmc_regs_p->genmemctrl_pc);
+ writel(readl(&fsmc_regs_p->genmemctrl_pc) & ~FSMC_ECCEN,
+ &fsmc_regs_p->genmemctrl_pc);
+ writel(readl(&fsmc_regs_p->genmemctrl_pc) | FSMC_ECCEN,
+ &fsmc_regs_p->genmemctrl_pc);
+}
+
+int spear_nand_init(struct nand_chip *nand)
+{
+ writel(FSMC_DEVWID_8 | FSMC_DEVTYPE_NAND | FSMC_ENABLE | FSMC_WAITON,
+ &fsmc_regs_p->genmemctrl_pc);
+ writel(readl(&fsmc_regs_p->genmemctrl_pc) | FSMC_TCLR_1 | FSMC_TAR_1,
+ &fsmc_regs_p->genmemctrl_pc);
+ writel(FSMC_THIZ_1 | FSMC_THOLD_4 | FSMC_TWAIT_6 | FSMC_TSET_0,
+ &fsmc_regs_p->genmemctrl_comm);
+ writel(FSMC_THIZ_1 | FSMC_THOLD_4 | FSMC_TWAIT_6 | FSMC_TSET_0,
+ &fsmc_regs_p->genmemctrl_attrib);
+
+ nand->options = 0;
+ nand->ecc.mode = NAND_ECC_HW;
+ nand->ecc.layout = &spear_nand_ecclayout;
+ nand->ecc.size = 512;
+ nand->ecc.bytes = 3;
+ nand->ecc.calculate = spear_read_hwecc;
+ nand->ecc.hwctl = spear_enable_hwecc;
+ nand->ecc.correct = nand_correct_data;
+ nand->cmd_ctrl = spear_nand_hwcontrol;
+ return 0;
Same here for returning void.
These are just minor things.
Change is optional.
+}
Tom
next reply other threads:[~2010-01-13 13:13 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-01-13 13:13 Tom [this message]
2010-01-13 18:23 ` [U-Boot] [PATCH v4 05/12] SPEAr : nand driver support for SPEAr SoCs Scott Wood
2010-01-14 15:03 ` Tom
-- strict thread matches above, loose matches on Subject: below --
2010-01-11 11:15 [U-Boot] [PATCH v4 00/12] Support " Vipin KUMAR
2010-01-11 11:15 ` [U-Boot] [PATCH v4 01/12] SPEAr : Adding README.spear in doc Vipin KUMAR
2010-01-11 11:15 ` [U-Boot] [PATCH v4 02/12] SPEAr : Adding basic SPEAr architecture support Vipin KUMAR
2010-01-11 11:15 ` [U-Boot] [PATCH v4 03/12] SPEAr : i2c driver support added for SPEAr SoCs Vipin KUMAR
2010-01-11 11:15 ` [U-Boot] [PATCH v4 04/12] SPEAr : smi driver support " Vipin KUMAR
2010-01-11 11:15 ` [U-Boot] [PATCH v4 05/12] SPEAr : nand " Vipin KUMAR
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