[U-Boot] [PATCH RFC] NAND: Improve read performance from Large Page NAND devices

[Nick Thompson <nick.thompson@ge.com>]

On 16/01/10 01:51, Josh Gelinske wrote:
> 
> What kind of CPU usage are you seeing? I am throughput of ~1.9MBs for writes
> on a Samsung K9WBG08U1M 4GB with 4K page but with high cpu usage.
> 

I'm not sure what you are asking here. There is no idle loop to measure so
CPU is running at 100%.

The code does poll the NAND device for data ready, but in my case the NAND
loads its cache faster than the CPU can finish sorting out ECC checks
(despite ECC H/W assistance). The result is the CPU never actually on the
NAND.

This patch (not yet formally submitted) removes this potential waiting time
that was present - plus some redundant command sequences due to incorrect
function levelling. Most of my performance gain comes from optimising the
data transfer (to and) from the NAND - see drivers/mtd/nand/davinci_nand.c
- which is already in the mainline.

Apologies if that doesn't answer your question.

Nick.