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From: Rini van Zetten <rini@arvoo.nl>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v2] ppc/83xx Use CONFIG_FSL_ESDHC to enable sdhc clk
Date: Wed, 07 Apr 2010 15:32:52 +0200	[thread overview]
Message-ID: <4BBC8984.4020207@arvoo.nl> (raw)
In-Reply-To: <43E4CA05-0013-43F7-87A9-25C5DF9339A4@kernel.crashing.org>

Enable eSDHC Clock based on generic CONFIG_FSL_ESDHC define instead of a platform define.
This will enable all the 83xx platforms to use sdhc_clk based on CONFIG_FSL_ESDHC.
It's the same patch as commit 6b9ea08c5010eab5ad1056bc9bf033afb672d9cc for the ppc/85x

Signed-off-by: Rini <rini@arvoo.nl>
---

v2 : added some missed cases in the file

  cpu/mpc83xx/speed.c |   10 +++++-----
  1 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/cpu/mpc83xx/speed.c b/cpu/mpc83xx/speed.c
index bde7e92..500eef1 100644
--- a/cpu/mpc83xx/speed.c
+++ b/cpu/mpc83xx/speed.c
@@ -116,7 +116,7 @@ int get_clocks(void)
  #if defined(CONFIG_MPC8315)
  	u32 tdm_clk;
  #endif
-#if defined(CONFIG_MPC837x)
+#if defined(CONFIG_FSL_ESDHC)
  	u32 sdhc_clk;
  #endif
  	u32 enc_clk;
@@ -274,7 +274,7 @@ int get_clocks(void)
  		return -7;
  	}

-#if defined(CONFIG_MPC837x)
+#if defined(CONFIG_FSL_ESDHC)
  	switch ((sccr & SCCR_SDHCCM) >> SCCR_SDHCCM_SHIFT) {
  	case 0:
  		sdhc_clk = 0;
@@ -321,7 +321,7 @@ int get_clocks(void)
  	i2c1_clk = enc_clk;
  #elif defined(CONFIG_MPC831x)
  	i2c1_clk = enc_clk;
-#elif defined(CONFIG_MPC837x)
+#elif defined(CONFIG_FSL_ESDHC)
  	i2c1_clk = sdhc_clk;
  #endif
  #if !defined(CONFIG_MPC832x)
@@ -455,7 +455,7 @@ int get_clocks(void)
  #if defined(CONFIG_MPC8315)
  	gd->tdm_clk = tdm_clk;
  #endif
-#if defined(CONFIG_MPC837x)
+#if defined(CONFIG_FSL_ESDHC)
  	gd->sdhc_clk = sdhc_clk;
  #endif
  	gd->core_clk = core_clk;
@@ -522,7 +522,7 @@ int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
  #if defined(CONFIG_MPC8315)
  	printf("  TDM:                 %-4s MHz\n", strmhz(buf, gd->tdm_clk));
  #endif
-#if defined(CONFIG_MPC837x)
+#if defined(CONFIG_FSL_ESDHC)
  	printf("  SDHC:                %-4s MHz\n", strmhz(buf, gd->sdhc_clk));
  #endif
  #if defined(CONFIG_MPC834x) || defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x)
-- 
1.6.3.3

  parent reply	other threads:[~2010-04-07 13:32 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-04-07  9:37 [U-Boot] Subject: [PATCH] ppc/83xx Use CONFIG_FSL_ESDHC to enable sdhc clk Rini van Zetten
2010-04-07 13:06 ` Kumar Gala
2010-04-07 13:24   ` Rini van Zetten
2010-04-07 13:32   ` Rini van Zetten [this message]
2010-04-14  2:06     ` [U-Boot] [PATCH v2] " Kim Phillips

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