From mboxrd@z Thu Jan 1 00:00:00 1970 From: Scott McNutt Date: Tue, 25 May 2010 15:39:35 -0400 Subject: [U-Boot] [PATCH 1/6 v4] nios2: add gpio support In-Reply-To: <1272598458-17946-2-git-send-email-thomas@wytron.com.tw> References: <20100425181430.6CF214C04D@gemini.denx.de> <1272598458-17946-2-git-send-email-thomas@wytron.com.tw> Message-ID: <4BFC2777.3000606@psyent.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Applied to: git://git.denx.de/u-boot-nios.git next Thanks, --Scott Thomas Chou wrote: > This patch adds driver for a trivial gpio core, which is described > in http://nioswiki.com/GPIO. It is used for gpio led and nand flash > interface in u-boot. > > When CONFIG_SYS_GPIO_BASE is not defined, board may provide > its own driver. > > Signed-off-by: Thomas Chou > --- > v4: remove () from gpio when it is not in a macro. > v3: arch dir reorganized. > > arch/nios2/include/asm/gpio.h | 52 +++++++++++++++++++++++++++++++++++++++++ > 1 files changed, 52 insertions(+), 0 deletions(-) > create mode 100644 arch/nios2/include/asm/gpio.h > > diff --git a/arch/nios2/include/asm/gpio.h b/arch/nios2/include/asm/gpio.h > new file mode 100644 > index 0000000..76c425e > --- /dev/null > +++ b/arch/nios2/include/asm/gpio.h > @@ -0,0 +1,52 @@ > +/* > + * nios2 gpio driver > + * > + * This gpio core is described in http://nioswiki.com/GPIO > + * bit[0] data > + * bit[1] output enable > + * > + * when CONFIG_SYS_GPIO_BASE is not defined, board may provide > + * its own driver. > + * > + * Copyright (C) 2010 Thomas Chou > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + */ > + > +#ifndef _ASM_NIOS2_GPIO_H_ > +#define _ASM_NIOS2_GPIO_H_ > + > +#ifdef CONFIG_SYS_GPIO_BASE > +#include > + > +static inline int gpio_direction_input(unsigned gpio) > +{ > + writel(1, CONFIG_SYS_GPIO_BASE + (gpio << 2)); > + return 0; > +} > + > +static inline int gpio_direction_output(unsigned gpio, int value) > +{ > + writel(value ? 3 : 2, CONFIG_SYS_GPIO_BASE + (gpio << 2)); > + return 0; > +} > + > +static inline int gpio_get_value(unsigned gpio) > +{ > + return readl(CONFIG_SYS_GPIO_BASE + (gpio << 2)); > +} > + > +static inline void gpio_set_value(unsigned gpio, int value) > +{ > + writel(value ? 3 : 2, CONFIG_SYS_GPIO_BASE + (gpio << 2)); > +} > +#else > +extern int gpio_direction_input(unsigned gpio); > +extern int gpio_direction_output(unsigned gpio, int value); > +extern int gpio_get_value(unsigned gpio); > +extern void gpio_set_value(unsigned gpio, int value); > +#endif /* CONFIG_SYS_GPIO_BASE */ > + > +#endif /* _ASM_NIOS2_GPIO_H_ */