From mboxrd@z Thu Jan 1 00:00:00 1970 From: Scott Wood Date: Wed, 02 Jun 2010 14:16:30 -0500 Subject: [U-Boot] [PATCH V2 03/10] 83xx/85xx/86xx: LBC register cleanup In-Reply-To: <1275502329-23457-4-git-send-email-beckyb@kernel.crashing.org> References: <1275502329-23457-1-git-send-email-beckyb@kernel.crashing.org> <1275502329-23457-2-git-send-email-beckyb@kernel.crashing.org> <1275502329-23457-3-git-send-email-beckyb@kernel.crashing.org> <1275502329-23457-4-git-send-email-beckyb@kernel.crashing.org> Message-ID: <4C06AE0E.7070301@freescale.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 06/02/2010 01:12 PM, Becky Bruce wrote: > +#ifdef CONFIG_NAND_FSL_ELBC > + u8 res9[0x8]; > + u32 fmr; /* Flash Mode Register */ > + u32 fir; /* Flash Instruction Register */ > + u32 fcr; /* Flash Command Register */ > + u32 fbar; /* Flash Block Addr Register */ > + u32 fpar; /* Flash Page Addr Register */ > + u32 fbcr; /* Flash Byte Count Register */ > + u8 res10[0xF08]; > +#else > + u8 res9[0xF28]; > +#endif Shouldn't this be CONFIG_FSL_ELBC (or really, CONFIG_SYS_FSL_ELBC, as it describes the hardware and not user config)? The existence of these fields isn't dependent on whether we're enabling the NAND driver (who knows, some board code might want to do something directly with it, or someone could just want the NAND SPL for some strange reason, or...). -Scott