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* [U-Boot] [PATCH 1/2] mtd: nand_plat: add simple GPIO framework DEV_READY option
@ 2010-07-05  8:55 Mike Frysinger
  2010-07-05  8:55 ` [U-Boot] [PATCH 2/2] Blackfin: convert plat-nand code to GPIO framework Mike Frysinger
                   ` (2 more replies)
  0 siblings, 3 replies; 4+ messages in thread
From: Mike Frysinger @ 2010-07-05  8:55 UTC (permalink / raw)
  To: u-boot

Make it easy to use GPIOs for the DEV_READY pin by using the common GPIO
framework.  Also make the NAND_PLAT_INIT() define optional.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
---
 drivers/mtd/nand/nand_plat.c |   11 +++++++++++
 1 files changed, 11 insertions(+), 0 deletions(-)

diff --git a/drivers/mtd/nand/nand_plat.c b/drivers/mtd/nand/nand_plat.c
index b35492b..37a0206 100644
--- a/drivers/mtd/nand/nand_plat.c
+++ b/drivers/mtd/nand/nand_plat.c
@@ -16,6 +16,10 @@
 
 #include <common.h>
 #include <asm/io.h>
+#ifdef NAND_PLAT_GPIO_DEV_READY
+# include <asm/gpio.h>
+# define NAND_PLAT_DEV_READY(chip) gpio_get_value(NAND_PLAT_GPIO_DEV_READY)
+#endif
 
 #include <nand.h>
 
@@ -43,7 +47,14 @@ static int plat_dev_ready(struct mtd_info *mtd)
 
 int board_nand_init(struct nand_chip *nand)
 {
+#ifdef NAND_PLAT_GPIO_DEV_READY
+	gpio_request(NAND_PLAT_GPIO_DEV_READY, "nand-plat");
+	gpio_direction_input(NAND_PLAT_GPIO_DEV_READY);
+#endif
+
+#ifdef NAND_PLAT_INIT
 	NAND_PLAT_INIT();
+#endif
 
 	nand->cmd_ctrl = plat_cmd_ctrl;
 	nand->dev_ready = plat_dev_ready;
-- 
1.7.1.1

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [U-Boot] [PATCH 2/2] Blackfin: convert plat-nand code to GPIO framework
  2010-07-05  8:55 [U-Boot] [PATCH 1/2] mtd: nand_plat: add simple GPIO framework DEV_READY option Mike Frysinger
@ 2010-07-05  8:55 ` Mike Frysinger
  2010-07-06  6:59 ` [U-Boot] [PATCH 1/2] mtd: nand_plat: add simple GPIO framework DEV_READY option Thomas Chou
  2010-07-09 18:17 ` Scott Wood
  2 siblings, 0 replies; 4+ messages in thread
From: Mike Frysinger @ 2010-07-05  8:55 UTC (permalink / raw)
  To: u-boot

Use the new GPIO framework code in both the Blackfin arch and the
nand_plat driver to simplify things greatly.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
---
note: i can run this through the Blackfin tree if you want

 include/configs/bf537-pnav.h    |    9 +--------
 include/configs/bf537-stamp.h   |    9 +--------
 include/configs/bf561-acvilon.h |    8 +-------
 include/configs/ip04.h          |   10 +---------
 4 files changed, 4 insertions(+), 32 deletions(-)

diff --git a/include/configs/bf537-pnav.h b/include/configs/bf537-pnav.h
index 8daebc8..39bbb41 100644
--- a/include/configs/bf537-pnav.h
+++ b/include/configs/bf537-pnav.h
@@ -132,7 +132,6 @@
 
 #define BFIN_NAND_CLE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 2))
 #define BFIN_NAND_ALE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 1))
-#define BFIN_NAND_READY     PF12
 #define BFIN_NAND_WRITE(addr, cmd) \
 	do { \
 		bfin_write8(addr, cmd); \
@@ -141,13 +140,7 @@
 
 #define NAND_PLAT_WRITE_CMD(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_CLE(chip), cmd)
 #define NAND_PLAT_WRITE_ADR(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_ALE(chip), cmd)
-#define NAND_PLAT_DEV_READY(chip)      (bfin_read_PORTHIO() & BFIN_NAND_READY)
-#define NAND_PLAT_INIT() \
-	do { \
-		bfin_write_PORTH_FER(bfin_read_PORTH_FER() & ~BFIN_NAND_READY); \
-		bfin_write_PORTHIO_DIR(bfin_read_PORTHIO_DIR() & ~BFIN_NAND_READY); \
-		bfin_write_PORTHIO_INEN(bfin_read_PORTHIO_INEN() | BFIN_NAND_READY); \
-	} while (0)
+#define NAND_PLAT_GPIO_DEV_READY       GPIO_PF12
 
 
 /*
diff --git a/include/configs/bf537-stamp.h b/include/configs/bf537-stamp.h
index 3592862..96704d7 100644
--- a/include/configs/bf537-stamp.h
+++ b/include/configs/bf537-stamp.h
@@ -155,7 +155,6 @@
 
 #define BFIN_NAND_CLE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 2))
 #define BFIN_NAND_ALE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 1))
-#define BFIN_NAND_READY     PF3
 #define BFIN_NAND_WRITE(addr, cmd) \
 	do { \
 		bfin_write8(addr, cmd); \
@@ -164,13 +163,7 @@
 
 #define NAND_PLAT_WRITE_CMD(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_CLE(chip), cmd)
 #define NAND_PLAT_WRITE_ADR(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_ALE(chip), cmd)
-#define NAND_PLAT_DEV_READY(chip)      (bfin_read_PORTFIO() & BFIN_NAND_READY)
-#define NAND_PLAT_INIT() \
-	do { \
-		bfin_write_PORTF_FER(bfin_read_PORTF_FER() & ~BFIN_NAND_READY); \
-		bfin_write_PORTFIO_DIR(bfin_read_PORTFIO_DIR() & ~BFIN_NAND_READY); \
-		bfin_write_PORTFIO_INEN(bfin_read_PORTFIO_INEN() | BFIN_NAND_READY); \
-	} while (0)
+#define NAND_PLAT_GPIO_DEV_READY       GPIO_PF3
 
 
 /*
diff --git a/include/configs/bf561-acvilon.h b/include/configs/bf561-acvilon.h
index 0be170c..ed8d944 100644
--- a/include/configs/bf561-acvilon.h
+++ b/include/configs/bf561-acvilon.h
@@ -145,7 +145,6 @@
 
 #define BFIN_NAND_CLE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 2))
 #define BFIN_NAND_ALE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 3))
-#define BFIN_NAND_READY     PF10
 #define BFIN_NAND_WRITE(addr, cmd) \
 	do { \
 		bfin_write8(addr, cmd); \
@@ -154,12 +153,7 @@
 
 #define NAND_PLAT_WRITE_CMD(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_CLE(chip), cmd)
 #define NAND_PLAT_WRITE_ADR(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_ALE(chip), cmd)
-#define NAND_PLAT_DEV_READY(chip)      (bfin_read_FIO0_FLAG_D() & BFIN_NAND_READY)
-#define NAND_PLAT_INIT() \
-	do { \
-		bfin_write_FIO0_DIR(bfin_read_FIO0_DIR() & ~BFIN_NAND_READY); \
-		bfin_write_FIO0_INEN(bfin_read_FIO0_INEN() | BFIN_NAND_READY); \
-	} while (0)
+#define NAND_PLAT_GPIO_DEV_READY       GPIO_PF10
 
 
 /*
diff --git a/include/configs/ip04.h b/include/configs/ip04.h
index 425a745..c024d78 100644
--- a/include/configs/ip04.h
+++ b/include/configs/ip04.h
@@ -116,7 +116,6 @@
 
 #define BFIN_NAND_CLE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 2))
 #define BFIN_NAND_ALE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 1))
-#define BFIN_NAND_READY     PF10
 #define BFIN_NAND_WRITE(addr, cmd) \
 	do { \
 		bfin_write8(addr, cmd); \
@@ -125,14 +124,7 @@
 
 #define NAND_PLAT_WRITE_CMD(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_CLE(chip), cmd)
 #define NAND_PLAT_WRITE_ADR(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_ALE(chip), cmd)
-#define NAND_PLAT_DEV_READY(chip)      (bfin_read_FIO_FLAG_D() & BFIN_NAND_READY)
-#define NAND_PLAT_INIT() \
-	do { \
-		bfin_write_FIO_DIR(bfin_read_FIO_DIR() & ~BFIN_NAND_READY); \
-		bfin_write_FIO_INEN(bfin_read_FIO_INEN() | BFIN_NAND_READY); \
-		bfin_write_FIO_EDGE(bfin_read_FIO_EDGE() & ~BFIN_NAND_READY); \
-		bfin_write_FIO_POLAR(bfin_read_FIO_POLAR() & ~BFIN_NAND_READY); \
-	} while (0)
+#define NAND_PLAT_GPIO_DEV_READY       GPIO_PF10
 
 
 /*
-- 
1.7.1.1

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [U-Boot] [PATCH 1/2] mtd: nand_plat: add simple GPIO framework DEV_READY option
  2010-07-05  8:55 [U-Boot] [PATCH 1/2] mtd: nand_plat: add simple GPIO framework DEV_READY option Mike Frysinger
  2010-07-05  8:55 ` [U-Boot] [PATCH 2/2] Blackfin: convert plat-nand code to GPIO framework Mike Frysinger
@ 2010-07-06  6:59 ` Thomas Chou
  2010-07-09 18:17 ` Scott Wood
  2 siblings, 0 replies; 4+ messages in thread
From: Thomas Chou @ 2010-07-06  6:59 UTC (permalink / raw)
  To: u-boot

On 07/05/2010 04:55 PM, Mike Frysinger wrote:
> Make it easy to use GPIOs for the DEV_READY pin by using the common GPIO
> framework.  Also make the NAND_PLAT_INIT() define optional.
>
> Signed-off-by: Mike Frysinger<vapier@gentoo.org>

Tested-by: Thomas Chou <thomas@wytron.com.tw>

Thanks.
- Thomas

^ permalink raw reply	[flat|nested] 4+ messages in thread

* [U-Boot] [PATCH 1/2] mtd: nand_plat: add simple GPIO framework DEV_READY option
  2010-07-05  8:55 [U-Boot] [PATCH 1/2] mtd: nand_plat: add simple GPIO framework DEV_READY option Mike Frysinger
  2010-07-05  8:55 ` [U-Boot] [PATCH 2/2] Blackfin: convert plat-nand code to GPIO framework Mike Frysinger
  2010-07-06  6:59 ` [U-Boot] [PATCH 1/2] mtd: nand_plat: add simple GPIO framework DEV_READY option Thomas Chou
@ 2010-07-09 18:17 ` Scott Wood
  2 siblings, 0 replies; 4+ messages in thread
From: Scott Wood @ 2010-07-09 18:17 UTC (permalink / raw)
  To: u-boot

On Mon, Jul 05, 2010 at 04:55:04AM -0400, Mike Frysinger wrote:
> Make it easy to use GPIOs for the DEV_READY pin by using the common GPIO
> framework.  Also make the NAND_PLAT_INIT() define optional.
> 
> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
> ---
>  drivers/mtd/nand/nand_plat.c |   11 +++++++++++
>  1 files changed, 11 insertions(+), 0 deletions(-)

Applied patches 1 and 2 to u-boot-nand-flash.

-Scott

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2010-07-09 18:17 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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2010-07-05  8:55 [U-Boot] [PATCH 1/2] mtd: nand_plat: add simple GPIO framework DEV_READY option Mike Frysinger
2010-07-05  8:55 ` [U-Boot] [PATCH 2/2] Blackfin: convert plat-nand code to GPIO framework Mike Frysinger
2010-07-06  6:59 ` [U-Boot] [PATCH 1/2] mtd: nand_plat: add simple GPIO framework DEV_READY option Thomas Chou
2010-07-09 18:17 ` Scott Wood

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